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Channel hot electrons stress in silicon n-channel metal oxide semiconductor transistors was used to generate the barrier-surmounting 4.25 eV hot holes to produce the positive oxide charge build-up. Results showed that the positive oxide charge build-up is located over the drain/channel junction space-charge-region. Moreover, the existence of the high- and low-drain-voltage pathways is demonstrated among the four intrinsic pathways of generating the 4.25eV hot holes by electrons.

A direct-current current-voltage uses gate-controlled parasitic bipolar junction transistor of a metal-oxide-silicon field-effect transistor in a p/n junction isolation well to study the variations of the oxide and interface trap density. The process of interface and oxide traps on oxidized silicon is discussed. The technique is more effective and dependable than many of the traditional alternating current methods for finding fundamental kinetic rates and transistor degradation mechanism.

The DCIV method is used to measure the reduction of the interface trap density over the p-channel of metal oxide semiconductor transistors (pMOST's). A hydrogen reaction-transport model was also constructed to demonstrate the hydrogenation of the residual interfacial bonds by hydrogen and to show the hydrogen released from the hydrogenated boron in the p+ drain region by the channel hot holes.

Presents information on a study that analyzed the reduction of the interface trap density over the p-channel of metal-oxide semiconductor (MOS) transistors during channel hot hole stress. Characteristics of the dominant degradation mechanism in p-channel MOS transistors; Experimental results; Description of the kinetic model; Conclusion.