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134 results on '"Handel-C"'

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1. Automatic number plate recognition on FPGA

2. Hard-Wiring CSP Hiding: Implementing Channel Abstraction to Generate Verified Concurrent Hardware

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4. Automatic Generation of Verified Concurrent Hardware

7. Exploring the implementation of JPEG compression on FPGA.

8. A denotational semantics for Handel-C.

9. A step towards refining and translating B control annotations to Handel-C.

10. A reconfigurable platform for evaluating the performance of QoS networks

11. A High-Level Environment for FPGA Neural Network Implementation.

12. IDEA and AES, two cryptographic algorithms implemented using partial and dynamic reconfiguration

13. A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment.

14. An FPGA Implementation of Frequency Output.

15. An FPGA Implementation of a Digital Coriolis Mass Flow Metering Drive System.

16. A hardware Memetic accelerator for VLSI circuit partitioning

17. Efficient FPGA hardware development: A multi-language approach

18. GETB—A Gigabit Ethernet Application Platform: Its Use in the ATLAS TDAQ Network.

19. prialt in Handel-C: an operational semantics.

20. A “Hardware Compiler” Semantics for Handel-C.

21. HTCC: Haskell to Handel-C Hardware Compiler

22. Hard-Wiring CSP Hiding: Implementing Channel Abstraction to Generate Verified Concurrent Hardware

23. Formal Modeling and Verification of Security Property in Handel C Program

24. HW/SW Design Space Exploration on the Production Cell Setup

25. Mechanised Wire-wise Verification of Handel-C Synthesis

26. IDEA and AES, two cryptographic algorithms implemented using partial and dynamic reconfiguration

27. Efficient FPGA hardware development: A multi-language approach

28. Trident: From High-Level Language to Hardware Circuitry

29. Layering RTL, SAFL, Handel-C and Bluespec constructs on Chisel HCL

30. A 'Hardware Compiler' Semantics for Handel-C

31. prialt in Handel-C: an operational semantics

32. Handel-C Implementation of Handwritten Digits Recognition

33. [Untitled]

34. Software to silicon

36. Automatic number plate recognition on FPGA

37. Geração automática de hardware a partir de especificações formais: estendendo uma abordagem de tradução

38. Design and Research of Vehicle Image Processing in ETC System Based on PCNN Model

39. An Empirical Investigation on System and Statement Level Parallelism Strategies for Accelerating Scatter Search Using Handel-C and Impulse-C

40. FPGA Based Multifunction Interface for Embedded Applications

41. Development of FPGA Based Network on Chip for Circumventing Spam

42. Implementation of (255, 251) Reed Solomon Minimal Instruction Set Computing using Handel-C

43. Implementation of (15, 9) Reed Solomon Minimal Instruction Set Computing on FPGA using Handel-C

44. Minimal Instruction Set FPGA AES processor using Handel

45. A software-hardware mixed design for the FPGA implementation of the real-time edge detection

46. Implementation of (255,223) Reed Solomon minimal instruction set computing using Handel-C

47. Design and implementation of 3D scan conversion algorithm based on Handel-C

48. A reconfigurable platform for evaluating the performance of QoS networks

49. UTP Semantics for Handel-C

50. Hardware implementation and power analysis of HWT for medical imaging