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Sub-stoichiometric molybdenum oxide (MoO x) has recently been investigated for application in high efficiency Si solar cells as a "hole selective" contact. In this paper, we investigate the electrical and light-emitting properties of MoO x -based contacts on Si from the viewpoint of realizing functional bipolar devices such as light-emitting diodes (LEDs) and transistors without any impurity doping of the Si surface. We realized diodes on n-type Si substrates using e-beam physical vapor deposition of Pd/MoO x contacts and compared their behavior to implanted p + n-Si diodes as a reference. In contrast to majority-carrier dominated conduction that occurs in conventional Schottky diodes, Pd/MoO x /n-Si diodes show minority-carrier dominated charge transport with I–V, C–V, and light-emitting characteristics comparable to implanted counterparts. Utilizing such MoO x -based contacts, we also demonstrate a lateral bipolar transistor concept without employing any doped junctions. A detailed C–V analysis confirmed the excessive band-bending in Si corresponding to a high potential barrier (> --> 0.90 V) at the MoO x /n-Si interface which, along with the observed amorphous SiO x (Mo) interlayer, plays a role in suppressing the majority-carrier current. An inversion layer at the n-Si surface was also identified comprising a sheet carrier density greater than 8.6 × 10 11 cm − 2 , and the MoO x layer was found to be conductive though with a very high resistivity in the 10 4 Ω -cm range. We refer to these diodes as metal/non-insulator/semiconductor diodes and show with our device simulations that they can be mimicked as high-barrier Schottky diodes with an induced inversion layer at the interface. [ABSTRACT FROM AUTHOR]

Due to their superior material properties, wide bandgap (WBG) semiconductors enable the application of power electronics at higher temperature operation, higher frequencies, and higher efficiencies compared to silicon (Si). However, the commonly-used aluminum wire bonding as topside interconnection technology prevents WBG semiconductors from reaching their full potential, due to inherent parasitic inductances, large size, heat dissipation, and reliability issues of wire bonding technology. Therefore, this article presents a comprehensive review of topside interconnection technologies of WBG semiconductor power devices and modules. First, the challenges and driving factors for the interconnection of WBG semiconductor dies are discussed. Second, for each widely commercially used WBG semiconductor, i.e., silicon carbide and gallium nitride, technical details and innovative features of state-of-the-art interconnection techniques in packages are reviewed. Then, the majority of existing topside interconnection materials for WBG semiconductors are categorized and compared, followed by a discussion of their advantages, challenges, and failure modes. Based on this elaborate discussion, potential future directions of the interconnection technology development are given. It is concluded that the superior performance of WBG semiconductors can be obtained by combining novel materials with innovative designs for the topside interconnections. [ABSTRACT FROM AUTHOR]

In this work, we study the charge carrier transport and electroluminescence (EL) in thin-film polycrystalline (poly-) GaN/c-Si heterojunction diodes realized using a plasma enhanced atomic layer deposition process. The fabricated poly-GaN/p-Si diode with a native oxide at the interface showed a rectifying behavior (Ion/Ioff ratio ∼ 103 at ±3 V) with current-voltage characteristics reaching an ideality factor n of ∼5.17. The areal (Ja) and peripheral (Jp) components of the current density were extracted, and their temperature dependencies were studied. The space charge limited current (SCLC) in the presence of traps is identified as the dominant carrier transport mechanism for Ja in forward bias. An effective trap density of 4.6 × 1017/cm3 at a trap energy level of 0.13 eV below the GaN conduction band minimum was estimated by analyzing Ja. Other basic electrical properties of the material such as the free carrier concentration, effective density of states in the conduction band, electron mobility, and dielectric relaxation time were also determined from the current-voltage analysis in the SCLC regime. Further, infrared EL corresponding to the Si bandgap was observed from the fabricated diodes. The observed EL intensity from the GaN/p-Si heterojunction diode is ∼3 orders of magnitude higher as compared to the conventional Si only counterpart. The enhanced infrared light emission is attributed to the improved injector efficiency of the GaN/Si diode because of the wide bandgap of the poly-GaN layer and the resulting band discontinuity at the GaN/Si interface. [ABSTRACT FROM AUTHOR]

This work presents the modeling of light emission from silicon based p+n junctions operating in avalanche breakdown. We revisit the photon emission process under the influence of relatively high electric fields in a reverse biased junction (>105 V/cm). The photon emission rate is described as a function of the electron temperature Te, which is computed from the spatial distribution of the electric field. The light emission spectra lie around the visible spectral range (λ ~ 300-850 nm), where the peak wavelength and the optical intensity are both doping level dependent. It is theoretically derived that a specific minimum geometrical width (~170 nm) of the active region of avalanche is required, corresponding to a breakdown voltage of ~5V, below which the rate of photon emission in the desired spectrum drops. The derived model is validated using experimental data obtained from ultra-shallow p+n junctions with low absorption through a nm-thin p+ region and surface coverage of solely 3 nm of pure boron. We observe a peak in the emission spectra near 580 nm and 650 nm for diodes with breakdown voltages 7V and 14 V, respectively, consistent with our model. [ABSTRACT FROM AUTHOR]

Abstract: Due to its physical properties gallium‐nitride (GaN) is gaining a lot of attention as an emerging semiconductor material in the field of high‐power and high‐frequency electronics applications. Therefore, the improvement in the performance and/or perhaps even extension in functionality of GaN based devices would be highly desirable. The integration of ferroelectric materials such as lead–zirconate–titanate (PbZrxTi1‐xO3) with GaN has a strong potential to offer such an improvement. However, the large lattice mismatch between PZT and GaN makes the epitaxial growth of Pb(Zr1‐xTix)O3 on GaN a formidable challenge. This work discusses a novel strain relaxation mechanism observed when MgO is used as a buffer layer, with thicknesses down to a single unit cell, inducing epitaxial growth of high crystallinity Pb(Zr0.52Ti0.48)O3 (PZT) thin films. The epitaxial PZT films exhibit good ferroelectric properties, showing great promise for future GaN device applications. [ABSTRACT FROM AUTHOR]

In this paper, we show that the subthreshold current–voltage characteristic can be used for estimating the interface trap density as a function of the energy in fully depleted symmetric metal-oxide-semiconductor devices with a minimum amount of modeling. The method is analyzed using TCAD simulations, and illustrated with the measurements on n-type silicon-on-insulator FinFETs. The results indicate that the trap density can be extracted between $\sim 0.65$ and 0.90 eV. This range is limited by resolution issues at the lowest current levels, and by the transition from subthreshold to saturation behavior at the high current levels. [ABSTRACT FROM AUTHOR]

This paper investigates the validity of the parabolic effective mass approximation (EMA), which is almost universally used to describe the size and bias-induced quantization in n-MOSFETs. In particular, we compare the EMA results with a full-band quantization approach based on the linear combination of bulk bands (LCBB) and study the most relevant quantities for the modeling of the mobility and of the on-current of the devices, namely, the minima of the 2-D subbands, the transport masses, and the electron density of states. Our study deals with both silicon and germanium n-MOSFETs with different crystal orientations and shows that, in most cases, the validity of the EMA is quite satisfactory. The LCBB approach is then used to calculate the values of the effective masses that help improve the EMA accuracy. There are crystal orientations, however, where the 2-D energy dispersion obtained by the LCBB method exhibits features that are difficult to reproduce with the EMA model. [ABSTRACT FROM AUTHOR]

In this work, we analyzed the subthreshold current (ID) of pocket implanted MOSFETs using extensive device simulations and experimental data. We present an analytical model for the subthreshold current applicable for any type of FET and show that the subthreshold current of nMOSFETs, which is mainly due to diffusion, is determined by the internal two-dimensional hole distribution across the device. This hole distribution is affected by the electric potential of the gate and the doping concentration in the channel. The result obtained allow accurate modelling of the subthreshold current of future generation MOS devices. [ABSTRACT FROM AUTHOR]

In this paper, the Kirk effect has been analyzed for silicon-based bipolar transistors (BJTs). with a nonuniform collector profile. We show that, for any arbitrary collector doping profile, the Kirk effect starts when the electron concentration equals the average doping concentration in the depletion region. We present a basic guideline for determining the collector current density at the onset of Kirk effect (JK) for any collector doping profile and simple expressions for JK and the electrical field in the collector drift region for the case of a linearly graded collector drift region. These analytical expressions are verified with device simulations. The Kirk effect for this kind of transistor is substantially different from that presented previously for transistors having a uniform collector drift region. For example, the possibility of the onset of the Kirk effect in a partially depleted collector occurs, while in a uniform collector profile the effect can only occur in a fully depleted collector. Our expressions can be used to do approximate analytical calculations for optimizing future BJTs. [ABSTRACT FROM AUTHOR]

For the switching performance of low-voltage (LV) power MOSFETs, the gate-drain charge density (Qgd) is an important parameter. The so-called figure-of-merit, which is defined as the product of the specific on-resistance (Rds,on) and Qgd is commonly used for quantifying the switching performance for a specified off-state breakdown voltage (BVds). In this paper, we analyzed the switching behavior in power trench MOSFETs by using experiments and simulations, focusing on the charge density Qgd . The results of this analysis can be used for further optimization of these devices. The results show that the Qgd can be split into three charge contributions: accumulation, depletion, and inversion charge. It is shown that the inversion charge is located mainly underneath the trench bottom. The accumulation and depletion charge contribute each about 45% in conventional LV trench MOSFETs and can be reduced by using a thick bottom oxide in a shallow trench gate just extending in the drift region. Further, we derived an analytical model for calculating the Qgd, that takes into account the geometry dependence. [ABSTRACT FROM AUTHOR]

For some years now, the ever continuing dimensional scaling has no longer been considered to be sufficient for the realization of advanced CMOS devices. Alternative approaches, such as employing new materials and introducing new device architectures, appear to be the way to go forward. A currently hot approach is to employ ferroelectric materials for obtaining a positive feedback in the gate control of a switch. This work elaborates on two device architectures based on this approach: the negative-capacitance and the piezoelectric field-effect transistor, i.e., the NC-FET (negative-capacitance field-effect transistor), respectively π -FET. It briefly describes their operation principle and compares those based on earlier reports. For optimal performance, the adopted ferroelectric material in the NC-FET should have a relatively wide polarization-field loop (i.e., "hard" ferroelectric material). Its optimal remnant polarization depends on the NC-FET architecture, although there is some consensus in having a low value for that (e.g., HZO (Hafnium-Zirconate)). π -FET is the piezoelectric coefficient, hence its polarization-field loop should be as high as possible (e.g., PZT (lead-zirconate-titanate)). In summary, literature reports indicate that the NC-FET shows better performance in terms of subthreshold swing and on-current. However, since its operation principle is based on a relatively large change in polarization the maximum speed, unlike in a π -FET, forms a big issue. Therefore, for future low-power CMOS, a hybrid solution is proposed comprising both device architectures on a chip where hard ferroelectric materials with a high piezocoefficient are used. [ABSTRACT FROM AUTHOR]

This work presents a monolithic laterally-coupled wide-spectrum (350 nm < λ < 1270 nm) optical link in a silicon-on-insulator CMOS technology. The link consists of a silicon (Si) light-emitting diode (LED) as the optical source and a Si photodiode (PD) as the detector; both realized by vertical abrupt n + p junctions, separated by a shallow trench isolation composed of silicon dioxide. Medium trench isolation around the devices along with the buried oxide layer provides galvanic isolation. Optical coupling in both avalanche-mode and forward-mode operation of the LED are analyzed for various designs and bias conditions. From both DC and pulsed transient measurements, it is further shown that heating in the avalanche-mode LED leads to a slow thermal coupling to the PD with time constants in the ms range. An integrated heat sink in the same technology leads to a ∼ 6 times reduction in the change in PD junction temperature per unit electrical power dissipated in the avalanche-mode LED. The analysis paves way for wide-spectrum optical links integrated in smart power technologies.

An important energy loss contribution in bulk acoustic wave resonators is formed by so-called shear waves, which are transversal waves that propagate vertically through the devices with a horizontal motion. In this work, we report for the first time scaling of the shear-confined spots, i.e., spots containing a high concentration of shear wave displacement, controlled by the frame region width at the edge of the resonator. We also demonstrate a novel methodology to arrive at an optimum frame region width for spurious mode suppression and shear wave confinement. This methodology makes use of dispersion curves obtained from finite-element method (FEM) eigenfrequency simulations for arriving at an optimum frame region width. The frame region optimization is demonstrated for solidly mounted resonators employing several shear wave optimized reflector stacks. Finally, the FEM simulation results are compared with measurements for resonators with Ta2O5/ SiO2 stacks showing suppression of the spurious modes.

The quality factor (Q) of a solidly mounted bulk acoustic wave resonator (SMR) is limited by substrate losses, because the acoustic mirror is traditionally optimized to reflect longitudinal waves only. We propose two different design approaches derived from optics to tailor the acoustic mirror for effective reflection of both longitudinal and shear waves. The first one employs the stopband theory in optics; the second one takes advantage of the periodic nature of reflection spectra in a Bragg reflector: the diffraction grating design approach. The optimized design using stopband theory reaches a calculated minimum transmission of 25 dB and 20 dB at resonance frequency for longitudinal and shear waves, respectively, for various practical reflector material combinations. Using the diffraction grating approach, a near quarter-wave performance is maintained for longitudinal waves, whereas shear waves reach minimum transmission below 26 dB. However, this design does necessitate relatively thick layers. The experimental results show good agreement with finite element models (FEM). The extracted 1-D Q for the realized shear optimized devices was increased to around 3300.