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An electro-absorption optical modulator concept based upon a dual-graphene layer is presented. The device consists of a silicon-on-insulator waveguide upon which two graphene layers reside, separated by a thin insulating region. The lower graphene acts as a tunable absorber, while the upper layer functions as a transparent gate electrode. Calculations based upon realistic graphene material properties show that 3-dB bandwidths over 120 GHz (30 GHz) are achievable at near- (λ = 1.55 μm) and mid- (λ = 3.5 μm) infrared bands. The effect of background doping and potential fluctuations on the bandwidth, modulation depth, and insertion loss are also quantified. [ABSTRACT FROM AUTHOR]

Tunneling field-effect transistors (TFETs) have gained a great deal of interest recently due to their potential to reduce power dissipation in integrated circuits. One major challenge for TFETs so far has been to achieve high drive currents, which is a prerequisite for high-performance operation. In this paper, we explore the performance potential of a 1-D TFET with a broken-gap heterojunction source injector using dissipative quantum transport simulations based on the nonequilibrium Green's function formalism, as well as the carbon nanotube band structure as the model 1-D material system. We provide detailed insights into broken-gap TFET (BG-TFET) operation and show that it can, indeed, produce less than 60 mV/dec subthreshold swing at room temperature, even in the presence of electron–phonon scattering. The 1-D geometry is recognized to be uniquely favorable due to its superior electrostatic control, reduced carrier thermalization rate, and beneficial quantum confinement effects that reduce the off-state leakage below the thermionic limit. Because of higher source injection compared to staggered-gap and homojunction geometries, BG-TFET delivers superior performance that is comparable to MOSFET's. BG-TFET even exceeds the MOSFET performance at lower supply voltages (VDD), showing promise for low-power/high-performance applications. [ABSTRACT FROM PUBLISHER]

In this paper, we develop an analytic model based on the theory of virtual-source emission-diffusion (VS-ED) to describe ambipolar current conduction in ultrathin black phosphorus (BP) field-effect transistors (FETs). Unlike the VS model which is strictly applicable to quasiballistic devices, the VS-ED model can be applied to long-channel devices with drift-diffusive transport. The model comprehends the in-plane band structure anisotropy in BP, as well as the asymmetry in electron and hole current conduction characteristics. The model also includes the effect of Schottky-type source/drain contact resistances, which are voltage-dependent and can significantly limit current conduction in the on-state in BP FETs. Model parameters are extracted using measured data of back-gated BP transistors with gate lengths of 1000 nm and 300 nm with BP thicknesses of 7.3 nm and 8.1 nm, and for the temperature range 180–298 K. Compared to previous BP models that are validated only for room temperature and near-equilibrium bias conditions (low drain-source voltage), we demonstrate an excellent agreement between the model and data over a broad range of bias and temperature values. The model is also validated against numerical technology computer-aided design data of back- and top-gated BP transistors with a channel length of 300 nm and a thickness of 8.1 nm. The model is implemented in Verilog-A, and the capability of the model to handle both dc and transient circuit simulations is demonstrated using SPECTRE. The model not only provides physical insight into technology-device interaction in BP transistors but can also be used to design and optimize BP-based circuits using a standard hierarchical circuit simulator. [ABSTRACT FROM AUTHOR]

A graphene wireless sensor concept is described. By utilizing thin gate dielectrics, the capacitance in a metal-insulator-graphene structure varies with charge concentration through the quantum capacitance effect. Simulations using realistic structural and transport parameters predict quality factors, Q, >60 at 1 GHz. When placed in series with an ideal inductor, a resonant frequency tuning ratio of 25% (54%) is predicted for sense charge densities ranging from 0.32 to 1.6 μC/cm2 at an equivalent oxide thickness of 2.0 nm (0.5 nm). The resonant frequency has a temperature sensitivity, df/dT, less than 0.025%/K for sense charge densities >0.32 μC/cm2. [ABSTRACT FROM AUTHOR]

Sulfur passivation of Ge(100) is achieved using aqueous ammonium sulfide (NH4)2S(aq). The passivation layer is largely preserved after atomic layer deposition of the high-κ dielectric material HfO2 when sufficiently low growth temperatures (e.g., 220 °C) are employed. Oxygen incorporation is moderate and results in an electrically passivating GeOS interface layer. The HfO2/GeOS/Ge gate stack exhibits lower fixed charge and interface state density than a more conventional HfO2/GeON/Ge gate stack fabricated via an ammonia gas treatment. [ABSTRACT FROM AUTHOR]

All-spin logic (ASL) is a novel approach for digital logic applications wherein spin is used as the state variable instead of charge. One of the challenges in realizing a practical ASL system is the need to ensure non-reciprocity, meaning the information flows from input to output, not vice versa. One approach described previously, is to introduce an asymmetric ground contact, and while this approach was shown to be effective, it remains unclear as to the optimal approach for achieving nonreciprocity in ASL. In this study, we quantitatively analyze techniques to achieve non-reciprocity in ASL devices, and we specifically compare the effect of using asymmetric ground position and dipole-coupled output/input isolation. For this analysis, we simulate the switching dynamics of multiple-stage logic devices with FePt and FePd perpendicular magnetic anisotropy materials using a combination of a matrix-based spin circuit model coupled to the Landau--Lifshitz--Gilbert equation. The dipole field is included in this model and can act as both a desirable means of coupling magnets and a source of noise. The dynamic energy consumption has been calculated for these schemes, as a function of input/output magnet separation, and the results show that using a scheme that electrically isolates logic stages produces superior non-reciprocity, thus allowing both improved scaling and reduced energy consumption. [ABSTRACT FROM AUTHOR]

In the first part of this article, a physics-based surface-potential compact model to describe current–voltage (I–V) relationship in few-layered ambipolar black phosphorus (BP) transistors is presented. The proposed model captures the essential physics of thin-film BP FETs by accounting for the effects of: 1) in-plane band-structure anisotropy in BP, as well as the asymmetry in electron and hole current conduction characteristics; 2) nonlinear Schottky-type source/drain contact resistances; 3) interface traps; 4) ambipolar current conduction in the device using two separate quasi-Fermi levels for electrons and holes; and 5) the effect of temperature on the model parameters. In this article, the model is validated against measured data of back-gated BP transistors with gate lengths of 1000 and 300 nm with the BP thickness of 7.3 and 8.1 nm and for the temperature range of 200–298 K. We also validate the model against numerical TCAD data of BP transistors with channel lengths of 300 and 600 nm and BP thickness of 6 nm. The model is also applied to unipolar 2-D FETs with channel materials, such as MoS2 and WSe2. Compared with prior BP FET models that are mainly suited for near-equilibrium transport and room-temperature operation, the model developed here shows excellent agreement with experimental and numerical data over broad bias and temperature range. [ABSTRACT FROM AUTHOR]

We report a physics-based surface-potential compact model to describe current–voltage (I – V) relationship in a few-layered ambipolar black phosphorus (BP) transistors. To model the device electrostatics, the 2-D density of states of carriers and Fermi–Dirac statistics are used, while carrier transport is described using the drift-diffusion formalism. The model also comprehends the effects of interface traps and voltage-dependent Schottky-type source/drain contact resistances. Compared with prior BP FET models that are mainly suited for near-equilibrium transport and room-temperature operation, the model developed here is applicable over broad bias and temperature range. Validation of the model against measurement data of BP transistors with gate lengths 300–1000 nm and operating temperature from 200–298 K is demonstrated in a companion article. [ABSTRACT FROM AUTHOR]

An ac small signal model for lateral spin valves (LSVs) is developed, and is applied to two different types of devices: spin transmitters and magnetic field sensors. The small signal models explicitly decouple the charge- and spin-dependent components, which describe the intrinsic RC delay and the ac spin accumulation dynamics, separately. The analysis is applied to graphene LSVs as an example to illustrate the optimization strategies for LSV devices. By using the charge-spin circuit model, the scattering parameters and the reflection coefficients at the output terminals are quantitatively calculated as a function of frequency. This model can be used as a guide for future LSV design and to benchmark performance across different material systems. [ABSTRACT FROM AUTHOR]

Growing a thick high-quality epitaxial layer on the β-Ga2O3 substrate is crucial in commercializing β-Ga2O3 devices. Metal organic chemical vapor deposition (MOCVD) is also well-established for the large-scale commercial growth of β-Ga2O3 and related heterostructures. This paper presents a systematic study of the Schottky barrier diodes fabricated on two different Si-doped homoepitaxial β-Ga2O3 thin films grown on Sn-doped (001) and (010) β-Ga2O3 substrates by MOCVD. X-ray diffraction analysis of the MOCVD-grown sample, room temperature current density–voltage data for different Schottky diodes, and C–V measurements are presented. Diode characteristics, such as ideality factor, barrier height, specific on-resistance, and breakdown voltage, are studied. Temperature dependence (170–360 K) of the ideality factor, barrier height, and Poole–Frenkel reverse leakage mechanism are also analyzed from the J–V–T characteristics of the fabricated Schottky diodes. [ABSTRACT FROM AUTHOR]

This work reports the quantification of rise in channel temperature due to self-heating in two-terminal SrSnO3 thin film devices under electrical bias. Using pulsed current–voltage (I–V) measurements, thermal resistances of the thin films were determined by extracting the relationship between the channel temperature and the dissipated power. For a 26-nm-thick n-doped SrSnO3 channel with an area of 200 μm2, a thermal resistance of 260.1 ± 24.5 K mm/W was obtained. For a modest dissipated power of 0.5 W/mm, the channel temperature rose to ∼176 °C, a value which increases further at higher power levels. Electro-thermal simulations were performed which showed close agreement between the simulated and experimental I–V characteristics both in the absence and presence of self-heating. The work presented is critical for the development of perovskite-based high-power electronic devices. [ABSTRACT FROM AUTHOR]

Layered two-dimensional materials have demonstrated novel optoelectronic properties and are well suited for integration in planar photonic circuits. Graphene, for example, has been utilized for wideband photodetection. However, because graphene lacks a bandgap, graphene photodetectors suffer from very high dark current. In contrast, layered black phosphorous, the latest addition to the family of two-dimensional materials, is ideal for photodetector applications due to its narrow but finite bandgap. Here, we demonstrate a gated multilayer black phosphorus photodetector integrated on a silicon photonic waveguide operating in the near-infrared telecom band. In a significant advantage over graphene devices, black phosphorus photodetectors can operate under bias with very low dark current and attain an intrinsic responsivity up to 135 mA W−1 and 657 mA W−1 in 11.5-nm- and 100-nm-thick devices, respectively, at room temperature. The photocurrent is dominated by the photovoltaic effect with a high response bandwidth exceeding 3 GHz. [ABSTRACT FROM AUTHOR]

To fully utilize graphene's remarkable optical properties for optoelectronic applications, it needs to be integrated in planar photonic systems. Here, we demonstrate integration of graphene on silicon photonic circuits and precise measurement of the optical absorption coefficient in a graphene/waveguide hybrid structure. A method based on Mach-Zehnder interferometry is employed to achieve high measurement precision and consistency, yielding a maximal value of absorption coefficient of 0.2 dB/μm when graphene is located directly on top of the waveguide. The averaged results obtained from a large number of samples agree with theoretical model utilizing the universal ac conductivity in graphene. Our work provides an important guide for the design and optimization of integrated graphene optoelectronic devices. [ABSTRACT FROM AUTHOR]

We present a study of the effects of substrate orientation and longitudinal channel stress on the performance of extremely thin silicon-on-insulator (ETSOI) MOSFETs with gate lengths down to 25 nm. We find that short-channel electron and hole mobilities follow the long-channel mobility trends versus substrate orientation and longitudinal channel stress. We show that with respect to (100) silicon-on-insulator (SOI) substrates, short-channel ETSOI MOSFETs on (110) SOI substrates lead to 25% enhancement of the p-channel FET drive current at the expense of 12% degradation of the n-channel FET drive current at a fixed off-current of 100 \nA/\mu\m and a supply voltage of 1 V. Finally, we estimate that an ETSOI complementary metal–oxide–semiconductor (CMOS) on (110) SOI substrates should lead to 10% faster ring oscillators compared with those on (100) SOI wafers, which also implies that (100)-oriented wafers with (110) sidewalls are a better choice for fabricating nonplanar FinFETs and trigate CMOS circuits. [ABSTRACT FROM PUBLISHER]

We present a detailed study of gate length scalability and device performance of undoped-body extremely thin silicon-on-insulator (ETSOI) MOSFETs with back gates. We show that short channel control improves with the application of back bias via a decrease in the electrostatic scaling length as the subthreshold charges move toward the front gate. We demonstrate that, even for undoped ETSOI devices with ∼8-nm SOI thickness, the improvement in short channel control with the application of a back bias translates to 10% higher drive current, 10% shorter gate lengths, and, consequently, 20% lower extrinsic gate delay at a fixed OFF-state current of 100 nA/µm and a back oxide electric field of 1.5 MV/cm (0.5 MV/cm SOI field). [ABSTRACT FROM AUTHOR]

Abstract: The low-frequency noise and its spatial origin in strained Si/SiGe n-MODFETs with f MAX >200GHz is investigated for high-performance analog and mixed-signal applications. The dependence of the low-frequency noise response on two major device design parameters (L G and L SD) is examined. A stronger dependence of 1/f noise on L G compared to L SD is observed. The correlation of drain current noise power spectral density with transconductance suggest carrier number induced fluctuations in the strained silicon channel of SiGe n-MODFETs dominate the noise characteristics. Further investigation of normalized noise spectral density’s dependence on gate overdrive voltage confirmed the dominance of carrier number fluctuations in the channel. [Copyright &y& Elsevier]

Black arsenic phosphorus single crystals were grown using a short-way transport technique resulting in crystals up to 12 × 110 and ranging from 200 nm to 2 thick. The reaction conditions require tin, tin (IV) iodide, gray arsenic, and red phosphorus placed in an evacuated quartz ampule and ramped up to a maximum temperature of 630 °C. The crystal structure and elemental composition were characterized using Raman spectroscopy, x-ray diffraction, and x-ray photoelectron spectroscopy, cross-sectional transmission microscopy, and electron backscatter diffraction. The data provides valuable insight into the growth mechanism. A previously developed b-P thin film growth technique can be adapted to b-AsP film growth with slight modifications to the reaction duration and reactant mass ratios. Devices fabricated from exfoliated bulk-b-AsP grown in the same reaction condition as the thin film growth process are characterized, showing an on-off current ratio of 102, a threshold voltage of −60 V, and a peak field-effect hole mobility of 23 cm2 V−1 s−1 at Vd = −0.9 V and Vg = −60 V. [ABSTRACT FROM AUTHOR]

We report the results of metal contact resistance, RC, to Nd-doped n-type SrSnO3 films grown by radical-based hybrid molecular beam epitaxy. Sc, Mn, Ti, Al, and Cr contact layers were deposited onto heavily doped SrSnO3 thin films. With no annealing, Al and Cr contacts were found to be highly resistive, while Sc, Mn, and Ti were more conductive, with Mn having the lowest RC of 11 ± 3 Ω-mm, immediately after liftoff. After Al2O3 passivation at 200 °C, Sc, Mn, and Ti contacts all showed Ohmic behavior, with Ti contacts having RC = 2.4 ± 0.3 Ω-mm and a resultant sheet resistance, RS, of 1.66 ± 0.07 kΩ/◻. Specific contact resistivity, ρC, values of 0.03, 0.2, and 0.5 mΩ-cm2 were determined for Ti, Sc, and Mn, respectively. Annealing at 300 °C did not result in any significant change in RC. An additional study was performed using Ti-contacts on bi-layer films consisting of a heavily doped cap layer grown on a moderately doped active layer. It was found that the RC (ρC) of Ti metal to the bi-layer films was ∼1 (2) order(s) of magnitude lower than on single-layer controls. Temperature-dependent analysis was used to extract the barrier height and doping effect for annealed Ti contacts. This work is an important step in evaluating SrSnO3 for use in high-performance and transparent electronic applications. [ABSTRACT FROM AUTHOR]

The article discusses microfluidic devices fabricated via soft lithography have demonstrated compelling applications such as lab-on-achip diagnostics, microarrays, and cell-based assays. Topics include the self-supporting microfluidic structures enable the automatable fabrication of multifunctional devices, including multimaterial mixers, and microfluidic-integrated sensors; and printing toolpaths have designed to realize leakage-free connections between channels and chambers.

Black arsenic (BAs) is an elemental van der Waals semiconductor that is promising for a wide range of electronic and photonic applications. The narrow bandgap and symmetric band structure suggest that ambipolar (both n- and p-type) transport should be observable, however, only p-type transport has been experimentally studied to date. Here, we demonstrate and characterize ambipolar transport in exfoliated BAs field effect transistors. In the thickest flakes (∼ 80 nm), maximum currents, Imax, up to 60 μA μm−1 and 90 μA μm−1are achieved for hole and electron conduction, respectively. Room-temperature hole (electron) mobilities up to 150 cm2 V−1 s−1 (175 cm2 V−1 s−1) were obtained, with temperature-dependence consistent with a phonon-scattering mechanism. The Schottky barrier height for Ni contacts to BAs was also extracted from the temperature-dependent measurements. Imax for both n- and p-type conductivity was found to decrease with reduced thickness, while the ratio of Imax to the minimum current, Imin, increased. In the thinnest flakes (∼ 1.5 nm), only p-type conductivity was observed with the lowest value of Imin = 400 fA μm−1. Imax/Imin ratios as high as 5 × 105 (5 × 102) were obtained, for p- (n-channel) devices. Finally, the ambipolarity was used to demonstrate a complementary logic inverter and a frequency doubling circuit. [ABSTRACT FROM AUTHOR]

We investigate piezoresistance in lithographically defined silicon nanowires of various cross-sectional aspect ratios. Both <110>- and <100>-oriented nanowires are investigated under <110>-oriented strain. The nanowire thickness is varied from 23 to 45 nm and the nanowire width is varied from 5 to 113 nm. Our data shows piezoresistance in silicon nanowires being a surface induced effect with {110} surfaces inducing a much larger piezoresistance than {100} surfaces. This is consistent with a higher density of surface states on {110} surfaces than on {100} surfaces. Our experimental findings support recent computational work pointing toward surface states being the source of giant piezoresistance in silicon nanowires. [ABSTRACT FROM AUTHOR]

Beta-phase gallium oxide (β-Ga2O3), the most thermally stable phase of Ga2O3, has stimulated great interest in power electronics due to its ultra-wide bandgap (∼4.9 eV) and high breakdown electric field. The relatively low thermal conductivity of β-Ga2O3, however, limits the device performance due to excessive temperature driven by self-heating. Recently, integrating β-Ga2O3 thin films on substrates with high thermal conductivities has been proposed to improve heat rejection and device reliability. In this work, we prepare high-quality single-crystal β-Ga2O3 thin films by mechanical exfoliation of bulk crystals and study their thermal transport properties. Both the anisotropic thermal conductivity of β-Ga2O3 bulk crystals and the thickness-dependent thermal conductivity of β-Ga2O3 thin films are measured using the time-domain thermoreflectance technique. The reduction in the thin-film thermal conductivity, compared to the bulk value, can be well explained by the size effect resulting from the enhanced phonon-boundary scattering when the film thickness decreases. This work not only provides fundamental insight into the thermal transport mechanisms for high-quality β-Ga2O3 thin films but also facilitates the design and optimization of β-Ga2O3-based electronic devices. [ABSTRACT FROM AUTHOR]

A facile, high‐resolution patterning process is introduced for fabrication of electrolyte‐gated transistors (EGTs) and circuits using a photo‐crosslinkable ion gel and stencil‐based screen printing. The photo‐crosslinkable gel is based on a triblock copolymer incorporating UV‐sensitive terminal azide functionality and a common ionic liquid. Using this material in conjunction with conventional photolithography and stenciling techniques, well‐defined 0.5–1 μm thick ion gel films are patterned on semiconductor channels as narrow as 10 μm. The resulting n‐type ZnO EGTs display high electron mobility (>2 cm2 Vs−1) and on/off current ratios (>105). Further, EGT‐based inverters exhibit static gains >23 at supply voltages below 3 V, and five‐stage EGT ring oscillator circuits display dynamic propagation delays of 50 μs per stage. In general, the screen printing and photo‐crosslinking strategy provides a clean room‐compatible method to fabricate EGT circuits with improved sensitivity (gain) and computational power (gain × oscillating frequency). Detailed device analysis indicates that significantly shorter delay times, of order 1 μs, can be obtained by improving the ion gel conductance. [ABSTRACT FROM AUTHOR]

Graphene lateral spin valves (LSVs) are promising devices for future memory and magnetic field sensing applications. In this article, we study the dependence of the nonlocal spin resistance, $\Delta {R}_{{\text {NL}}}$ , and the baseline resistance, ${R}_{{\text {BS}}}$ , as a function of the graphene channel width, ${W}$. The scaling trend is quantitatively assessed by using graphene deposited by chemical vapor deposition, which provides a large number of devices with consistent performance. As ${W}$ is scaled from 10 to $0.5~\mu \text{m}$ , the change in $\Delta {R}_{{\text {NL}}}$ matches the theory of contact-induced spin relaxation with a current spin polarization of 3%–5% and a spin diffusion length of $\lambda _{s} = 1.5$ – $2.5~\mu \text{m}$. We also observe a systematic and dramatic decrease in ${R}_{{\text {BS}}}$ , which we attribute to the reduction in charge current spreading. However, we find in the narrowest devices that a small ${R}_{{\text {BS}}}$ remains that arises due to thermoelectric effects, and this trend is confirmed using gate voltage- and charge current-dependent analyses. Finally, we introduce a nonideality factor, ${m} = \vert {R}_{{\text {BS}}} / \Delta {R}_{{\text {NL}}}\vert $ , as a figure of merit to describe the suppression of the baseline relative to the spin signal. In an LSV with ${L} = {1.5}\,\,\mu \text{m}$ , ${W} = {0.5}\,\,\mu \text{m}$ , and n-type conduction, the nonideality factor is as low as ${m} = {0.0252}\,\,\pm \,\,0.0202$ at room temperature showing that nearly ideal bipolar and symmetric spin signals can be achieved in graphene LSVs. [ABSTRACT FROM AUTHOR]

Stochastic computing (SC) is a promising technology that can be used for low-cost hardware designs. However, SC suffers from its long latency. Although parallel processing can efficiently shorten the latency, duplicated stochastic number generators (SNGs) are necessary, which cause substantial hardware overhead. This paper proposes a scalable SNG based on the spin-Hall-effect (SHE), which is capable of generating multiple independent stochastic streams simultaneously. The design takes advantages of the efficient charge-to-spin conversion from the Spin-Hall material and the intrinsic stochasticity of nanomagnets. Compared to previous spintronic SNGs, the SHE-SNG can reduce the area by $1.6\times -7.8\times $ and the power by $4.9\times -13\times $ while increasing the degree of parallelism from 1 to 16. Compared to CMOS-based SNGs, the proposed SNG obtained $24\times -120\times $ and $53\times $ reduction in terms of area and power, respectively. Finally, three benchmarks were implemented, and the results indicate that SC implementations with the proposed SHE-SNG can achieve $1.2\times -29\times $ reduction of hardware resources compared to implementations with previous CMOS- and spintronic-based designs while scaling the degree of parallelism from 1 to 64. [ABSTRACT FROM AUTHOR]

Abstract Duchenne Muscular Dystrophy (DMD) is a fatal genetic disorder currently having no cure. Here we report that culture substrates patterned with nanogrooves and functionalized with Matrigel (or laminin) present an engineered cell microenvironment to allow myotubes derived from non-diseased, less-affected DMD, and severely-affected DMD human induced pluripotent stem cells (hiPSCs) to exhibit prominent differences in alignment and orientation, providing a sensitive phenotypic biomarker to potentially facilitate DMD drug development and early diagnosis. We discovered that myotubes differentiated from myogenic progenitors derived from non-diseased hiPSCs align nearly perpendicular to nanogrooves, a phenomenon not reported previously. We further found that myotubes derived from hiPSCs of a dystrophin-null DMD patient orient randomly, and those from hiPSCs of a patient carrying partially functional dystrophin align approximately 14° off the alignment direction of non-diseased myotubes. Substrates engineered with micron-scale grooves and/or cell adhesion molecules only interacting with integrins all guide parallel myotube alignment to grooves and lose the ability to distinguish different cell types. Disruption of the interaction between the Dystrophin-Associated-Protein-Complex (DAPC) and laminin by heparin or anti-α-dystroglycan antibody IIH6 disenables myotubes to align perpendicular to nanogrooves, suggesting that this phenotype is controlled by the DAPC-mediated cytoskeleton-extracellular matrix linkage. Graphical abstract Image 1 Highlights • Non-diseased myotubes align perpendicular to nanogrooves on substrates having laminin. • Nanogrooved, laminin-modified substrates distinguish non-diseased and DMD myotubes. • This phenotypic biomarker may facilitate DMD drug development and early diagnosis. • All myotubes align parallel to grooves when grooves are larger or laminin is missing. • The DAPC and its interaction with laminin regulate perpendicular myotube alignment. [ABSTRACT FROM AUTHOR]

Precise measurements of the mobility anisotropy along high-symmetry crystal axes in black phosphorus (BP) MOSFETs are reported. Locally back-gated BP MOSFETs with 13-nm HfO2 dielectric and channel length ranging from 0.3 to 0.7 $\mu \text{m}$ are fabricated. A single BP flake of a uniform thickness is exfoliated and etched along armchair (AC) and zigzag (ZZ) crystal axes, and the orientations are confirmed using optical and transmission electron microscopy analyses. The hole and electron mobilities along each direction are extracted using the transfer length method. The AC-to-ZZ hole mobility ratio is found to increase from 1.4 (1.5) to 2.0 (2.9) as the sheet concentration increased from $5.1\times 10^{\textsf {11}}$ to $1.9\times 10^{\textsf {12}}$ cm−2 at room temperature (77 K). The room-temperature electron mobility anisotropy is found to be similar to that for holes with an AC-to-ZZ mobility ratio increasing from 1.4 to 2.1 from $5.1\times 10^{\textsf {11}}$ to $1.9\times 10^{\textsf {12}}$ cm−2 though electrons showed only a very weak temperature dependence. A Boltzmann transport model is used to explain the concentration- and temperature-dependent mobility anisotropies which can be well described using a charge center scattering model. [ABSTRACT FROM AUTHOR]

Contact resistance is a severe performance bottleneck for electronic devices based on two-dimensional (2D) layered semiconductors, whose contacts are Schottky rather than Ohmic. Although there is a general consensus that the injection mechanism changes from thermionic to tunneling with gate biasing, existing models tend to oversimplify the transport problem, by neglecting the 2D transport nature and the modulation of the Schottky barrier height, the latter being of particular importance in back-gated devices. In this paper, we develop a semianalytical model based on Bardeen's transfer Hamiltonian approach to describe both effects. Remarkably, our model is able to reproduce several experimental observations of a metallic behavior in the contact resistance, i.e., a decreasing resistance with decreasing temperature, occurring at high gate voltages. [ABSTRACT FROM AUTHOR]

The ability to transform two-dimensional (2D) materials into a three-dimensional (3D) structure while preserving their unique inherent properties might offer great enticing opportunities in the development of diverse applications for next generation micro/nanodevices. Here, a self-assembly process is introduced for building free-standing 3D, micro/nanoscale, hollow, polyhedral structures configured with a few layers of graphene-based materials: graphene and graphene oxide. The 3D structures have been further modified with surface patterning, realized through the inclusion of metal patterns on their 3D surfaces. The 3D geometry leads to a nontrivial spatial distribution of strong electric fields (volumetric light confinement) induced by 3D plasmon hybridization on the surface of the graphene forming the 3D structures. Due to coupling in all directions, resulting in 3D plasmon hybridization, the 3D closed box graphene generates a highly confined electric field within as well as outside of the cubes. Moreover, since the uniform coupling reduces the decay of the field enhancement away from the surface, the confined electric field inside of the 3D structure shows two orders of magnitude higher than that of 2D graphene before transformation into the 3D structure. Therefore, these structures might be used for detection of target substances (not limited to only the graphene surfaces, but using the entire volume formed by the 3D graphene-based structure) in sensor applications. [ABSTRACT FROM AUTHOR]

Passive wireless sensing of Co-60 gamma radiation using fully-depleted silicon-on-insulator (FDSOI) variable capacitors is demonstrated. A linear relationship between resonant frequency and radiation dose is observed for water-equivalent doses up to 100 Gy, with a frequency change per unit dose of −2.02 kHz/Gy. These results show FDSOI technology has the potential to realize ultra-small passive wireless radiation dosimeters with high sensitivity for a wide range of medical and security applications. [ABSTRACT FROM PUBLISHER]

The capacitance-based sensing of fully-depleted silicon-on-insulator (FDSOI) variable capacitors for Co-60 gamma radiation is investigated. Linear response of the capacitance is observed for radiation dose up to 64 Gy, while the percent capacitance change per unit dose is as high as 0.24%/Gy. An analytical model is developed to study the operational principles of the varactors and the maximum sensitivity as a function of frequency is determined. The results show that FDSOI varactor dosimeters have potential for extremely-high sensitivity as well as the potential for high frequency operation in applications such as wireless radiation sensing. [ABSTRACT FROM PUBLISHER]

Phosphorene, the 2D analogue of black phosphorus, is a promising material for studying spin transport due to its low spin-orbit coupling and its 1/2 nuclear spin, which could allow the study of hyperfine effects. In this work, the properties of permalloy (Py) and cobalt (Co) contacts to fewlayer phosphorene are presented. The Schottky barrier height was extracted and determined as a function of gate bias. Flat-band barrier heights, relative to the valence band edge, of 110 meV and 200 meV were determined for Py and Co, respectively. These results are important for future studies of spin transport in phosphorene. [ABSTRACT FROM AUTHOR]

The potential of using fully-depleted silicon-on-insulator (FDSOI) devices as dosimeters for radiation cancer therapy is investigated. The response of long-channel FDSOI MOSFETs to radiation from a linear accelerator under various clinical conditions has been measured. Linear response of the device threshold voltage, Vth, is observed for typical interventional energy X-rays up to absorbed doses as high as 160 Gy. The device response is observed to be strongly influenced by the application of a substrate bias, Vbg, with sensitivity improvements of up to 20 \times observed for Vbg =+ 5~\V compared to Vbg = 0. The results have been used to calibrate numerical simulations that show the design space for using FDSOI variable capacitors (varactors) as passive wireless radiation dosimeters suitable for in vivo implantation. Simulation studies show that a design space exists to realize wireless sensors with both high quality factor (Q > 20 at 1 GHz) and good sensitivity (\Delta f/f = 0.12\% /\Gy). These results indicate the promise of FDSOI to realize a new, convenient class of in vivo dosimeters for radiation therapy. [ABSTRACT FROM PUBLISHER]

Graphene field effect transistors and capacitors that employ ultra-thin atomic layer deposited high-κ TiO2 dielectrics are demonstrated. Of the three TiO2 gate insulation schemes employed, the sequentially deposited HfO2:TiO2 gate insulator stack enabled the reduction of equivalent oxide thickness while simultaneously providing an ultra-thin gate insulation layer that minimized gate leakage current. The multilayer gate insulation scheme demonstrates a means for advanced device scaling in graphene-based devices. [ABSTRACT FROM AUTHOR]

Graphene’s unique optoelectronicproperties have been exploitedfor many photonic applications. Here, we demonstrate a single graphene-baseddevice that simultaneously provides efficient optical modulation andphotodetection. The graphene device is integrated on a silicon waveguideand is tunable with a graphene gate to achieve a near-infrared photodetectionresponsivity of 57 mA/W and modulation depth of 64% with GHz bandwidth.Simultaneous modulation of photocurrent and optical transmission hasbeen achieved, which may lead to unprecedented optoelectronic applications. [ABSTRACT FROM AUTHOR]

The radiation tolerance of strained Si/SiGe n-MODFETs is investigated, using 10 keV X-rays, 63 MeV high energy protons, and 4 MeV low energy protons. The effects of radiation exposure on two major device design parameters (LSD and LG) in T-gate Si/SiGe n-MODFETs devices are examined. A strong dependence on source-drain spacing is observed for both the DC and RF characteristics. A drift-diffusion TCAD framework is used for 2-D device simulations. We believe that the low energy protons damage the SiGe/strained-Si/SiGe lattice, leading to partial strain relaxation. The conduction band-offset (CBO) of the strained SiGe/Si heterojunction is lowered leading to higher gate current leakage. The presence of radiation-induced bulk traps in the unrelaxed SiGe layers on the device behavior is also investigated. [ABSTRACT FROM AUTHOR]

N-and p-MOSFETs have been fabricated in strained Si-on-SiGe-on-insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-on-insulator (SGOI) substrates. Mobility enhancement of 50% for electrons (with 15% Ge) and 15-20% for holes (with 20-25% Ge) has been demonstrated in SSOI MOSFETs. These mobility enhancements are commensurate with those reported for FETs fabricated on strained silicon on bulk SiGe substrates. [ABSTRACT FROM AUTHOR]

Graphene is an ideal material for spintronic devices due to its low spin-orbit coupling and high mobility. One of the most important potential applications of graphene spintronics is for use in neuromorphic computing systems, where the tunable spin resistance of graphene can be used to apply analog weighting factors. A key capability needed to achieve spin-based neuromorphic computing systems is to achieve distinct regions of control, where injected and detected spin currents can be tuned independently. Here, we demonstrate the ability to achieve such independent control using a graphene spin valve geometry where the injector and detector regions are modulated by two separate bottom gate electrodes. The spin transport parameters and their dependence on each gate voltage are extracted from Hanle precession measurements. From this analysis, local spin transport parameters and their dependence on the local gate voltage are found, which provide a basis for a spatially-resolved spin resistance network that simulates the device. The data and model are used to calculate the spin currents flowing into, through, and out of the graphene channel. We show that the spin current flowing through the graphene channel can be modulated by 30% using one gate and that the spin current absorbed by the detector can be modulated by 50% using the other gate. This result demonstrates that spin currents can be controlled by locally tuning the spin resistance of graphene. The integration of chemical vapor deposition (CVD) grown graphene with local gates allows for the implementation of large-scale integrated spin-based circuits. [ABSTRACT FROM AUTHOR]

We present a comprehensive study of the band alignments of two-dimensional (2D) semiconducting materials and highlight the possibilities of forming momentum-matched type I, II, and III heterostructures, an enticing possibility being atomic heterostructures where the constituent monolayers have band edges at the zone center, i.e., Γ valley. Our study, which includes the group IV and III-V compound monolayer materials, group V elemental monolayer materials, transition-metal dichalcogenides, and transition-metal trichalcogenides, reveals that almost half of these materials have conduction and/or valence band edges residing at the zone center. Using first-principles density functional calculations, we present the type of the heterostructure for 903 different possible combinations of these 2D materials which establishes a periodic table of heterostructures. [ABSTRACT FROM AUTHOR]

SnSe2 field-effect transistors fabricated using mechanical exfoliation are reported. Substrate-gated devices with source-to-drain spacing of 0.5 μm have been fabricated with drive current of 160 μA/μm at T = 300 K. The transconductance at a drain-to-source voltage of Vds = 2 V increases from 0.94 μS/μm at 300 K to 4.0 μS/μm at 4.4 K, while the field-effect mobility increases from 8.6 cm2/Vs at 300 K to 28 cm2/Vs at 77 K. The conductance at Vds = 50 mV shows an activation energy of only 5.5 meV, indicating the absence of a significant Schottky barrier at the source and drain contacts. [ABSTRACT FROM AUTHOR]