1. Monolithic Integration of InAs Quantum-Well n-MOSFETs and Ultrathin Body Ge p-MOSFETs on a Si Substrate.
- Author
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Yadav, Sachin, Tan, Kian Hua, Kumar, Annie, Goh, Kian Hui, Liang, Gengchiau, Yoon, Soon-Fatt, Gong, Xiao, and Yeo, Yee-Chia
- Subjects
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METAL oxide semiconductor field-effect transistors , *LOGIC circuits , *GALLIUM antimonide , *GALLIUM arsenide , *COMPLEMENTARY metal oxide semiconductors - Abstract
Integration of InxGa1–xAs n-MOSFETs and SiyGe1–y p-MOSFETs could be a key to realize future low-power and high-speed logic circuits. In this paper, monolithic integration of InAs n-MOSFETs and Ge p-MOSFETs on a Si substrate is reported. To address the challenge of integrating materials with large lattice mismatch (InAs and Ge on Si substrate), a sub-120-nm GaSb-on-GaAs buffer on a germanium-on-insulator (GeOI) starting substrate is employed. The strain resulting from the 7.78% lattice mismatch between the GaSb and GaAs layers is mainly relaxed via interfacial misfits at the GaSb/GaAs interface, enabling significant reduction in the buffer thickness. For device fabrication, a self-aligned gate last process flow with Si-CMOS-compatible modules is used. To realize raised source-drain device architecture, a combination of dry and digital etch processes is developed to etch InAs and Ge cap layers. Devices with channel thicknesses less than 5 nm and channel lengths less than 200 nm are realized for both n- and p-MOSFETs, with promising electrical characteristics. [ABSTRACT FROM PUBLISHER]
- Published
- 2017
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