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In this article, the authors present a new approach based on the hardware and software architecture using embedded Linux and field-programmable gate array for implementation of remote laboratories. It combines a set of software and hardware resources in the interest of offering a multidisciplinary low-cost open platform for engineering education. Thus, the proposed approach allows students to develop low-cost and easily programmable prototypes of electrical systems control, robotics, and other embedded devices that feature Internet connectivity, Input/output, networking, and operating systems. In the proposed work, the authors present a codesign solution with flexible hardware devices, providing characteristics of multipurpose use with many experimental devices, and fully configurable graphical user interface. The physical setup and communication principles of hardware architecture are based on two types of devices: the Beaglebone running embedded Linux operating system and the field-programmable logic gate array. The graphical user interface is designed as a web page based on HTML and PHP programming languages; this allows the teachers/students to control the system easily, parameterize, and observe the behavior of the controller/system remotely.

Industrial robots are integrated in the automatic assembly to reduce human errors and to lead time. In the meanwhile, vision system has an important role in the robotic guidance. The data transfer between the vision system and robots presents a great interesting challenge. This work focuses on the real-time control of a SCARA robot through multi-platforms software applications. The method of this design is based on Hue, Saturation and Value (HSV) color identification and a software model that provides the data transfer between different operating systems. The exchanged data needs synchronization and stability between the various operating systems. From the result, the proposed software solution can analyze the received data and safely send the feedback to the robot. This novel type of communication provides also a high precision and accuracy manner for the robotic arm.

The aim of this project is to develop a tiny and flexible hardware TCP/IP module. The module is so autonomous and so lightweight that can fits in low cost FPGA. In this project, the different communication layers responsible for robust and sturdy internet connectivity are investigated. Starting from a handful set of elementary idea, a customizable and basic hardware TCP/IP stack is designed. For this project, a bottom-up strategy is adopted. It starts by the Ethernet module up to the TCP unit.

The design of embedded control systems is rapidly change during the last decade. Guaranteeing the safety of these systems is a very challenging topic. It is possible to identify two main factors that are involved in the control of those systems: Hardware/Software (HW-SW) codesign and dynamic reconfiguration. Furthermore, the use of an embedded operating system associated with a functional module library is required for the establishment of an efficient co-design solution. This paper aims to propose an appropriate co-design methodology for closed loop DC motor control based on Field Programmable Gate Arrays (FPGA) and low cost platform Beaglebone board supported by a Linux operating system. The dynamic reconfiguration of the control system is provided by an embedded web server implemented on Beaglebone.

This paper presents the possibility to use cheap credit-card sized computer like Beaglebone board for realization of real-time motor control-namely the DC motor speed control based on PI-controller. It describes the design and implementation of software to determine the speed of the motor and feedback control. The software design integrates three modules which were developed as user space applications and kernel modules. The DC motor is equipped with an incremental encoder to define the speed and connected to Beaglebone board with designed interface. A graphic user interface for monitoring and control has been developed under embedded Linux web server implemented on Beaglebone to fix PI controller parameters (integral gain Ki, proportional gain Kp) and the set point.

This paper investigates the numerical issue of a discrete-time induction-motor emulator implementation. The stability analysis of the finite-word-length implementation shows a coupling between required word length and the sample rate. We propose specific guidelines to analyze this coupling and to estimate the required data word length for both signals and coefficients of the model. To respect algorithm requirements, an FPGA-based implementation was used for architecture development. The direct torque control is implemented to verify in real time the AC-motor emulator prototype.

Recently, the complexity of the embedded electrical systems is increasing due to the growing of industrial necessities. To handle with this complexity, the use of reconfigurable hardware/software codesign methodology using digital platforms becomes necessary. Reconfigurable methodology can be seen as an essential feature in motor control systems as it offers many advantages such as increased flexibility, low energy consumption. In these kind of systems, both hardware and software designs can be reconfigurated depending upon the designer requirements. This paper presents hardware/software codesign methodology with flexible hardware devices and configurable graphical user interface: the hardware architecture is based on field-programmable gate array and the software architecture is based on embedded Linux operating system running on Beaglebone. The user interface is designed as a graphical user interface developed on an emebdded server; this enables the user to access to the system rapidly, parameterize and observe the behavior of the controller.

This paper presents a grid-connection control strategy of doubly fed induction generator wind system based on the direct control of both a virtual torque and rotor flux of the generator. This control is achieved with no proportional-integral regulator and requires the measurement of only grid voltages, rotor currents, and rotor position. The same switching table is used for grid synchronization and for running process. A field-programmable-gate-array-based design of the proposed control is developed and tested on a 4-kW experimental prototype. Experimental results are provided to show the effectiveness of the fast and soft grid-connection method developed.

Smart grid technology is progressing worldwide. Various Countries are investing to transform their traditional power grid to Smart grid. They have started realigning their organization to support a Smart grid vision. At this initial stage some software models are required to quantify; evaluate, monitor the progress and plan for the realization of a smart grid. This paper provides a detailed description of the steps involved in the design of an embedded data acquisition based on Linux. Embedded board based on Linux operating system such as BeagleBone is used to develop a modern web page for data collection using PHP and Mysql.

This paper provides a detailed description of the steps involved in design of an embedded data acquisition based on Linux. Embedded board based on Linux operating system such as BeagleBone is used to develop a modern web page for data collection using PHP and Mysql.

Currently, the motor controllers need various functions such as real time control and communication capabilities with remote host computer. This paper presents a communication TCP/IP module to control a DC motor. Pulse Width Modulation was employed so as to drive the motor at the desirable speed. the control of the motor via PID controller in order to maintain the desired speed regardless of load as well as the wireless Ethernet communication between the microcontroller and the PC. A Human Machine Interface program was made to supervise the motor's speed performance and create a control unit to change the parameters.

The aim of this paper is to examine the advantages of using delta-operator to design a digital system emulator for the real-time Hardware-In-the-Loop (HIL) simulation of an AC drive application. A synchronous motor has been taken as a case study. To suit high accuracy and increase the realism of the test, the use of high sampling frequency is crucial. A comparison with a classical shift-operator based emulator is made in terms of precision and stability of the system. The continuous-time state-space model of the motor has been taken as reference. The influence of the sampling period and the fixed-point arithmetic is quantified. To achieve a high computational time, an FPGA target has been chosen for implementing the real-time emulator (RTE). The design and the functional validation of the developed FPGA-based hardware architecture are presented. Finally, an HIL validation of an FPGA-based hysteresis current controller for synchronous motor drive is achieved. This validation is carried out using the developed synchronous motor RTE based on delta-operator.

This paper presents a short state-of-the-art Field Programmable Gate Array (FPGA) technology. An efficient design methodology for designing FPGA-based controllers is also described. To illustrate the interest of this methodology, a complex sensorless algorithm for AC drives has been chosen. It consists in an Extended Kalman Filter (EKF), which is most of the time implemented in a DSP controller. In the last part of the paper, authors try to demonstrate all the benefits of using FPGAs for power electronic and drive applications. Two cases are discussed, the high demanding applications and the constrained switching frequency applications.

This paper investigates the numerical issue of a discrete-time induction-motor emulator implementation. The stability analysis of the finite-word length implementation shows a coupling between required word length and the sample rate. We propose specific guidelines to analyze this coupling and to estimate the required data word length for both signals and coefficients of the model. To respect algorithm requirements, a FPGA-based implementation was used for architecture development. The direct torque control is implemented to verify in real-time the AC-motor emulator prototype.

This paper deals with a real-time simulation (RTS) able to accurately reproduce an electrical system in real-time. The RTS proposed architecture is written in VHDL and implemented in a field programmable gate array (FPGA) device. Multi-sampling approach is adopted allowing a real-time functioning with different time-steps and different operating conditions with minimized lost of accuracy. The proposed concept is illustrated by the RTS of each of a three-phase RLE load performed with a very short time step of 2.5 mus, an inverter, the measurement system and the hysteresis current controllers. Comparison with experimental results shows the high performances of this RTS.

In this paper, authors present a FPGA-based implementation of direct torque and stator flux control (DTSFC) and direct torque and rotor flux control (DTRFC) with and without use of space vector modulation (SVM) for induction motor drives. Indeed, due to their similar structures but also their differences, this set of algorithms is a good example to show the effectiveness of a FPGA-based modular approach to implement sensorless control induction motor drives. Therefore, the chosen solution is based on a custom hardware architecture designed by assembling a set of building blocks. These blocks are tested and organized in a library of intellectual property (IP) modules for easy re-use. Each block is geared toward specific algorithm function (flux estimator, hysteresis controller...). Besides, a special attention is given to the algorithm refinement which allows finding the optimum fixed-point data word length. Finally experimental results are shown which validate the proposed approach.

This paper presents an efficient design methodology to develop IP-core functions in VHDL for control systems. This methodology is able to cope with different optimization constraints such as the reduction of both the development time and the execution time and the minimization of the consumed resources of the chip. Our approach uses the AAA methodology (algorithm architecture adequation), which allows to rapidly develop and optimize the implantation of the DFG (data flow graph) of an algorithm. In order to illustrate the efficiency of this methodology, the authors present the implantation of an antiwindup PI controller on a single field programmable gate array (FPGA) applied to the control of a DC/DC converter.