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A method of electro-thermal co-optimization design for the Gallium nitride (GaN) monolithic microwave integrated circuit (MMIC) power amplifier (PA) is introduced in this paper. Due to the self-heating effect of the GaN high electron mobility transistor (HEMT), it is necessary to pay attention to the influence of thermal resistance change on circuit performance when designing a high-power RF PA. For this purpose, a three-dimensional finite element analysis model of GaN multi-gate HEMT is developed. The thermal resistance and junction temperature of the device under a RF dynamic current are extracted by heat transfer simulation and can be substituted into the temperature node of the transistor model for PA circuit simulation design. To verify the proposed method, a Class AB MMIC PA was designed and tested using a 0.15-μm GaN-on-SiC process. Through the application of the above methods, the designed PA performance is optimized and achieves the performance of over 60% power-added efficiency (PAE) and 38 dBm saturation power (Psat) within a compact area of 1.6 mm × 2.2 mm. It is demonstrated that the proposed method can effectively improve the consistency of simulation results and measurement results, which can be a valuable reference for high-power MMIC PA design. [ABSTRACT FROM AUTHOR]

This review article investigates the current status and advances in Ku-band gallium nitride (GaN) high-electron mobility transistor (HEMT) high-power amplifiers (HPAs), which are critical for satellite communications, unmanned aerial vehicle (UAV) systems, and military radar applications. The demand for high-frequency, high-power amplifiers is growing, driven by the global expansion of high-speed data communication and enhanced national security requirements. First, we compare the main GaN HEMT process technologies employed in Ku-band HPA development, categorizing the HPAs into monolithic microwave integrated circuits (MMICs) and internally matched power amplifier modules (IM-PAMs) and examining their respective characteristics. Then, by reviewing the literature, we explore design topologies, major issues like oscillation prevention and bias circuits, and heat sink technologies for thermal management. Our findings indicate that silicon carbide (SiC) substrates with gate lengths of 0.25 μm and 0.15 μm are predominantly used, with ongoing developments enabling MMICs and IM-PAMs to achieve up to 100 W output power and 30% power-added efficiency. Notably, the performance of MMIC power amplifiers is advancing more rapidly than that of IM-PAMs, highlighting MMICs as a promising direction for achieving higher efficiency and integration in future Ku-band applications. This paper can provide insights into the overall key technologies for Ku-band GaN HPA design and future development directions. [ABSTRACT FROM AUTHOR]

In view of the high instantaneous bandwidth requirement of modern electronic countermeasures equipment, a 6~18 GHz ultra wideband T/R module with instantaneous bandwidth of 4 GHz is designed in this study. The MCM(Multi Chip Module) and ultrawideband signal transmission technologies are used to realize the requirements of high integration, miniaturization and modularization of T/R components. The structure of T/R compoments, the index budget of transceiver channel, the simulation of broadband signal transmission characteristics and the design of electromagnetic compatibility are described in detail. The test results show that the T/R module has a good performance in the 12 GHz operating bandwidth, the transmit power is greater than 35 dBm, the receive gain is greater than 20 dB, the noise factor is less than 5 dB, and the total delay time is up to 762 ps. [ABSTRACT FROM AUTHOR]

This paper proposes the design of 1.2-1.3 GHz, 2.5-3 GHz and 5.4-5.8 GHz MMIC voltage variable attenuator (VVA) realized using 0.25 μm GaAs pHEMT technology. It is a wideband voltage variable attenuator as it covers entire radar frequency bands. It provides a minimum attenuation of 2 dB in L and S-Band and 3 dB in C-Band and maximum attenuation of 72 dB in L-Band, 60 dB in S-Band and 47 dB in C-Band with attenuation flatness of 3 dB in L and S-Band and 1 dB in CBand. The phase response of the attenuator is also shown in this paper. The attenuator is perfectly matched with source and load impedances. It shows full-band stability. By convention, noise figure is equal to attenuation. The novelty of this proposed design is source controlled attenuator using gm-reduction and double active termination techniques with noise figure less than attenuation. These techniques increase the dynamic range of attenuation and reduce noise figure also. The double active termination technique also contributes in reducing noise figure below each attenuation level. It is necessary to keep noise figure below attenuation because the attenuator will be used in RF front-end of radar receiver. By keeping noise figure below attenuation, sensitivity of radar receiver will improve. Input 1 dB compression point of the proposed attenuator at maximum attenuation are at -4.3 dBm in L-Band, -5.9 dBm in S-Band and -5.3 dBm in C-Band and OIP3 at minimum attenuation are at -4.4 dBm in L-Band, -4.6 dBm in S-Band and -5 dBm in C-Band. The ideal and post-layout simulation results are presented in this paper. Figure of merit of the proposed attenuator is 280 in LBand, 70.3 in S-Band and 78.54 in C-Band. The attenuator can be used in single target tracking radar as well as in T/R module of AESA radar. [ABSTRACT FROM AUTHOR]

A millimeter-wave (mmWave) gallium nitride (GaN) high-power amplifier (HPA) monolithic microwave-integrated circuit (MMIC) was implemented, considering a source via effect. In this paper, we introduce guidelines for designing GaN HPA MMICs, from device sizing to meeting high-power specifications, power matching considering source via effects, schematic design of three-stage amplifier structures, and electromagnetic (EM) simulation. Based on the results of load pull simulation and small-signal maximum stable gain (MSG) simulation, the GaN high-electron-mobility transistor (HEMT) size was selected to be 8 × 70 μm. However, since the source via model provided by the foundry was significantly different from the EM results, it was necessary to readjust the power matching considering this. Additionally, when selecting the source via size, the larger the size, the easier the matching, but since the layout of the peripheral bias circuit is not possible, a compromise was required considering the actual layout. To prevent in-band oscillation, an RC parallel circuit was added to the input matching circuit, and low-frequency oscillation was solved by adding a gate resistor on the PCB module. The proposed PA was fabricated with a commercial 0.1 μm GaN HEMT MMIC process. It exhibited 38.56 to 39.71 dBm output power (Pout), 14.2 to 16.7 dB linear gain, and 14.1% to 18.2% power-added efficiency (PAE) in the upper Ka band. The fabricated GaN power amplifier MMIC shows competitive Pout in the upper Ka band above 33 GHz. [ABSTRACT FROM AUTHOR]

Abstract This article presents a 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital converter. By adopting a new auto‐zero scheme, a calibration‐free four‐stage ring residue amplifier with a small offset cancellation capacitor is proposed. In addition, the coarse‐analogue‐to‐digital converter of the second stage is embedded into the amplification phase, which relaxes the comparison periods of the first and second stages by 25.0% and 17.4%, respectively. Post‐simulated in 28‐nm CMOS technology with a 0.9 V supply, the analogue‐to‐digital converter achieves 62.2 dB SNDR and 78.1 dB SFDR. It consumes 8.45 mW with an on‐chip reference voltage buffer, resulting in Schreier's figure of merit (FoMS) of 166.9 dB.

This article presents a 12b 500MS/s successive‐approximation‐register‐assisted pipeline analogue‐to‐digital converter. By adopting a new auto‐zero scheme, a calibration‐free four‐stage ring residue amplifier with a small offset cancellation capacitor is proposed. In addition, the coarse‐analogue‐to‐digital converter of the second stage is embedded into the amplification phase, which relaxes the comparison periods of the first and second stages by 25.0% and 17.4%, respectively. Post‐simulated in 28‐nm CMOS technology with a 0.9 V supply, the analogue‐to‐digital converter achieves 62.2 dB SNDR and 78.1 dB SFDR. It consumes 8.45 mW with an on‐chip reference voltage buffer, resulting in Schreier's figure of merit (FoMS) of 166.9 dB. [ABSTRACT FROM AUTHOR]

Receiver and transmitter monolithic microwave integrated circuit (MMIC) multifunction chips (MFCs) for active phased-array antennas for Ka-band satellite communication (SATCOM) terminals have been designed and fabricated using a 0.15-μm GaAs pseudomorphic high-electron mobility transistor (pHEMT) process. The MFCs consist of four-channel radio frequency (RF) paths and a 4:1 combiner. Each channel provides several functions such as signal amplification, 6-bit phase shifting, and 5-bit attenuation with a 44-bit serial-to-parallel converter (SPC). RF pads are implemented on the bottom side of the chip to remove the parasitic inductance induced by wire bonding. The area of the fabricated chips is 5.2 mm X 4.2 mm. The receiver chip exhibits a gain of 18 dB and a noise figure of 2.0 dB over a frequency range from 17 GHz to 21 GHz with a low direct current (DC) power of 0.36 W. The transmitter chip provides a gain of 20 dB and a 1-dB gain compression point (P1dB) of 18.4 dBm over a frequency range from 28 GHz to 31 GHz with a low DC power of 0.85 W. The P1dB can be increased to 20.6 dBm at a higher bias of +4.5 V.

This paper describes a high-frequency shunt feedback amplifier. A new design procedure is presented based on practical design steps as well as theoretical aspects, such as sizing the transistor, stabilisation, and selecting the values of feedback elements. The amplifier is designed and fabricated using 0.15 μm GaAs technology. It operates in the 7–10 GHz frequency range, with a small signal gain of 11.5 $ \pm $ ± 0.5 dB and input and output return losses of less than 6 dB and 7 dB, respectively. Furthermore, for 1 dB and 3 dB output compression points, the maximum measured values are 23.1 dBm and 23.9 dBm, respectively. Besides, the maximum measured value for Power Added Efficiency (PAE) for 1 dB output compression is 27.13% and 48.6% for 3 dB output compression. In addition, the measured Noise Figure (NF) in the frequency band of interest ranges from 3.7 to 4.1 dB. The chip area of the fabricated amplifier is 1.01 mm2. [ABSTRACT FROM AUTHOR]

This article presents the design, development and realization of miniaturized C-Band transmit receive integrated module (TRiM) for Earth observation satellite-04 (EOS-04) synthetic aperture radar (SAR) payload. Stateof-the-art low temperature co-fired ceramic (LTCC) technology is used for localized hermetic sealing of bare microwave monolithic integrated circuits (MMICs). A miniaturization of ~35% is achieved in this TRiM as compared to Radar Imaging Satellite-1 TR module, enabling >100 kg reduction in the overall EOS-04 SAR payload mass. The design of LTCC module is done using Ferro A6M-E and DuPont 951 based LTCC processes. Two such dual polarized LTCC TR modules along with in situ TR controller are housed inside a single TRiM housing. More than 13,000 MMICs are fabricated indigenously and utilized for the development of the TRiMs. About 350 such TRiMs have been mass produced through extensive participation of various Indian industries leading to the development and space qualification of several state-of-the-art processes. Measured transmit output power of >40 dBm, transmit gain >51 dB, receive gain >36 dB, noise figure <4.25 dB, phase error <4.5°, amplitude error <0.4 dB have been achieved for a 250 MHz wide bandwidth over 350 mass produced TRiMs. [ABSTRACT FROM AUTHOR]

This study presents a novel approach for optimizing the parameters of monolithic microwave integrated circuit (MMIC) functional units using machine‐learning techniques and multi‐objective optimization algorithms. We utilize advanced machine‐learning methods, including random forest, artificial neural networks (ANNs), and recurrent neural networks (RNNs), to construct highly accurate models that predict the performance of these units. These models are subsequently integrated with a multi‐objective optimization algorithm, specifically the multi‐objective particle swarm optimization (MOPSO), to generate inverse design solutions for both the geometric designs of the units and the fabrication parameters of the heterogeneous integration process. Our approach, which has been validated through chip fabrication and testing, has demonstrated its robustness as a tool for achieving optimal MMIC designs. It not only reduces the design time but also enhances the manufacturability of MMICs, thereby opening new avenues in microwave and RF circuit design. [ABSTRACT FROM AUTHOR]

Receiver and transmitter monolithic microwave integrated circuit (MMIC) multifunction chips (MFCs) for active phased‐array antennas for Ka‐band satellite communication (SATCOM) terminals have been designed and fabricated using a 0.15‐μm GaAs pseudomorphic high‐electron mobility transistor (pHEMT) process. The MFCs consist of four‐channel radio frequency (RF) paths and a 4:1 combiner. Each channel provides several functions such as signal amplification, 6‐bit phase shifting, and 5‐bit attenuation with a 44‐bit serial‐to‐parallel converter (SPC). RF pads are implemented on the bottom side of the chip to remove the parasitic inductance induced by wire bonding. The area of the fabricated chips is 5.2 mm × 4.2 mm. The receiver chip exhibits a gain of 18 dB and a noise figure of 2.0 dB over a frequency range from 17 GHz to 21 GHz with a low direct current (DC) power of 0.36 W. The transmitter chip provides a gain of 20 dB and a 1‐dB gain compression point (P1dB) of 18.4 dBm over a frequency range from 28 GHz to 31 GHz with a low DC power of 0.85 W. The P1dB can be increased to 20.6 dBm at a higher bias of +4.5 V. [ABSTRACT FROM AUTHOR]

This paper presents an ultra-wideband transformer feedback (TFB) monolithic microwave integrated circuit (MMIC) power amplifier (PA) developed using a 0.25 μm gallium nitride (GaN) process. To broaden the bandwidth, a drain-to-gate TFB technique is employed in this PA design, achieving a 117% relative −3 dB bandwidth, extending from 5.4 GHz to 20.3 GHz. At a 28 V supply, the designed PA circuit achieves an output power of 25.5 dBm and a 14 dB small-signal gain in the frequency range of 6 to 19 GHz. Within the 6 to 19 GHz frequency range, the small-signal gain exhibits a flatness of less than 0.78 dB. The PA chip occupies an area of 1.571 mm2. This work is the first to design a power amplifier with on-chip transformer feedback in a compound semiconductor MMIC process, and it enables the use of the widest bandwidth power amplifier on-chip transformer matching network. [ABSTRACT FROM AUTHOR]

This paper employs the 0.2 μm ETRI GaN HEMT process on SiC to develop a Ku-band GaN low-noise amplifier monolithic microwave integrated circuit (MMIC) characterized by high-input power robustness for radar transceiver modules. A source degeneration inductor is employed to obtain the proposed amplifier’s stable operation and the compromised impedance trajectory of the maximum available gain and minimum noise figure. The analysis results show simultaneous gain and noise impedance matching, achieved using only a small number of passive elements. Furthermore, the proposed low-noise amplifier MMIC secures a linear gain of 21.3–22.6 dB, an input return loss of 19.6–21.4 dB, and a noise figure of 1.7–1.8 dB in the 15–16 GHz frequency range. It also exhibits an input 1 dB compression point of 0.4–1.5 dBm in the single-tone power test, and an input third-order intercept point of 5.8–10.1 dBm within the 15–16 GHz frequency range in the two-tone intermodulation distortion test.

This paper proposes a reconfigurable ultra-wideband power amplifier based on reconfigurable technology. The power amplifier consists of a gain module and reconfigurable bias circuits. The gain module is based on the structure of distributed amplifiers and innovates with peaking inductance and cascode structure to increase the output power and gain of the power amplifier. In addition, unlike the off-chip bias used in most distributed amplifiers, we have designed on-chip bias circuits through reconfigurable technology, which effectively improves the efficiency of the power amplifier and reduces the size of the chip. The power amplifier is designed to operate in the 0.1 to 16GHz, and it is capable of providing over 30dBm of output power in the operating band, with a stable gain of around 16dB and Power-Added-Efficiency (PAE) of 21%~32%.

Ice clouds are poorly constrained in current global climate and weather models and have been used as a tuning parameter in the models to balance radiation budget at the top of atmosphere and precipitation at the surface. Sub-millimeter-wave (Submm) remote sensing can fill the sensitivity gap of cloud ice observations between visible/infrared (VIS/IR) and microwave (MW) frequencies. The added value from submm-wave bands has been recognized for achieving a better understanding of cloud, convection and precipitation (CCP) processes. Recent satellite observations at microwave frequencies showed promising results that additional information on cloud microphysical properties (e.g., ice particle shape and orientation) can be inferred from V-pol and H-pol radiances. Motivated by the added value from cloud polarimeters, a compact SWIRP (Submm-Wave and Long-Wave InfraRed Polarimeter) was developed under NASA's Instrument Incubator Program (IIP) to reduce instrument size, weight, power (SWaP) for future Earth science missions. Low-SWaP sensors like SWIRP will allow the cost-effective implementation of a distributed observing system to study fast cloud processes with the needed spatiotemporal sampling.

This paper presents the construction and measurement of a phased array BPSK transmitter system operating at 246 GHz with tested data rates of up to 32 Gbit s-1. The system is built using custom monolithic microwave integrated circuit (MMIC) and a novel packaging solution. The construction showcases the flexibility in the chosen approach, paving a path for future systems. It is the first TX array with significant beam steering capabilities tested above a pure antenna pattern stage above 200 GHz. The system is tested for realistic usage scenarios. Bit-error-rate (BER) measurements are used to showcase real-world usability. BER over angle and BER over steering angle are measured to verify the operation of the transmitter.

This article compares two SiGe Colpitts quadrature voltage-controlled oscillators (QVCO) with different coupling techniques in the low E-Band, intended to be used as signal sources for push-push frequency doublers. The first QVCO is based on a cross-coupled tail-current topology, while the second is based on a fundamental active coupling network. The cross-coupled QVCO has a center frequency of 64.3 GHz and a bandwidth of 2.5 GHz. This circuit realization provides up to 12.2 dBm output power per channel and has a power consumption of 385 mW, resulting in a dc-to-RF efficiency of 8.6%. The phase noise of this oscillator at 1 MHz offset frequency is as low as −105 dBc/Hz. The fundamentally coupled QVCO has a center frequency of 67 GHz with a bandwidth of 3.9 GHz. It provides 13.1 dBm output power per channel while consuming 410 mW of power, resulting in a dc-to-RF efficiency of 9.9%. The oscillator's phase noise at 1 MHz offset frequency is as low as −105.2 dBc/Hz. In addition to the presented circuits, this article introduces a method to measure the relative phase error of quadrature signals utilizing a vector network analyzer. This method is verified with measurements of the developed QVCOs.

This review article investigates the current status and advances in Ku-band gallium nitride (GaN) high-electron mobility transistor (HEMT) high-power amplifiers (HPAs), which are critical for satellite communications, unmanned aerial vehicle (UAV) systems, and military radar applications. The demand for high-frequency, high-power amplifiers is growing, driven by the global expansion of high-speed data communication and enhanced national security requirements. First, we compare the main GaN HEMT process technologies employed in Ku-band HPA development, categorizing the HPAs into monolithic microwave integrated circuits (MMICs) and internally matched power amplifier modules (IM-PAMs) and examining their respective characteristics. Then, by reviewing the literature, we explore design topologies, major issues like oscillation prevention and bias circuits, and heat sink technologies for thermal management. Our findings indicate that silicon carbide (SiC) substrates with gate lengths of 0.25 μm and 0.15 μm are predominantly used, with ongoing developments enabling MMICs and IM-PAMs to achieve up to 100 W output power and 30% power-added efficiency. Notably, the performance of MMIC power amplifiers is advancing more rapidly than that of IM-PAMs, highlighting MMICs as a promising direction for achieving higher efficiency and integration in future Ku-band applications. This paper can provide insights into the overall key technologies for Ku-band GaN HPA design and future development directions.

A 2–26.5GHz broadband amplifier monolithic microwave integrated circuit (MMIC) based on the 0.15 μm GaN high electron mobility transistor process has been developed. The broadband amplifier adopts a two‐stage distributed amplifier cascade structure, which improves the gain of the broadband amplifier. Further, the capacitive coupling is used to improve the gain bandwidth product of the power amplifier. To improve the output return loss of the wideband amplifier, a tuning stub is introduced at the output of the circuit. The on‐wafer measurement results show that the amplifier has a gain greater than 18 dB, gain flatness less than ±1.4 dB, and saturated output power >35 dBm with a >13% power added efficiency in the whole band. [ABSTRACT FROM AUTHOR]

Abstract A novel chip to double‐ridge rectangular waveguide transition, with an ultra‐broadband operation bandwidth exceeding three standard rectangular waveguide (WR) bands of WR15, WR12, and WR10 is demonstrated for the first time in this letter, to the best of authors' knowledge. This bandwidth is achieved by coupling the microstrip mode directly to the fundamental TE mode of the waveguide. A unique feature of this transition is that the transition design can be implemented on substrates with a high dielectric constant, which makes it suitable for integration with monolithic microwave integrated circuits (MMICs). A back‐to‐back transition is realized using a split‐block assembly and 254 μm thickness alumina substrate (εr=9.8 at 80 GHz). The latter acts as an MMIC substrate substitute, including a tapered microstrip and a 50 Ω coplanar waveguide pad for probe‐based measurement. Two novel mechanical assembly concepts, involving die‐attach‐foil and indium solder, are used to build two split‐block prototypes. The simulated and measured S‐parameters of the transition are demonstrated from 35 to 125 GHz.

This paper describes the design aspects of high reliable packages including package resonance, material selection, and feed-through design to match the die designer specifications. Design, simulation and thin film fabrication of 50Ω microstrip line on a 10 mil Al2O3 substrate suitable for MMIC assembly are also presented. Al2O3 substrate is taken because of lower transitional losses at the seal ring of the package, lower leakage and best suitable for hermiticity. Strip line design, study and the input-output transitions between two ports is analysed and optimized. Evidence of package self resonating mode study carried out theoretically and similar is simulated by using CST microwave studio. Package physical model analysis is carried out on a metal-ceramic package (MCP) which is suitable for embedding an amplifier of 20 dB gain and low power in c-band, 35 dB gain and low noise figure in s-band and 28 dB typical gain in x-band. Packaging effects in each case is analysed and optimised to meet the design requirements. With systematic ideas, the complete package modelling, characterization and MMICs packaging are carried out as per the reliability standards for space application. This package is sealed using the hermetic sealing technique to assure no leakage when subjected to the environmental test conditions like operating temperature test, active burn-in test for 240 h and steady-state life test for 1000 h to check MMIC behaviour under overstress conditions. Packaged module RF performances are noted at pre-subjected and post-subjected temperature conditions. Drifts are calculated at both temperature stages. [ABSTRACT FROM AUTHOR]

In this study, a 3-stage power amplifier monolithic microwave integrated circuits (MMIC) in the Ku-band frequency range is designed using a 150-nanometer GaN-HEMT process. High efficiency is achieved by employing a high-pass structure at the output stage to reduce the circuit size and selecting a high output impedance at the driver amplification stage. When measuring the power amplifier using a 0.5 ms period and 10 % duty cycle pulse continuous wave (CW) signal, the results indicate a saturated power of 37∼38 dBm in the 13∼16 GHz range with a power added efficiency (PAE) of 34∼41 % and a power gain of 26∼30 dB. The power amplifier is sized 3.6×1.1 mm², demonstrating suitability for use in the transmission section of satellite communication modules. [ABSTRACT FROM AUTHOR]

This paper presents an ultra-wideband transformer feedback (TFB) monolithic microwave integrated circuit (MMIC) power amplifier (PA) developed using a 0.25 μm gallium nitride (GaN) process. To broaden the bandwidth, a drain-to-gate TFB technique is employed in this PA design, achieving a 117% relative −3 dB bandwidth, extending from 5.4 GHz to 20.3 GHz. At a 28 V supply, the designed PA circuit achieves an output power of 25.5 dBm and a 14 dB small-signal gain in the frequency range of 6 to 19 GHz. Within the 6 to 19 GHz frequency range, the small-signal gain exhibits a flatness of less than 0.78 dB. The PA chip occupies an area of 1.571 mm2. This work is the first to design a power amplifier with on-chip transformer feedback in a compound semiconductor MMIC process, and it enables the use of the widest bandwidth power amplifier on-chip transformer matching network.

A novel chip to double‐ridge rectangular waveguide transition, with an ultra‐broadband operation bandwidth exceeding three standard rectangular waveguide (WR) bands of WR15, WR12, and WR10 is demonstrated for the first time in this letter, to the best of authors' knowledge. This bandwidth is achieved by coupling the microstrip mode directly to the fundamental TE mode of the waveguide. A unique feature of this transition is that the transition design can be implemented on substrates with a high dielectric constant, which makes it suitable for integration with monolithic microwave integrated circuits (MMICs). A back‐to‐back transition is realized using a split‐block assembly and 254 μm$\umu {\rm {m}}$ thickness alumina substrate (εr=9.8$\varepsilon _{\text{r}}=9.8$ at 80 GHz). The latter acts as an MMIC substrate substitute, including a tapered microstrip and a 50 Ω$\Omega$ coplanar waveguide pad for probe‐based measurement. Two novel mechanical assembly concepts, involving die‐attach‐foil and indium solder, are used to build two split‐block prototypes. The simulated and measured S‐parameters of the transition are demonstrated from 35 to 125 GHz. [ABSTRACT FROM AUTHOR]

Abstract Millimetre wave (mmWave) has been a popular research topic in recent years. Termination loads are useful for RF components and integrated circuits. Commercially available terminators are expensive and not easily applicable for integration to MMICs. In this letter, a wideband, high‐performance, and cost‐effective microstrip termination load is proposed based on the combination of a printed monopole antenna and an absorber sheet. The results show an excellent matched termination between 20 and 67 GHz that can be used as integrated with microstrip lines in RF circuits and MMICs and as loaded dummy ports for test and measurements for mmWave applications. The proposed high‐quality termination is compact and cost‐effectively competitive with commercial products.

Abstract To improve the RX‐mode isolation of asymmetric T/R switches, a new circuit topology is proposed. The proposed asymmetric T/R switch topology features a second‐order band‐stop filter in its TX path, which extends the bandwidth of isolation in the RX mode. Based on the proposed topology, a Q‐band asymmetric T/R switch is designed and implemented in a 0.15‐µm GaAs pHEMT technology. Measured isolation in the RX mode is greater than 18.4 dB from 31.7 to 46.3 GHz, corresponding to a 1.46:1 bandwidth.

A compact broadband 12 W power amplifier with broadband matching networks is presented. Transistors connected in parallel are used to synthesize the high power. Input, interstage, and output matching networks are also properly designed to meet the requirement of the broadband application. The broadband high power amplifier (HPA) was fabricated using a 0.15‐μm gallium nitride (GaN) HEMT technology, with a maximum saturated measured output power of 43 dBm from 6 to 18 GHz. The measured power added efficiency exceeds 20% in the whole interested band. The proposed HPA also has a compact size of 3.1 mm × 2.96 mm. [ABSTRACT FROM AUTHOR]

This paper focuses on the design aspects of the key components for a scalable phased-array system over the 200 GHz frequency range. A high-gain phase shifter chain for 220 to 240 GHz frequency range and a high-gain power amplifier (PA) with a high output power are designed in a 0.13- $\mu \text{m}$ SiGe BiCMOS technology. The phase shifter chain includes a low-noise amplifier (LNA), a vector modulator phase shifter (PS), and a gain-enhancing amplifier. The LNA is a five-stage cascode design. The vector modulator core is realized by two variable gain amplifiers based on the Gilbert cell architecture. A four-stage cascode design is used for the gain-enhancing amplifier. The phase shifter chain shows a measured gain of 18 dB at 230 GHz with a $360 {\mathrm { ^{\circ}}}$ phase tuning range and more than 10 dB of gain control. The chip achieves a minimum measured noise figure of 11.5 dB at 230 GHz and shows a wideband noise characteristic. The complete phase shifter chain chip consumes a dc power of 153 mW and occupies a 1.41 mm2 area. A high-power PA that is critical for a large phased-array system is designed. This paper presents a unique 4-way power combining technique utilizing a differential quadrature coupler. The realized balanced PA occupies an area of 0.67 mm2 and shows a measured peak gain of 21 dB at 244 GHz. The PA consumes 819 mW of dc power and delivers a maximum saturated output power $(P_{sat})$ of 7.1 dBm at 244 GHz and more than 4.3 dBm of $P_{sat}$ from 230 to 255 GHz.

This paper gives an overview of published results with GaN MMICs for millimeter-wave front ends at frequencies above 60 GHz, including power and low-noise amplifiers, switches, phase shifters, frequency multipliers and oscillators. Some design methods and demonstrated experimental results obtained at W band from MMICs fabricated in a 40-nm GaN on 50--$\mu$m SiC process are then presented. These include 75 to 110 GHz power amplifiers with 20–27 dBm output power and 10–17 dB gain, switches with 2 dB insertion loss and 20 dB isolation, and continuous phase shifters with 2–11 dB loss and 0$^\circ$–90$^\circ$ of tunable phase shift. Additional MMICs include frequency doublers and triplers, oscillators, circulators and mixers, designed for higher levels of on-chip integration towards a W-band front end.

In this paper, using the 0.2 μm ETRI GaN HEMT process, we developed a C-band GaN dual-feedback low-noise amplifier MMIC for an RF receiver module that requires high-input power robustness. By applying a feedback microstrip line at the source of the transistor and series resistor-capacitor (RC) feedback between the gate and the drain of the transistor, we obtained stable amplifier operation and a compromised impedance trace for both input impedance matching and noise matching while suppressing performance degradation of the maximum available gain and minimum noise figure. The developed low-noise amplifier MMIC, which implements simple matching circuits by using biasing elements as matching elements, had a linear gain of more than 21.4 dB and a noise figure of less than 1.91 dB in the wide bandwidth of 4.3–7.4 GHz. Under the single-tone power test, the low-noise amplifier MMIC had an output P1dB of 14.3–20.1 dBm, and the two-tone intermodulation distortion measurement exhibited an input third-order intercept point (IIP3) of 2.2–5.6 dBm in the same frequency range as the above.

In this study, a power amplifier, which is an essential component, was implemented for an RF system of a 5G FR2 band base station. The design was verified using NP15-00 0.15-μm-gate GaN-on-SiC HEMT process (Win Semiconductors, Taiwan) with a high power density and excellent frequency characteristics for use in 5G base stations. The manufactured power amplifier integrated circuit was measured in the form of a balanced amplifier using a Lange coupler to improve the input and output reflection characteristics. The measurement results were a small signal gain of 18 dB, output power of 9 W, power-added efficiency of 25 %, and a size of 3.6 mm×3.0 mm² within the frequency range of 27∼29 GHz. [ABSTRACT FROM AUTHOR]

In this paper, two high efficiency monolithic microwave integrated circuits (MMICs) are demonstrated using NANOTAM's in-house Ka -band fabrication technology. AlGaN/GaN HEMTs with 0.2 ${\rm \mu}$ m gate lengths are characterized, and an output power density of 2.9 W/mm is achieved at 35 GHz. A three-stage driver amplifier MMIC is designed, which has a measured gain higher than 19.3 dB across the frequency band of 33–36 GHz. The driver amplifier exhibits 31.9 dB output power and 26.5% power-added efficiency (PAE) at 35 GHz using 20 V supply voltage with 30% duty cycle. Another two-stage MMIC is realized as a power amplifier with a total output gate periphery of 1.8 mm. The output power and PAE of the power amplifier are measured as 3.91 W and 26.3%, respectively, at 35 GHz using 20 V supply voltage with 30% duty cycle. The high efficiency MMICs presented in this paper exhibit the capabilities of NANOTAM's 0.2 $\rm\mu$ m AlGaN/GaN on SiC technology. [ABSTRACT FROM AUTHOR]

Millimetre wave (mmWave) has been a popular research topic in recent years. Termination loads are useful for RF components and integrated circuits. Commercially available terminators are expensive and not easily applicable for integration to MMICs. In this letter, a wideband, high‐performance, and cost‐effective microstrip termination load is proposed based on the combination of a printed monopole antenna and an absorber sheet. The results show an excellent matched termination between 20 and 67 GHz that can be used as integrated with microstrip lines in RF circuits and MMICs and as loaded dummy ports for test and measurements for mmWave applications. The proposed high‐quality termination is compact and cost‐effectively competitive with commercial products. [ABSTRACT FROM AUTHOR]

To improve the RX‐mode isolation of asymmetric T/R switches, a new circuit topology is proposed. The proposed asymmetric T/R switch topology features a second‐order band‐stop filter in its TX path, which extends the bandwidth of isolation in the RX mode. Based on the proposed topology, a Q‐band asymmetric T/R switch is designed and implemented in a 0.15‐µm GaAs pHEMT technology. Measured isolation in the RX mode is greater than 18.4 dB from 31.7 to 46.3 GHz, corresponding to a 1.46:1 bandwidth. [ABSTRACT FROM AUTHOR]

Thermomechanical analysis of monolithic microwave integrated circuit (MMIC) packaging is essential to guarantee the reliability of radio frequency/microwave applications. However, a method for fast and accurate analysis of MMIC packaging structures has not been developed. Here, a machine learning (ML)‐based solution for thermomechanical analysis of MMIC packaging is demonstrated. This ML‐based solution analyzes temperature and thermal stresses considering key design parameters, including material properties, geometric characteristics, and thermal boundary conditions. Finite element simulation with the Monte Carlo method is utilized to prepare a large dataset for supervised learning and validation of the ML solution, and a laser‐assisted thermal experiment is conducted to verify the accuracy of the simulation. After data preparation, regression tree ensemble and artificial neural network (ANN) learning models are investigated. The results show that the ANN model accurately predicts the outcomes with extremely low computing time by analyzing the high‐dimensional dataset. Finally, the developed ML solution is deployed as a web application format for facile approaches. It is believed that this study will provide a guideline for developing ML‐based solutions in chip packaging design technology. [ABSTRACT FROM AUTHOR]

A 60 GHz power amplifier (PA) monolithic microwave integrated circuit (MMIC) with +28 dBm output power is designed in an enhancement-mode 0.15 μm GaAs pseudomorphic high-electron-mobility transistor (pHEMT) technology. A two-stage topology and a four-way power combining technique are adopted to achieve a high power gain, high output power, and high linearity. Transistor-level circuit and layout designs are developed, and the circuit performances are verified through three-dimensional electromagnetic simulations. The designed PA MMIC exhibits a saturated output power of +28.4 dBm, output-referred 1-dB gain compression point of +28 dBm, power gain of +8.1 dB, and power added efficiency of 29.3 %. S-parameter simulations show that the small-signal gain is +8.1 dB, and the operating bandwidth is between 55.7 and 63.1 GHz, with a fractional bandwidth of 12.3 %. The supply voltages are 4 V for the drain and 0.6 V for the gate. The positive-only supply voltages resulting from the enhancement-mode pHEMT simplify the supply voltage network compared with the conventional depletion-mode pHEMT design. The layout die size of the PA MMIC is 1.99×1.62 mm², and the power density performance of 214 mW/mm² is satisfactory. [ABSTRACT FROM AUTHOR]

In this paper, a novel broadband lumped-element quadrature hybrid MMIC for interferometric correlation radiometer is proposed. First, the cause of the bandwidth limitation in the lumped-element branch-line coupler is analyzed, which is the two identical parallel branches have the same frequency response leading to reinforced resonance and narrow band. In order to reduce such unfavorable superposition effect, parallel branches with opposite frequency responses are used, which exhibits the characteristic similar to rat-race coupler. To realize a quadrature hybrid, a phase-shifting network is cascaded to the rat-race coupler, and the bandwidth is further extended by compensating the passband phase trend and optimizing the inter-stage matching of the two parts. Finally, to facilitate the application, the quadrature hybrid is combined with a variable gain amplifier to implement an integrated MMIC based upon 0.15 $\mu {\mathrm{ m}}$ GaAs pHEMT process, and the size of the hybrid part is $1.2\times 1.4$ mm2. Within the frequency range of 3.8~8.5 GHz (75% fractional bandwidth), the amplitude and phase imbalance are less than 0.5 dB and 2.6°. All reflections and isolations are better than 16.4 dB. The measured results verify the design theory and illustrate that the lumped-element quadrature hybrid is suitable for compact broadband circuit applications.

This work presents a novel sensor packaging and a novel transition concept for radar applications above 150 GHz based on glass material. By using laser induced deep etching (LIDE) technology, glass vias and cavities are fabricated without degrading the mechanical stability of glass, as micro-cracks are completely avoided. Especially at high millimeter wave (mm-wave) frequencies, precise structuring on low dielectric loss materials and a high integration density are essential for low loss transitions. In this paper, an ultra compact FMCW radar monolithic microwave integrated circuit (MMIC) at 160 GHz is used to demonstrate this packaging technology. In addition, the high frequency signal is guided by a low loss transition to a deposed antenna via a dielectric waveguide (DWG) providing the antenna front end with mechanical flexibility. Thus, using plated through glass vias (TGVs) and a circulating solder ring, the package is hermetically sealed. The optical transparent glass package has a size of only ${5.8}\,\rm {mm}\times {4.4}\,\rm {mm}\times {0.9}\,\rm {mm}$. A minimum measured insertion loss of 2.85 dB at 162 GHz from chip to DWG is achieved. The complete radar system with a range resolution of 12 mm is demonstrated via radar measurement.

In this article, we propose a matching network design algorithm based on the segmentation of the real and imaginary part of optimum source impedance curve with respect to space variable x and frequency ω, respectively. The impedance curve (comprising of real and imaginary parts) is approximated as a collection of n linear segments, represented by the weighted sum of n semi‐infinite linear functions. Using the numerical method, optimum weight vectors that maximize transducer power gain are obtained to model the real and imaginary parts of the source impedance curve. We get the values of optimum weight vectors and the rational input impedance function for the matching network, which are then synthesized in the desired topology by a continued partial fraction. Experimentally, we validate the novelty of the proposed method by designing matching networks of a wideband custom monolithic microwave integrated circuit (MMIC) low noise amplifier (LNA) in 1.3–2.3 GHz frequency band. The measured results of the designed LNA are significantly close to the simulated results. We bias our LNA at (5 V, 150 mA) and achieve a maximum noise figure of 1.25 dB, OP1dB of 26 dBm, and an average TOI of 38 dBm. Moreover, our design of custom LNA MMIC has an integrated ESD structure while occupying only 0.32 mm2 of chip area. [ABSTRACT FROM AUTHOR]

This brief presents a 2.0~42.0 GHz ultra-wide bandwidth Cascode distributed low-noise amplifier (CDLNA) MMIC design. With the proposed coupled-line (CL) sections between each drain-artificial transmission line (D-ATML) node and related gate-artificial transmission line (G-ATML) node, the traveling signal is reused to enhance the gain and broaden the operation bandwidth simultaneously. To improve the gain further, the inductive gain peaking has also been employed at each drain of common-source (CS) and common-gate (CG) transistors. Meanwhile, an active termination technique incorporating active and passive elements has been adopted to achieve better noise figure (NF) performance. Employing the proposed techniques, an LNA prototype has been designed and fabricated in a 0.15- $\mu \text{m}$ GaAs E-Mode pHEMT technology with the chip size of 1.53 mm2 including all the pads. From test results, the proposed CDLNA demonstrates a peak gain of 14.1 dB, the best NF of 2.1 dB, a group delay of 102 ± 58.4 ps, and 23.25/14.7 dBm best OIP3/OP1dB, respectively. The total power consumption is 129 mW under 3 V VDD. [ABSTRACT FROM AUTHOR]