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The result of electron beam lithography is influenced by many effects: forward and backward scattering, formation of secondary electrons, re-scattering of electrons, chemicals diffusion in the resist material, wafer stack, etc. To achieve high resolution all these effects should be taken into account. Commonly, the electron energy distribution in the exposed matter is described by the Point Spread Function (PSF). This is a simple approach which takes into account large portion of phenomena using few parameters. PSF function is a Gauss or multiple Gauss function, which is determined experimentally by the calibration procedure. Each resist material with corresponding stack is characterised by its own PSF, in case of double Gaussian, with the following parameters: α, β and η. In the current work the PSF parameters were systematically varied to study their influence on the dose assignment and resulting pattern. This gives a broader understanding of the correction mechanism using PSF. Furthermore, the resulting shape of the structure is influenced not only by the PSF parameters and dose assignment, but by the fracturing type as well. All these effects were studied using experimental and simulation approaches.

The selective emitter formation by laser doping is a well known process to increase the efficiency of silicon solar cells [1] , [2] . For the characterization of laser doped emitters, SIMS (Secondary Ion Mass Spectroscopy) and ECV (Electrochemical Capacitance Voltage Measurement) techniques are used to analyze the emitter profile [3] . It is very difficult to get acceptable result by SIMS on a textured surface, so only ECV can be used. It has been shown, that a charge carrier depth profile can be measured on a homogeneous emitter only by ECV. The use of laser doping results in a non-homogeneous emitter. We have shown that the emitter depth is not just a function of the pulse power, but in addition of the surface structure of the wafer. The texture seems responsible for a strong variability in the doping profile. It has been shown, that the ECV measurement is not applicable to characterize the emitter depth on laser doped areas, because of the microscopic inhomogeneities in the emitter on the macroscopic measurement area. The real emitter profiles are to complex to be characterized by SIMS or ECV. We have shown that the variation in the emitter profile is resulting from the texture in the laser-doped regions.

The recent discovery of ferroelectricity in thin film HfO2 materials renewed the interest in ferroelectric FET (FeFET) as an emerging nonvolatile memory providing a potential high speed and low power Flash alternative. Here, we report more insight into FeFET performance by integrating two types of ferroelectric (FE) materials and varying their properties. By varying the material type [HfO2 (HSO) versus hafnium zirconium oxide (HZO)], optimum content (Si doping/mixture ratio), and film thickness, a material relation to FeFET device physics is concluded. As for the material type, an improved FeFET performance is observed for HZO integration with memory window (MW) comparable to theoretical values. For different Si contents, the HSO based FeFET exhibited a MW trend with different stabilized phases. Similarly, the HZO FeFET shows MW dependence on the Hf:Zr mixture ratio. A maximized MW is obtained with cycle ratios of 16:1 (HfO2:Si) and 1:1 (Hf:Zr) as measured on HSO and HZO based FeFETs, respectively. The thickness variation shows a trend of increasing MW with the increased FE layer thickness confirming early theoretical predictions. The FeFET material aspects and stack physics are discussed with insight into the interplay factors, while optimum FE material parameters are outlined in relation to performance.

Many efforts were spent in the development of EUV technologies, but from a customer point of view EUV is still behind expectations. In parallel since years maskless lithography is included in the ITRS roadmap wherein multi electron beam direct patterning is considered as an alternative or complementary approach for patterning of advanced technology nodes. The process of multi beam exposures can be emulated by single beam technologies available in the field. While variable shape-beam direct writers are already used for niche applications, the integration capability of e-beam direct write at advanced nodes has not been proven, yet. In this study the e-beam lithography was implemented in the BEoL processes of the 28nm SRAM technology. Integrated 300mm wafers with a 28nm back-end of line (BEoL) stack from GLOBALFOUNDRIES, Dresden, were used for the experiments. For the patterning of the Metal layer a Mix and Match concept based on the sequence litho - etch - litho – etch (LELE) was developed and evaluated wherein several exposure fields were blanked out during the optical exposure. E-beam patterning results of BEoL Metal and Via layers are presented using a 50kV VISTEC SB3050DW variable shaped electron beam direct writer at Fraunhofer IPMS-CNT. Etch results are shown and compared to the POR. In summary we demonstrate the integration capability of EBDW into a productive CMOS process flow at the example of the 28nm SRAM technology node.

Resist processing for future technology nodes becomes more and more complex. The resist film thickness is getting thinner and hardmask concepts (trilayer) are needed for reproducible etch transfer into the stack. Additional layers between resist and substrate are influencing the electron scattering in e-beam lithography and may also improve sensitivity and resolution. In this study, bare silicon wafers with different assisting underlayers were processed in a 300 mm CMOS manufacturing environment and were exposed on a 50 keV VISTEC SB3050DW variable-shaped electron beam direct writer at Fraunhofer CNT. The underlayers are organic-inorganic hybrid coatings with different metal additives. The negative-tone resist was evaluated in terms of contrast, sensitivity, resolution and LWR/LER as a function of the stack. The interactions between resist and different assisting underlayers on e-beam direct writing will be investigated. These layers could be used to optimize the trade-off among resolution, LWR and sensitivity in future applications.