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To monitor the position and profile of therapeutic carbon beams in real-time, in this paper, we proposed a system called HiBeam-T. The HiBeam-T is a time projection chamber (TPC) with forty Topmetal-II- CMOS pixel sensors as its readout. Each Topmetal-II- has 72 × 72 pixels with the size of 83 μm × 83 μm. The detector consists of the charge drift region and the charge collection area. The readout electronics comprise three Readout Control Modules and one Clock Synchronization Module. This Hibeam-T has a sensitive area of 20 × 20 cm and can acquire the center of the incident beams. The test with a continuous 80.55 MeV/u 12C6+ beam shows that the measurement resolution to the beam center could reach 6.45 μm for unsaturated beam projections. [ABSTRACT FROM AUTHOR]

The ability to utilize a hybrid-photon-counting detector to its full potential can significantly influence data quality, data collection speed, as well as development of elaborate data acquisition schemes. This paper facilitates the optimal use of EIGER2 detectors by providing theory and practical advice on (i) the relation between detector design, technical specifications and operating modes, (ii) the use of corrections and calibrations, and (iii) new acquisition features: a double-gating mode, 8-bit readout mode for increasing temporal resolution, and lines region-of-interest readout mode for frame rates up to 98 kHz. Examples of the implementation and application of EIGER2 at several synchrotron sources (ESRF, PETRA III/DESY, ELETTRA, AS/ANSTO) are presented: high accuracy of high-throughput data in serial crystallography using hard X-rays; suppressing higher harmonics of undulator radiation, improving peak shapes, increasing data collection speed in powder X-ray diffraction; faster ptychography scans; and cleaner and faster pump-and-probe experiments.

To monitor the position and profile of therapeutic carbon beams in real-time, in this paper, we proposed a system called HiBeam-T. The HiBeam-T is a time projection chamber (TPC) with forty Topmetal-II- CMOS pixel sensors as its readout. Each Topmetal-II- has 72 × 72 pixels with the size of 83 μm × 83 μm. The detector consists of the charge drift region and the charge collection area. The readout electronics comprise three Readout Control Modules and one Clock Synchronization Module. This Hibeam-T has a sensitive area of 20 × 20 cm and can acquire the center of the incident beams. The test with a continuous 80.55 MeV/u 12C6+ beam shows that the measurement resolution to the beam center could reach 6.45 μm for unsaturated beam projections.

Depleted Monolithic Active Pixel Sensors (DMAPSs) are foreseen as an interesting choice for future high-energy physics experiments, mainly because of the reduced fabrication costs. However, they generally offer limited time resolution due to the stringent requirements of area and power consumption imposed by the targeted spatial resolution. This work describes a methodology to optimize the design of time-to-digital converter (TDC)-based timing electronics that takes advantage of the asymmetrical shape of the pulse at the output of the analog front-end (AFE). Following that methodology, a power and area efficient implementation fully compatible with the RD50-MPW3 solution is proposed. Simulation results show that the proposed solution offers a time resolution of 2.08 ns for a range of energies from 1000 e− to 20,000 e−, with minimum area and zero quiescent in-pixel power consumption. [ABSTRACT FROM AUTHOR]

The ability to utilize a hybrid-photon-counting detector to its full potential can significantly influence data quality, data collection speed, as well as development of elaborate data acquisition schemes. This paper facilitates the optimal use of EIGER2 detectors by providing theory and practical advice on (i) the relation between detector design, technical specifications and operating modes, (ii) the use of corrections and calibrations, and (iii) new acquisition features: a doublegating mode, 8-bit readout mode for increasing temporal resolution, and lines region-of-interest readout mode for frame rates up to 98 kHz. Examples of the implementation and application of EIGER2 at several synchrotron sources (ESRF, PETRA III/DESY, ELETTRA, AS/ANSTO) are presented: high accuracy of high-throughput data in serial crystallography using hard X-rays; suppressing higher harmonics of undulator radiation, improving peak shapes, increasing data collection speed in powder X-ray diffraction; faster ptychography scans; and cleaner and faster pump-and-probe experiments. [ABSTRACT FROM AUTHOR]

The Belle II experiment at the SuperKEKB collider in Tsukuba, Japan, has collected e + e − collision data between 2019 and 2022. After reaching a record-breaking instantaneous luminosity of 4.71 × 1034 cm-2 s-1 and recording a dataset corresponding to 424 fb-1, it completed its first planned long shutdown phase in December 2023. Aside from upgrades of the collider and detector maintenance, the shutdown was used for the installation of the two-layer Pixel VerteX Detector (PXD). As the innermost sub-detector, multiple scattering effects need to be reduced. PXD utilizes the Depleted P-channel Field Effect Transistor (DEPFET) technology, allowing for a material budget of 0.21% X 0 per layer. Each of the tracker's 40 modules consists of an array of 250 × 768 pixels with a pitch ranging from 50 µm × 55 µm for the inner to 85 µm × 55 µm for the outer layer yielding high gain and high signal-to-noise ratio while retaining about 99% hit efficiency. This article discusses the experience of the 4-year operation of the previous single-layer PXD in harsh background conditions as well as commissioning and testing of the fully-populated PXD2 during Long Shutdown 1. [ABSTRACT FROM AUTHOR]

• Pixel-level Monte Carlo model of Timepix semiconductor detector developed. • Analytical model of charge sharing effect in Timepix adapted on simulated data. • Measured and simulated particle tracks compared for various particle fields. • Developed methods to be used to support stray radiation dosimetry in radiotherapy by Timepix. The track structure of the signal measured by the semiconductor pixel detector Timepix3 was modelled in the Monte Carlo MCNP® code. A detailed model at the pixel-level (256 × 256 pixels, 55 × 55 µm2 pixel size) was developed and used to generate and store clusters of adjacent hit pixels observed in the measured data because of particle energy deposition path, charge sharing, and drift processes. An analytical model of charge sharing effect and the detector energy resolution was applied to the simulated data. The method will help the user sort the measured clusters and distinguish radiation components of mixed fields by determining the response of Timepix3 detector to particular particle types, energies, and incidence angles that cannot be measured separately. [ABSTRACT FROM AUTHOR]

Depleted Monolithic Active Pixel Sensors (DMAPSs) are foreseen as an interesting choice for future high-energy physics experiments, mainly because of the reduced fabrication costs. However, they generally offer limited time resolution due to the stringent requirements of area and power consumption imposed by the targeted spatial resolution. This work describes a methodology to optimize the design of time-to-digital converter (TDC)-based timing electronics that takes advantage of the asymmetrical shape of the pulse at the output of the analog front-end (AFE). Following that methodology, a power and area efficient implementation fully compatible with the RD50-MPW3 solution is proposed. Simulation results show that the proposed solution offers a time resolution of 2.08 ns for a range of energies from 1000 e− to 20,000 e−, with minimum area and zero quiescent in-pixel power consumption.

The LHCb Upstream Tracker is a silicon strip tracking detector that started operation in the Run 3 of the LHC. To meet the requirements imposed by high occupancy and data rate at the HL-LHC, a new Upstream Pixel (UP) tracker is proposed for LHCb Upgrade II based on CMOS pixel sensors. A preliminary detector layout is presented. The design of a sensor in a 55 nm high-voltage CMOS technology is introduced and further development is in process. Performance studies of UP with simulation are also ongoing. [ABSTRACT FROM AUTHOR]

The integration of readout electronics and sensors into a single entity of silicon in monolithic pixel detectors lowers the material budget while simplifying the production procedure compared to the conventional hybrid pixel detector concept. The increasing availability of high-resistivity substrates and high-voltage capabilities in commercial CMOS processes facilitates the application of depleted monolithic active pixel sensors (DMAPS) in modern particle physics experiments. TJ-Monopix2 and LF-Monopix2 chips are the most recent large-scale prototype DMAPS in their respective development line originally designed for the ATLAS Inner Tracker outer layer environment. In this contribution, the latest laboratory characterizations and beam test results of both DMAPS are presented with a special emphasis on performance after irradiation to high fluences. [ABSTRACT FROM AUTHOR]

During the Long Shutdown 3, the CMS pixel detector will be replaced to operate during the High Luminosity LHC (HL-LHC) running phase. Hybrid pixel modules of the new tracking detector will have to fulfill stringent requirements to operate in an extremely harsh radiation environment and cope with the high data readout rate. Sensor-readout chip assemblies have been extensively tested in the laboratory and at the DESY test beam facility. This study presents results on the analysis of test beam data acquired with HPK planar pixel sensors interconnected with the RD53B_CMS readout chip, irradiated to fluences up to Φ eq = 1. 0 × 1 0 16 cm − 2 . For all investigated fluences, the requirements for the efficiency times acceptance and the spatial resolution are met, while keeping the percentage of pixels masked as noisy below 1%. Additionally, measurements of crosstalk levels will be presented. [ABSTRACT FROM AUTHOR]

The silicon-on-insulator pixel (SOIPIX) detector is a unique monolithic-structure imaging device currently being developed by the SOIPIX group led by the High Energy Accelerator Research Organization (KEK). The detector team at KEK Photon Factory (PF) is also developing an X-ray camera using INTPIX4NA with a 14.1 × 8.7 mm2 sensitive area and 425,984 (832 column × 512 row matrix) pixels, with a pixel size of 17 × 17 µm2. The detector has high resolution and sensitivity for low-intensity X-rays, making it suitable for imaging in optical systems with lower X-ray intensities, such as an X-ray zooming microscope using two Fresnel zone plates (FZPs), which is also under development at PF. To enable imaging under such conditions, we developed a detector cooling system using a Peltier element to support longer exposure time (0.5 s per frame). Additionally, we developed a new readout system using DAQ boards developed by PF, equipped with SiTCP-XG (network controller implemented on field-programmable gate array) that supports 10 Gbps Ethernet for high-frame-rate imaging at several hundred hertz. The new X-ray camera was tested at the PF BL-14A, BL-14B, and AR-NE1A experimental stations, and the resolution and sensitivity characteristics were confirmed. Given these confirmed characteristics, this X-ray camera is suitable for X-ray imaging using 5–20 keV X-rays under low-intensity, low-contrast conditions. These conditions are ideal for capturing soft tissues with poor contrast, objects with fine structures, and specimens vulnerable to radiation damage. • SOIPIX INTPIX4NA detector based X-ray camera was developed at KEK Photon Factory. • INTPIX4NA detector has a 14.1 × 8.7 mm2 sensitive area (17 μ m pitch 832 × 512 pixel matrix). • This is suit for imaging with 5–20 keV X-ray under low-intensity/contrast conditions. • 10GbE DAQ system and Peltier based detector cooling system were also developed. • The resolution and sensitivity characteristics were tested/confirmed at KEK PF. [ABSTRACT FROM AUTHOR]

The High Luminosity Large Hadron Collider (HL-LHC) at CERN is expected to collide protons at a center-of-mass energy of 14 TeV and to reach the unprecedented peak instantaneous luminosity of 5 – 7. 5 × 1 0 34 cm −2 s −1 with an average number of pileup events of 140–200. This will allow the ATLAS and CMS experiments to collect integrated luminosities up to 3000 – 4000 fb −1 during the project lifetime. To cope with this extreme scenario the CMS detector will be substantially upgraded before starting the HL-LHC, a plan known as the CMS Phase-2 upgrade. The entire CMS silicon pixel detector will be replaced and the new detector will feature increased radiation hardness, higher granularity and capability to handle the higher data rate and the longer trigger latency. In this contribution, the Phase-2 upgrade of the CMS silicon pixel detector will be reviewed, focusing on the features of the detector layout and technological choices and summarizing the R&D activities. [ABSTRACT FROM AUTHOR]

Monolithic pixel detectors combine readout electronics and sensor in a single entity of silicon, which simplifies the production procedure and lowers the material budget compared to conventional hybrid pixel detector concepts. Benefiting from the advances in commercial CMOS processes towards large biasing voltage capabilities and the increasing availability of high-resistivity substrates, depleted monolithic active pixel sensors (DMAPS) can cope with the high-rate and high-radiation environments faced in modern high-energy physics experiments. TJ-Monopix2 is the latest iteration of a DMAPS development line designed in 180 nm TowerSemicondutor technology, which features a large scale (2 × 2) cm2 chip divided into (512 × 512) pixels with a pitch of (33 × 33) µm2. All in-pixel electronics are separated from its small collection electrode and process modifications are implemented to improve charge collection efficiency especially after irradiation. The latest laboratory measurements and investigations of a periodic variation in the threshold response relative to the hit arrival time observed for TJ-Monopix2 in typical operating conditions are presented. [ABSTRACT FROM AUTHOR]

The upcoming High-Luminosity running phase of the LHC will require a complete replacement of the current tracking system in the CMS experiment. With the planned integrated luminosity of up to 4000 fb−1 to be delivered to the experiments, the innermost layers of the CMS Inner Tracker (IT) will face particle fluences of up to a non-ionizing energy loss (NIEL) of Φ eq = 3.5 × 1016 cm−2. Through an extensive R&D program involving multiple vendors, several pixel sensor options have been thoroughly evaluated, considering different pixel pitches and sensor cell designs. Recently, the final choices have been made. All layers, except the innermost layer of the barrel section of the IT, will be equipped with planar n-in-p sensors featuring an active thickness of 150 μ m and pixel pitches of 25 × 100 μ m 2. During the initial phase of the sensor qualification campaign, the sensors were coupled with demonstrator chips (RD53A), and the modules were exposed to fluences of up to Φ eq = 2.0 × 1016 cm−2, undergoing comprehensive testing at both CERN and DESY test beam facilities. In 2023, single chip assemblies, along with the first full modules incorporating the final, full-size prototype readout chip (RD53B-CMS) irradiated up to Φ eq = 1.0 × 1016 cm−2, have become available and were tested at DESY. In this article, an overview of the preliminary test beam results will be provided. The studies will cover hit efficiency, spatial resolution, and noise hit occupancy for both non-irradiated samples and irradiated assemblies. The preliminary findings are in line with previous results obtained with RD53A assemblies. The measurements described in this contribution paved the way for the submission of the final readout chip and kickoff batches for planar production sensors for the Inner Tracker that have been launched recently. [ABSTRACT FROM AUTHOR]

Hybrid pixel radiation detectors with a direct photon-to-charge conversion working in a single photon counting mode have gained increasing attention due to their high dynamic range and noiseless imaging. Since sensors of different materials can be attached to readout electronics, they enable work with a wide range of photon energies. The charge-sharing effect observed in segmented devices, such as hybrid pixel detectors, is a phenomenon that deteriorates both spatial resolution and detection efficiency. Algorithms that allow the detection of a photon irrespective of the charge-sharing effect are proposed to overcome these limitations. However, the spatial resolution of the detector can be further improved beyond the resolution determined by the pixel size if information about the charge proportions collected by neighbouring pixels is used to approximate the interaction position. In the article, an approach to achieve a subpixel resolution in a hybrid pixel detector working in the single photon counting mode is described. Requirements and limitations of digital inter-pixel algorithms which can be implemented on-chip are studied. In the simulations, the factors influencing the detector resolution are evaluated, including size of a charge cloud, number of virtual pixel subdivisions, and detector parameters. [ABSTRACT FROM AUTHOR]

A hybrid pixel detector, which will be used in the high energy photon source (HEPS) with Beijing PIXel (BPIX) chips, has been successfully developed to the third-generation HEPS-BPIX3. It is a 2-D imaging detector with pixel size of 150 $\mu \text{m}$. The BPIX can work at 20 MHz without dead-time, but the frame rate can only reach 200 Hz limited by the 1-Gb/s TCP protocol of the third-generation readout system. The time structure of HEPS makes it possible to study the ultrafast dynamic evolution of crystal structure, even room-temperature data collection of macromolecular crystallography, so the detector needs to have the ability of fast readout to increase the frame rate up to 1 kHz. Based on this, fast readout and transmission bandwidth become crucial issues, meanwhile, the cost of electronics also should be considered. Therefore, a new dual modules readout board (DMRB) based on field programmable gate array (FPGA) was proposed to realize the imaging of 1.5 Mpixels detector without delay at the frame rate of 1.2 kHz, and an innovative 10 Gb TCP/IP firmware was developed to improve bandwidth. This article introduces how to design, implement, and run the whole system in detail from the perspective of DMRB hardware and firmware, and finally gives the performance results of DMRB with through silicon via (TSV) module at 1.2 kHz frame rate. [ABSTRACT FROM AUTHOR]

In this article, a noninterceptive and high-accuracy beam position monitor, named Hi’Beam-A, has been designed for the accelerator of a heavy-ion therapy facility. The Hi’Beam-A consists of the detector subsystem and the readout subsystem. In the detector subsystem, the microchannel plate multiplies the ionized charge in the high vacuum chamber, and the novel Topmetal silicon pixel sensor directly collects the charge. The readout subsystem processes the data and calculates the beam position. Beam test results show that the Hi’Beam-A reaches an accuracy of $5~\mu \text{m}$. This article will present the design, characterization, and beam test of Hi’Beam-A. [ABSTRACT FROM AUTHOR]

Surface defect detection aims to accurately recognize and distinguish types of defects and plays a key role in many applications. However, most of the recent studies focus on specific scenario detection and do not fairly consider the balance between the speed and accuracy. In the paper, we propose a key pixel points location-oriented method to identify multiscale defects, with several important properties: 1) A real-time template matching-based model is designed to speed up the process by introducing the Gaussian operator; 2) An improved Hough-based model is used to achieve a higher detection precision by deep mining both incremental properties and parallel properties; and 3) An adaptive filtering-based image preprocessing method is proposed to eliminate the interference of multiple types of clutters and noises. In the experiments, a mean average rate of 96% was achieved to detect and classify four types of common defects and the average time was reduced to 0.149 s. Furthermore, we fully evaluate the proposed method on two public datasets collected in real production lines and compare the results with other state-of-the-art methods. The results show that the proposed method achieved better balanced performance in many real application scenarios. [ABSTRACT FROM AUTHOR]

Radiation hardness is in the focus of the development of particle tracking and photon imaging detector installations. Semiconductor detectors, widely used in particle physics experiments, have turned into capacitive-coupled (AC-coupled) detectors from the originally developed conductively coupled (DC-coupled) detectors. This is due to the superior isolation of radiation-induced leakage current in AC-coupled detectors. However, some modern detector systems, such as the tracking detectors in the CERN LHC CMS or ATLAS experiments, are still DC-coupled. This originates from the difficulty of implementing AC coupling on very small pixel detector areas. In this report, we describe our advances in the detector processing technology. The first topic is the applications of the atomic layer deposition processing technology, which enables the very high densities of capacitance and resistance that are needed when the dimensions of the physical segmentation of pixel detectors need to be scaled down. The second topic is the flip-chip/bump-bonding interconnection technology, which is necessary in order to manufacture pixel detector modules on a large scale with a more than 99% yield of noise-free and faultless pixels and detector channels.

Pixel technology is commonly used in the tracking systems of High Energy Physics detectors with physical areas that have largely increased in the last decades. To ease the production of several square meters of sensitive area, the possibility of using the industrial Wafer Level Packaging to reassemble good single sensor tiles from multiple wafers into a reconstructed full wafer is investigated. This process reconstructs wafers by compression molding using silicon charged epoxy resin. We tested high glass transition temperature low-stress epoxy resins filled with silica particles to best match the thermal expansion of the silicon die. These resins are developed and characterized for industrial processes, designed specifically for fan-out wafer-level package and panel-level packaging. In order to be compatible with wafer processing during the hybridization of the pixel detectors, such as the bump-bonding, the reconstructed wafer must respect challenging technical requirements. Wafer planarity, tile positioning accuracy, and overall thickness are amongst the main ones. In this paper the description of the process is given and preliminary results on a few reconstructed wafers using dummy tiles are reported. Strategies for Wafer Level Packaging improvements are discussed together with future applications to 3D sensors or CMOS pixel detectors.

The precision and accuracy of diffraction measurements with 2D area detectors depends on how well the experimental geometry is known. A method is described to measure the module geometry in order to obtain accurate strain data using a new Eiger2 4M CdTe detector. Smooth Debye–Scherrer powder diffraction rings with excellent signal to noise were collected by using a fine-grained sample of CeO2. From these powder patterns, the different components of the module alignment errors could be observed when the overall detector position was moved. A least squares fitting method was used to refine the detector module and scattering geometry for a series of powder patterns with different beam centers. A precision that is around 1/350 pixel for the module positions was obtained from the fit. This calibration was checked by free refinement of the unit cell of a silicon crystal that gave a maximum residual strain value of 2.1 × 10−5 as the deviation from cubic symmetry.

Spectroscopic X-ray imaging techniques including Compton X-ray Imaging, X-ray Fluorescence Imaging and Hyperspectral X-ray Tomography require energy-resolving detectors capable of operating at high incident X-ray fluxes to make time resolved measurements. HEXITEC MHz , operates at a continuous 1 MHz frame rate and can make fully spectroscopic measurements at >106 ph s−1 mm−2. This is enabled by an integrating Front End, in-pixel digitisation and high-speed serialisers. A 300 μm thick p-type Si HEXITEC MHz detector was characterised on the B16 Test Beamline at the Diamond Light Source and are the first measurements taken at a 1 MHz frame rate. At 10 keV and 15 keV) the device displayed average FWHM of 656 eV and 682 eV respectively, with minimal changes in spectroscopic performance over ∼8 h. Analysis of charge-sharing events show low charge loss and a linear energy-signal response. Higher-flux measurements illustrated the capability of the ASIC to operate as a photon-counting device. [ABSTRACT FROM AUTHOR]

Cadmium zinc telluride (CdZnTe) detectors are known to suffer from polarization effects under high photon flux due to poor hole transport in the crystal material. This has led to the development of a high-flux capable CdZnTe material (HF-CdZnTe). Detectors with the HF-CdZnTe material have shown promising results at mitigating the onset of the polarization phenomenon, likely linked to improved crystal quality and hole carrier transport. Better hole transport will have an impact on charge collection, particularly in pixelated detector designs and thick sensors (>1 mm). In this paper, the presence of charge sharing and the magnitude of charge loss were calculated for a 2 mm thick pixelated HF-CdZnTe detector with 250 μm pixel pitch and 25 μm pixel gaps, bonded to the STFC HEXITEC ASIC. Results are compared with a CdTe detector as a reference point and supported with simulations from a Monte-Carlo detector model. Charge sharing events showed minimal charge loss in the HF-CdZnTe, resulting in a spectral resolution of 1.63 ± 0.08 keV Full Width at Half Maximum (FWHM) for bipixel charge sharing events at 59.5 keV. Depth of interaction effects were shown to influence charge loss in shared events. The performance is discussed in relation to the improved hole transport of HF-CdZnTe and comparison with simulated results provided evidence of a uniform electric field.

The Belle II experiment comes with a substantial upgrade of the Belle detector and will operate at the SuperKEKB energy-asymmetric e + e − collider with energies tuned to ϒ (4 S) resonance s = 10. 588 GeV. The accelerator has successfully completed the first phase of commissioning in 2016 and the first electron–positron collisions in Belle II took place in April 2018. Belle II features a newly designed silicon vertex detector based on DEPFET pixel and double-sided strip layers. Currently, a subset of the vertex detector is installed (Phase 2 of the experiment). Installation of the full detector (Phase 3) will be completed by the end of 2018. This paper describes the Phase 2 arrangement of the Belle II silicon vertex detector, with focus on the interconnection of detectors and their integration with the software framework of Belle II. Alignment issues are discussed based on detector simulations and first acquired data. [ABSTRACT FROM AUTHOR]

The Peripheral Component Interconnect Express (PCIe) Luminosity UPgrade board ($\pi $ LUP) was designed by INFN and University of Bologna as a readout interface candidate to be used after the Phase-II upgrade of the Pixel Detector of the ATLAS and CMS experiments at Large Hadron Collider (LHC). The same team in Bologna is also responsible for the design and commissioning of the readout driver (ROD) board—currently implemented in all the four layers of the ATLAS pixel detector (Insertable B-Layer, B-Layer, Layer-1, and Layer-2)—and acquired in the past years expertise on the ATLAS readout chain and the problematics arising in such experiments. Although the $\pi $ LUP was designed to fulfill a specific task, it is highly versatile and might fit a wide variety of applications, some of which will be discussed in this paper. Two seventh-generation Xilinx field-programmable gate arrays (FPGAs) are mounted on the board: a Zynq-7 with an embedded dual-core Advanced Reduced Instruction Set Computer (RISC) Machine (ARM) Processor and a Kintex-7. The latter features 16 12.5-Gbps transceivers, allowing the board to interface easily to any other electronic board, either electrically and/or optically, at the current bandwidth of the experiments for LHC. Many data-transmission protocols have been tested at different speeds; results will be discussed later in this paper. Two batches of $\pi $ LUP boards have been fabricated and tested; two boards in the first batch (version 1.0) and four boards in the second batch (version 1.1), encapsulating all the patches and improvements required by the first version. [ABSTRACT FROM AUTHOR]

Abstract Depleted monolithic CMOS 1 1 Complementary metal-oxide-semiconductor. active pixel sensors (DMAPS) have been developed to demonstrate their suitability as pixel detectors in the outer layers of the ATLAS Inner Tracker (ITk) pixel detector in the High-Luminosity Large Hadron Collider (HL-LHC). Two prototypes have been fabricated using a 150 nm CMOS technology on high resistivity (≥ 2 k Ω cm) wafers. The chip size of 10 mm × 10 mm is similar to that of the current FE-I3 ATLAS pixel detector readout chip. One of the prototypes is used for detailed characterization of the sensor and analog front end circuitry of the DMAPS. The other one is a fully monolithic DMAPS, including fast readout digital logics that handle the required hit rate. To yield a strong homogeneous electric field within the sensor volume, back-side process of the wafer was tested. The prototypes were irradiated with X-rays up to a total ionization dose (TID) of 50 Mrad(SiO 2) and with neutrons up to a 1 MeV neutron equivalent fluence of 1015 n eq /cm 2 to test non-ionizing energy loss (NIEL) effects. The analog front end circuitry maintained its performance after TID irradiation, and the hit efficiency at < 10−7 noise occupancy was as high as 98.9% after NIEL irradiation. Highlights • Large scale (chip size of 10 mm × 10 mm) fully monolithic CMOS active pixel sensor with fast readout. • Thinning (thickness of 200 and 100 μ m) and back-side process applied to the active pixel sensor. • TID radiation hard analog front end circuit up to 50 Mrad. • High hit efficiency of 98.9% after neutron irradiation up to a 1 MeV neutron equivalent fluence of 1015 n eq /cm2. [ABSTRACT FROM AUTHOR]

Abstract We are developing a new high-speed readout system for silicon on insulator (SOI) pixel detectors. The SOI detector is a monolithic radiation imaging detector based on a 0.2 μ m FD-SOI CMOS process. Previously, we used a Xilinx Virtex-4/5 FPGA readout board for the SOI detector and developed many facilities for this board. However, the Virtex-4/5 FPGA is now obsolete and does not have sufficiently high performance for recent experiments that require more than 1-kHz high-speed imaging with a large number of pixels. Thus, we started to develop a new high-speed readout system using the KC705, which is the evaluation board for the Xilinx Kintex-7 FPGA. We developed a new data acquisition structure that has backward compatibility with the previous environment on this board and implements several functions for practical purposes such as micro Computed Tomography. The transfer speed achieved by the new system is 95.3 fps for a 426k pixel detector in continuous data-taking mode, and 762.5 fps in maximum-speed mode. The details of the new readout system are presented. Highlights • New high-speed DAQ system using the KC705 for SOIPIX detectors is under development. • New DAQ system keeps backward compatibility with SEABAS2 current DAQ system. • New DAQ system is using new FPGA and DDR3 memory to increase the performance. • Transfer speed is 95.3 fps for a 426k pixel detector, in continuous data-taking mode. • Transfer speed is 762.5 fps for a 426k pixel detector, in maximum-speed mode. [ABSTRACT FROM AUTHOR]

Abstract The ATLAS silicon tracker detectors are designed to sustain a high dose integrated over several years of operation. The radiation hardness should also favor the survival of the detector in case of accidental beam losses. In 2006, a measurement published for the ATLAS Pixel detector modules (silicon planar hybridly coupled with FE-I3 electronics) established that they could survive to beam losses (1.5 × 1 0 10 protons/cm2 in a single bunch) with minimal or no deterioration of performance. In this paper, preliminary results are shown, reporting the effect of a very intensive proton beam releasing a high instantaneous dose in two IBL pixel and one ITk strip module detectors at the HiRadMat facility at CERN. [ABSTRACT FROM AUTHOR]