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The bulk of photomask demand is in technology nodes ≥65nm, using equipment, processes, and materials developed more than two decades ago1. Despite mature processes and tools, mask makers are challenged to meet continuing demand. The challenge comes not only in the forms of increased demand, but also that much of the equipment is approaching the end of its viable lifetime to support and maintain due to parts or expertise availability2. Mask writers in particular are problematic from a technical and financial perspective. Modern equipment and processes can be “too good” to simply use as a direct substitute when original equipment or processes become unavailable During initial lithography and device integration, device manufacturers tailored Optical Proximity Correction (OPC) and other wafer processing conditions based on the original mask signature for multiple mask layers. Changing to state-of-the-art mask fidelity would actually represent a liability, as the altered mask character could result in device shifts, yield reduction, or even unanticipated reliability failures. To account for the improved fidelity, re-optimization of the synergistic patterning between mask, wafer lithography and etch is required. Even on mature technologies, reintegration can require costly, difficult, and time-consuming requalification. While this path has often been pursued when manufacturers declare EOL of tools, we propose instead to contain the change in the mask shop by using Mask Process Corrections (MPC)3. Instead of using MPC to maximize mask fidelity, as is done in advanced nodes, we use MPC to replicate the original mask non-idealities on a new mask process.

Source Mask Optimization (SMO) has become an integral part of resolution enhancement techniques (RET) for almost all critical layers at advanced technology nodes. Over the past couple of years, various flows have emerged for integrating SMO into mainstream RET selection. These flows revolve mainly around clip selection, resist model, verification and analysis metrics, design rule optimization, and so on. There has also been strong emphasis on the quality of mask that is conjugated for source selection process. All these variations in analysis and rigorous simulations for flow selection are critical but they also create a bottleneck in overall RET development. In this paper, we demonstrate an initial RET development flow for 20 nm technology with emphasis on quantifying benefits coming from source and mask. We also report challenges that are encountered in the foundry environment when moving from RET development to production. In conclusion, we demonstrate a reliable solution that could be integrated early in RET development and easily adapted for a production environment.