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Temperature dependencies of basewell surface recombination current of silicon metal-oxide semiconductor (MOS) transistors are examined and are correlated with the Shockley-Read-Hall band-trap thermal recombination kinetics. Theoretical and experimental confirmations show that the peak gate voltage and linewidth of the DCIV curve have temperature dependences that are negligible, while the peak current amplitude has a strong temperature dependence.

Shockley-Reed-Hall steady-state recombination kinetics were used in the analysis of carrier recombination at interfacial electronic traps under a surface controlling gate electrode

Low-frequency conductance voltage (LFGV) analysis of Si/Ge(sub.x)Si(sub.1-x)/Si heterojunction bipolar transistors (HBTs) is a method that gives accurate quantitative values for the important minority-carrier transport factors that are behind transistor performance. It makes possible a detailed analysis of emitter injection efficiency and the current gain and is general. It can be applied to other bipolar transistors based on various materials.

Channel hot electrons stress in silicon n-channel metal oxide semiconductor transistors was used to generate the barrier-surmounting 4.25 eV hot holes to produce the positive oxide charge build-up. Results showed that the positive oxide charge build-up is located over the drain/channel junction space-charge-region. Moreover, the existence of the high- and low-drain-voltage pathways is demonstrated among the four intrinsic pathways of generating the 4.25eV hot holes by electrons.

A study was conducted on the theory of thermally stimulated charges caused by thin oxide film trapped carrier thermal emission. The theory was related to metal-oxide-semiconductor transistor gate voltage shifts during an arbitrary temperature ramp. Differences were observed in the density of states of oxide traps in previous studies concerning the theory. The differences were found to be caused by multiphonon absorption during trapped oxide hole thermal emission.

A comparative analysis of five oxide-thickness extrapolation algorithms is conducted to determine their accuracy using the low-frequency CV theory. Parameters such as oxide thickness, temperature and acceptor impurity concentration are utilized. Results show that the extrapolation algorithm which utilized Fermi-Dirac statistics is the most accurate while the algorithm with zeroth-order approximation is the least accurate.

The base current relaxation transient following reverse emitter-base (EB) bias stress and its effect on time-to-failure (TTF) determination are studied in self-aligned and nonself-aligned silicon bipolar junction transistors with thermal and deposited base oxide. A quantitative model shows that the transient is caused by a reduction of the stress-generated positive charge trapped in the oxide layer near the emitter-base junction due to holes tunneling from oxide hole traps to silicon band states or SiO2/Si interface traps.

The physical degradation mechanism of silicon bipolar junction transistors at high forward current densities accompanies the hydrogenation and dehydrogenation of the electronic interface traps. These traps are present at the metal-silicide/polycrystalline-silicon and at polycrystalline-silicon/crystalline-silicon emitter contact interfaces. A time-to-failure extrapolation methodology is discussed, which includes device temperature correction due to self-heating at the high stress current densities.

The primary hot holes of the n+/p emitter tunneling current bring about degradation of the common-emitter forward current gain, h(sub F E), of the submicron silicon bipolar transistor at a low reverse emitter base junction applied voltage. The tunnel- and substrate-injected hot electrons initiate the generation of silicon/oxide interface traps, which show identical kinetic dependence. Stress voltages less than 2.4V show degradation of h(sub F E).

Separation of nonuniform oxide charge distribution from interface traps involves the use of a DC current-voltage method. The method uses an analysis of DC characteristics, such as the subthreshold drain current and the DC base recombination current versus the gate voltage. Two Metal Oxide Semiconductor (MOS) transistor samples with areally consistent and nonuniform oxide charge distributions, respectively produced by uniform and nonuniform substrate hot electron injections are used to show the methodology.

A direct-current current-voltage uses gate-controlled parasitic bipolar junction transistor of a metal-oxide-silicon field-effect transistor in a p/n junction isolation well to study the variations of the oxide and interface trap density. The process of interface and oxide traps on oxidized silicon is discussed. The technique is more effective and dependable than many of the traditional alternating current methods for finding fundamental kinetic rates and transistor degradation mechanism.

A current-acceleration method, which uses large punch-through current when collector is shorted to base during stress, measures rapid time-to-failure (TTF) of bipolar junction transistors under low-voltage emitter-base reverse-bias stress. A 100-fold stress-time acceleration is shown for this methodology. The 10-year TTF is easily measured in 100 hrs at low operating voltage without extrapolation.

Theoretical studies explain the two pathways of positive oxide-charge building during Fowler-Nordheim electron tunneling through sub-10-nanometers silicon dioxide films. Two collision mechanisms, interband impact generation and interband Auger recombination, are involved in the generation of energetic holes by the tunneled electrons in the polycrystalline Si gate. Theoretically predicted electron threshold energies for the generation of a positive oxide charges are compared with experimental data.

The DCIV method is used to measure the reduction of the interface trap density over the p-channel of metal oxide semiconductor transistors (pMOST's). A hydrogen reaction-transport model was also constructed to demonstrate the hydrogenation of the residual interfacial bonds by hydrogen and to show the hydrogen released from the hydrogenated boron in the p+ drain region by the channel hot holes.

Steady-state Shockley–Read–Hall kinetics is employed to explore the high concentration effect of neutral-potential-well interface traps on the electron-hole recombination direct-current current-voltage (R-DCIV) properties in metal-oxide-silicon field-effect transistors. Extensive calculations include device parameter variations in neutral-trapping-potential-well electron interface-trap density NET (charge states 0 and -1), dopant impurity concentration PIM, oxide thickness Xox, forward source/drain junction bias VPN, and transistor temperature T. It shows significant distortion of the R-DCIV lineshape by the high concentrations of the interface traps. The result suggests that the lineshape distortion observed in past experiments, previously attributed to spatial variation in surface impurity concentration and energy distribution of interface traps in the silicon energy gap, can also arise from interface-trap concentration along surface channel region. [ABSTRACT FROM AUTHOR]

The effects of energy distributions of Si/SiO2 interface traps in the energy gap of oxidized silicon on the current versus voltage line shape of the electron-hole recombination current are analyzed using the steady-state Shockley-Read-Hall kinetics. Slater’s [Insulators, Semiconductors and Metals; Quantum Theory of Molecules and Solids (McGraw-Hill, New York, 1967)] localized bulk perturbation theory applied by us to the interface anticipates U-shaped energy distributions of the density of neutral electron and hole interface traps from random variations of the Si:Si and Si:O bond angles and lengths. Conservation in dissipative transition energy anticipates the rate of electron capture into neutral electron trap to be faster for electron trap energy levels nearer the conduction band edge, and similarly, the rate of hole capture into neutral hole trap to be faster for hole trap energy levels nearer the valence band edge. Line shape broadening is analyzed for discrete and U-shaped energy distributions of interface trap energy levels. The broadened line shapes observed in past experiments, previously attributed to spatial variations of surface dopant impurity concentrations, could also arise from energy distributions of interface trap energy levels. [ABSTRACT FROM AUTHOR]

Theory and line-shape analysis of carrier recombination current at interfacial electronic traps under a surface controlling gate in metal–oxide–silicon (MOS) structures is investigated using the Shockley–Read–Hall recombination statistics. The theoretical analysis demonstrates the sensitive dependence of the line shape of the peaked basewell-terminal recombination current versus gate/base voltage (I[sub B]–V[sub GB]) characteristics on the lateral variation of the impurity concentration along the surface channel. An electrical measurement method is presented based on this discovery for extracting the impurity surface concentration profile N[sub IM](x=0, y, z) in the five regions (basewell, drain and source junction and extension) covered by the gate conductor in submicron MOS transistors. Impurity surface concentration profiles in the basewell channel region are then extracted by the analytical theory for MOS transistors fabricated by an advanced 0.13 μm complementary MOS technology. Effects of nitrogen in the gate oxide and current generated in the drain and source extension regions for profiling the N[sub IM] in the extension regions are illustrated. © 2001 American Institute of Physics. [ABSTRACT FROM AUTHOR]

Carrier tunneling through ultrathin (1-3 nm) SiO[sub 2] layers in MOS (metal-oxide-silicon) structures is investigated using the Bardeen-Harrison transition probability method. Quantum mechanical wave function matching at the two abrupt potential boundaries of a trapezoidal Si/SiO[sub 2]/Si barrier gives an electric-field dependent preexponential factor in the Wentzel-Kramers-Brillouin tunneling probability, which significantly affects the current-voltage characteristic at low fields. An analytical theory is employed to predict the relative importance of three elastic tunneling pathways (electrons, valence electrons, and holes) and two geometrical tunneling locations (channel region and source or drain overlap regions) in MOS transistors (MOSTs), showing (1) hole tunneling dominant in p+gate pMOST (p-channel MOST) at low gate voltages, and (2) overlap regions dominant prior to base-region inversion in both p+gate pMOST and n+gate nMOST (n-channel MOST). The analytic theory is used to analyze the experimental tunneling currents measured at the gate, source, well, and substrate terminals of sourced MOS capacitors to give the oxide thickness and impurity doping concentrations in the base and source regions. © 2001 American Institute of Physics. [ABSTRACT FROM AUTHOR]

Presents a study that deactivated group III acceptors by hydrogen (H) released by 8 keV electrons in metal-oxide-silicon capacitors. Conjoined phases of the decay of the acceptor density during the keV electron beam irradiation; Relation of the overlapping temporal characteristics with the comparable rates of H bond breaking; Discovery of two distinct annealing phases.

Presents a study which examined the electron recombination rates at the gold acceptor level in high-resistivity silicon. Discussion of results of previous studies; Experimental details; Results and discussion.

Presents a study which showed the density of boron, aluminum, gallium and indium acceptor versus curved during avalanche electron injection and constant-temperature thermal annealing experiments obtained from metal-oxide-silicon capacitors. Details on the avalanche electron injection (AEI) experiments; Deactivation of acceptor during AEI; Discussion on the thermal reactivation of acceptor.

Presents information on the theory of thermally stimulated charges in metal-oxide-semiconductor (MOS) gate oxide. Introduction to the electrical properties of electronic defects in semiconductors and insulators; Characterization of single-level traps; Definition of gate voltage.

Presents information on a study which discussed boron acceptor deactivation in boron-doped metal-oxide-silicon capacitors during and after an electron irradiation at room temperature. Experimental procedure; Boron deactivation during repeated electron beam irradiation stress-anneal; Dependence of boron acceptor deactivation on postoxidation process.

Presents a study which reported the effects of hydrogen chloride during oxidation of silicon on the hydrogenation of boron acceptors and generation-annealing of interface and oxide traps in 8-keV electron irradiated aluminum/polycrystalline-silicon/oxide/silicon capacitors. Experimental procedure followed; Experimental results; Discussion.

Presents information on a study which measured thermal emission rate and capture cross section of holes at the gold donor level in silicon junctions with boron acceptor concentrations showing no boron concentration dependencies. Measurement of the thermal emission and capture rates by two variations of the junction capacitance transient methods; Effect of guard ring voltage on the hole thermal emission rate; Electric field dependence of the hole thermal emission rate.

Presents information on a study that reported the effects of hydrogen chloride on trap generation in silicon dioxide layers at high electric fields. Experimental procedure; Results and discussion; Conclusion.

Presents information on a study that obtained hydrogenation data of aluminum- and boron-doped silicon subject to constant and current avalanche electron injection (AEI) and compared to similar data taken under constant peak voltage AEI stress obtained earlier. Experimental procedures and data analysis; Analysis and interpretation of reaction rates and activation energies; Conclusions.

Discusses a study that investigated trap generation during low-fluence avalanche-electron injection in metal-oxide-silicon capacitors (MOSC) with different fabrication processing cycles. Hot-electron effects in oxidized silicon under transistor operation conditions; Different trap-generation phenomena in poly-silicon-and aluminum-gate MOSC; Comparison between generation rate of interface states in aluminum-gate MOSC and poly-silicon-gate MOSC.

Presents information on a study which discussed the annealing out of interface states, originating from the dangling bonds at the oxide-silicon interface, during chip bonding. Growth of thermal oxides; Measurement of the equilibrium high-frequency capacitance-voltage curves; Typical values of interface trap density at midgap before and after chip bonding; Kinetics during chip bonding.

Focuses on a study which described the use of bipolar metal-oxide-silicon-field-effect-transistor structure to inject hot electrons into thermally grown wet oxide films on crystalling silicon. Components that were separated from the threshold voltage shift; Findings on the density of the generated oxide traps; Comparison between the threshold oxide field for oxide trap generation and the bond breaking energy of hydrogen bonds in the oxide film.