Search

This paper presents key building blocks of a monolithic GaN half-bridge solution: 1) a binary-weighted digitally-controlled segmented gate-driver, offering slew-rate control; 2) a high-voltage floating level-shifter with glitch prevention; and 3) a monolithic half-bridge with integrated fixed-strength gate-drivers. Together, they facilitate on-chip active gate-driving, improving the reliability of GaN power ICs. The blocks were fabricated on separate dies using imec’s 200 V GaN-on-SOI process. A controllable dv DS /dt from 68 V/ns to 112 V/ns at room temperature is achieved using the segmented gate-driver. An oscillation-free v DS switching of the half-bridge at 200 V and 5 MHz is demonstrated through experimental results.

This paper reviews monolithic GaN integration for power ICs, focusing on current technological capabilities. We highlight key opportunities for integrating low-voltage circuits alongside power devices to support converter operation. Simulations and experimental results from the imec 200 V GaN-on-SOI and ON Semiconductor 650 V GaN-on-Si processes provide quantitative insights for digital and analog circuitry.

This work presents an integrated GaN senseHEMT structure and segmented gate-driver implemented using ON Semiconductor’s 650-V mixed-signal GaN-on-Si process. The senseHEMT element with 2500:1 sensing ratio is embedded within the 650-V power device for near-lossless current sensing, and the totem-pole driver utilizing low-voltage (LV) e-HEMTs is monolithically integrated with the device. The proposed design is verified in a bridgeless totem-pole power-factor-correction converter operating in boundary conduction mode. The converter is controlled by an FPGA-based hysteretic current-mode controller to achieve sinusoidal current shaping. The controller uses the senseHEMT in conjunction with a current DAC and a high-speed comparator to sense the peak and valley currents through the power HEMT. A set of minimum-sized high-voltage (HV) GaN devices protect the LV current-loop circuitry from the high voltages in the powerstage. Experimental results show sinusoidally-shaped input current synchronized with the ac input voltage, demonstrating dynamic functionality of the senseHEMTbased current-control loop to achieve power-factor correction.

This paper reports the performance of GaN -based building blocks for monolithic integration. An integrated gate driver, low-voltage analog and synchronous digital circuits are fabricated in a 650-V GaN-on-Si process and measured. Calibrated GaN models are compared against simulated silicon designs to identify optimal integration criteria.

This paper describes a new masterless interleaving scheme for parallel sub-inverters operating in variable frequency Hysteretic Current-Mode Control (HCMC). The proposed digital control scheme enables the development of fault-tolerant, modular, efficient, and power dense inverters. A feed-forward controller is used to instantaneously correct for phase error at each switching cycle, while a compensator corrects for the systematic difference in sub-inverter switching frequencies caused by inductor mismatch. The control is verified by simulation up to 2 kW in an inverter system consisting of three parallel sub-inverters. Experimental results are presented for the same system operating in Boundary Conduction Mode (BCM) at 895 W. Activation of the interleaving controller shows a reduction in peak current into the system EMI filter, while maintaining the soft-switching benefits of BCM operation. The proposed interleaving scheme reduces the magnitude of the lowest switching frequency harmonics by a peak of 35 dB and an average of approximately 10 dB, which is demonstrated by comparing the inverter system’s current spectrum with and without interleaving.

High-power-density inverters have been used in a wide variety of applications, such as renewable energy systems, micro-grids, Uninterruptible Power Supplies (UPS), military, and automotive applications. These power inverters are multidisciplinary and complex engineered systems, involving electrical and thermal sub-systems, which convert DC power, from batteries and solar cells, into AC power that is compatible with the utility grid. This paper is focused on the thermal and mechanical design of a high-efficiency, 2-kW, portable, single-phase power inverter, with a volume of 29 in3, resulting in a power density of 69 W/in3. This work proposes an efficient thermal management and cooling concept to reduce hot spots by distributing the heat more uniformly inside the inverter’s enclosure and quickly removing it out of the system. Detailed 3D CAD models are developed, and CFD and FE analyses are carried out at the component, sub-system and system levels.