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Moving from monolithic scaling to the second (2D) and to the third dimension (3D) is becoming increasingly important within industry. In the last years heterogeneous and chiplet integration, utilizing advanced packaging technologies, has increased in complexity as well as in variability. Higher performance, wider bandwidth and lower power consumption and space requirements drive the approach toward 3D integration, whereas the need of finer RDL line/spacing as well as smaller μ-bumps and μ-pillars critical dimension tighten integration design rules at the package and substrate level. Individual chiplet's I/O bumps and interconnects pitch scaling nowadays moves towards 2/2μm L/S. Although the flexible re-integration of larger dies from smaller chiplets, from various technology nodes to partitioned dies has shown numerous advantages over monolithic SoC technologies with larger freedom of design, this approach shifts the complexity into the integration and with it into the lithographic patterning processes. In this work a profound evaluation of common advanced packaging high resolution, thin and thick resists for RDL & μ-bump/μ-pillar manufacturing is presented, utilizing maskless exposure to demonstrate its patterning performance. Resolution tests, focal position & exposure matrices, including resist sidewall profiles are discussed in view of the 2/2μm L/S requirements for heterogeneous integration. Furthermore, the high-speed digital processing meets the needs for design flexibility and scalability for a wide range of packaging technologies by enabling both, die- and wafer-level designs, fast tape-out changes together with sub-μm adaptability.

CMOS image sensors technology is nowadays widely used in various applications due to multiple advantages, such as low cost, low power consumption, on chip functionality, high-speed of operation [1]. The market for CMOS image sensor (CIS) technology is continuously growing, as this technology is key technology in the most of the main electronic megatrends, such as smart automotive, portable & mobile electronics, novel human machine interfaces for AR/ VR devices, 3D sensing or $\mu$ -displays and advanced healthcare requirements. In order to follow and continue CIS scaling for thinner and smaller devices, an adoption of new processes and materials is required. Mainly improving optical performance as well as imagining characteristics of image sensors, such as higher image resolution, better contrast and desired optical density of the colored resist materials are key aspects of today's development.

Adhesive bonding using an ultra-thin polymer layer is getting more attention for more than Moore applications. However some challenges of ultra-thin layer coating remain and are subject to further research. For this purpose diluted BCB adhesive layers were evaluated to create bonding layers down to 30 nm adhesive thickness. BCB is a well-known and thus favourable candidate for this evaluation due to it’s physical properties, such as low curing temperature, high degree of planarization, high optical clarity, along with good compatibility with various metallization systems.

In recent years temporary bonding has evolved to a widely used process technology as it is an enabling process for many products relyinnovel solutions are typically assessed on two key criteria which are a broad process window and cost effectiveness. Thus in this paper these criteria will be discussed in more detail for the case of UV laser debonding with respect to wafer level packaging. By temporary bonding the thin or to be thinned device wafer is bonded to a carrier wafer by an adhesive interlayer to provide sufficient mechanical support which is crucial for many downstream processes. In the past several different technologies have been studied and implemented. A major differentiation factor between the offered solutions is the debonding method, including separation processes at room or elevated temperatures. Nowadays a particular focus is on UV laser debonding as it offers several advantages, as the debonding process can be performed at room temperature with fast process times and force free separation. Furthermore crosslinking adhesive materials with high temperature stability can be used. This can be achieved due to the high intensity UV light provided by an excimer laser system which is absorbed by the polymer close to the carrier surface and breaks the chemical bonds. The low debonding temperature in combination with high temperature stability of the adhesives leads to a broad process window for the temporary bonded stack. In addition transparent adhesive materials can be used in combination with the glass carrier to support better visibility of alignment marks within the bond interface. However, for industrial requirement besides the technical advantages the most critical parameters are ease of implementation, throughput and costs. In this paper we will review integration principles for advanced packaging as well as new devices that utilize temporary bonding. Special focus will also be put on upcoming demands for future device concepts. A short discussion will discuss temporary bonding methods and materials, benefits and drawbacks of each one. In the following laser debonding will be discussed as a focus topic for next generation packaging process technology. Laser debonding is already being applied in volume for couple of technologies, focussing on different wavelengths. We will focus on a newly developed technology, using UV solid state laser technology. Here, we will discuss all relevant process parameter, critical process steps along with reliability of different laser debonding material systems.

In this work we present the structural and electrical characterization of sputter-deposited CoFe(B)/MgO/Si metal-insulator-semiconductor tunneling junctions for injection and detection of spin polarized current in silicon. The multilayers have been deposited in 700 nm deep trenches, patterned in thick SiO2 dielectric, on n- and p-doped wafers. The films inside the trenches are continuous with a correlated and low roughness. The MgO barrier grows amorphous without indication of pinholes. The dc and ac transport properties of the junctions were studied as a function of temperature and frequency. A relatively high interface trap density at the MgO/Si-interface is extracted from admittance spectra measurements. Transport is dominated by majority carriers in the case of n- doped and by minority carriers for the p-doped wafers. This leads to distinct rectification characteristics for the two wafer types, which would significantly influence the spin injection efficiency of the tunneling junctions.

We investigate the magnetic properties of arrays of sputter-deposited, Co70Fe30/Ni80Fe20 and Co40Fe40B20 contacts to silicon, embedded into 42 nm thick SiO2 dielectric. The contacts have rectangular shapes with blunt edges, sub-micrometre width and different aspect ratios. They are deposited either directly on silicon, forming Schottky junctions or on top of an MgO tunnel barriers with varying thickness. The MgO and CoFeB electrode are amorphous while the CoFe/NiFe bilayer is polycrystalline. The magnetization switching characteristics are studied by means of the magneto-optical Kerr effect and magnetic force microscopy. The switching field and its distribution within the array are found to depend on the thickness of the MgO and the ferromagnet (FM). Switching is mostly determined by the contact's width by means of end domains formed at the blunt edges. An influence of the length for wider contacts is also demonstrated. Despite a small angle magnetization misalignment along the contact, the remanence is high in all cases. The switching characteristics are shown to deteriorate after high temperature annealing, especially for the amorphous CoFeB FM due to the onset of crystallization.

In this work we study the magnetic properties of 4-nm-thick permalloy films deposited into flat elliptical holes with an aspect ratio of 2:1 and short axis ranging from 2000 down to 70 nm. The holes are patterned into 50- and 200-nm-thick SiO 2 dielectric by e-beam lithography. The magnetization switching characteristics of the embedded magnetic elements were probed by localized magneto-optical Kerr effect and magnetic force microscopy measurements. It is shown that the switching mode, field and distribution depend on the hole depth and very strongly on the element's size, especially when the short axis shrinks below 100 nm. The results are compared with micromagnetic simulations.

Nanoimprinting techniques are an attractive solution for next generation lithography methods for several areas including photonic devices. A variety of potential applications have been demonstrated using nanoimprint lithography (NIL) (e.g. SAW devices, vias and contact layers with dual damascene imprinting process, Bragg structures, patterned media) [1,2]. Nanoimprint lithography is considered for bridging the gap from R and D to high volume manufacturing. In addition, it is capable to adapt to the needs of the fragmented and less standardized photonic market easily. In this work UV-NIL has been selected for the fabrication process of 3D-photonic crystals. It has been shown that UVNIL using a multiple layer approach is well suited to fabricate a 3D woodpile photonic crystal. The necessary alignment accuracies below 100nm were achieved using a simple optical method. In order to obtain sufficient alignment of the stacks to each other, a two stage alignment process is performed: at first proximity alignment is done followed by the Moire´ alignment in soft contact with the substrate. Multiple steps of imprinting, etching, Si deposition and chemical mechanical polishing were implemented to create high quality 3D photonic crystals with up to 5 layers. This work has proven the applicability of nanoimprint lithography in a CMOS compatible process on 3D photonic crystals with alignment accuracy down to 100nm. Optimizing the processes will allow scaling up these structures on full wafers while still meeting the requirements of the designated devices.

The feasibility of a stress sensor based on giant magneto-resistance (GMR) on a flexible polyimide substrate is presented. Therefore, a stack system with a GMR effect of up to 8.6 % has been deposited on a polyimide substrate and patterned to micrometer scaled sensor elements. An in-plane tensile stress was applied to the sensor to achieve a rotation of the anisotropy of the magnetostrictive free layer. The magneto-optical and magneto-resistive effect was measured. The stress dependence of the Co50Fe50 free-layer magnetization was measured up to an elongation of 2.5% in a CoFe/Cu/CoFe spin valve. The magneto-optical results are compared to the resistance loops of the sample. Furthermore, the normalized sensor output is shown as a function of the applied stress at several bias fields and at the remanent state.

We report a structural and electrical study of sputter-deposited SiO2/MgO barriers for developing magnetic Si-based transistors. We propose that SiO2/MgO tunneling barriers may utilize spin-filtering by achieving crystalline MgO (001) while reducing spin-scattering due to the Si/SiO2 interface. We find that MgO (

In this work we present the electrical properties of sputter-deposited ferromagnetic (FM) Schottky diodes and MgO-based tunnelling diodes to n-doped (0 0 1) silicon. The effective Schottky barrier height (SBH) has been evaluated as a function of the FM electrode (Co70Fe30, Co40Fe40B20 and Ni80Fe20), the silicon doping density (1015 to 1018 cm−3), the MgO tunnelling barrier thickness (0, 1.5 and 2.5 nm) and post-deposition annealing up to 400 °C. The ideality factors of the Schottky diodes are close to unity, indicating transport by thermionic emission and the absence of an interfacial oxide layer, which is confirmed by transmission electron microscopy. The effective SBH is found to be approximately 0.65 eV, independent of the FM material and decreasing with increasing doping density. The changes induced by high temperature annealing at the current–voltage characteristic of the Schottky diodes depend strongly on the FM electrode. The effective SBH for the tunnelling diodes is as low as 0.3 eV, which suggests a high density of oxide and interface traps. It is again independent of the FM electrode, decreasing with increasing doping density and annealing temperature. The inclusion of MgO leads to higher thermal stability of the tunnelling diodes. The measured contact resistance values are discussed with respect to the conductivity mismatch for spin injection and detection.

We present a TEM/STEM study of the structure and thermal stability of Co/AlOx/Si, CoFe(B)/MgO/Si and FeNi/SiOx/Si magnetic junctions deposited directly on patterned Si. In all three types of junctions the films are uniform and continuous. Annealing at 300 at 550 ?C does not change their structure. CoFe and CoFeB layers remained amorphous after the annealing process.

This work investigates the spin-torque-related dynamics of nonuniform magnetic vortexlike states in spin-valve nanocontacts, employing an unpinned artificial antiferromagnet as polarizer and amorphous CoFeB as free layer. Subgigahertz spectra are obtained for contacts of 150–200 nm in diameter. Low critical current density and reversibility of the dynamic spectra with respect to the current are obtained. The spectral power and linewidth depend on the in-plane magnetic field, assuming maximum, respectively minimum, values within the free layer’s magnetization switching. For certain field and current windows metastable dynamic states are clearly demonstrated.