29 results on '"Tiwari, Satish Chandra"'
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2. Queuing theory and communication networks
3. Capital structure, competitive intensity and firm performance: an analysis of Indian pharmaceutical companies
4. A closed-loop ASIC design approach based on logical effort theory and artificial neural networks
5. Determinants of WCM of Indian listed firms: A GMM regression approach
6. Corporate Environmental Information Disclosure in India: Role of Board Characteristics
7. Intellectual Property Rights in Semi-Conductor Industries
8. Impact of US Economic Crisis and Fed Policy on Emerging Market Economies: Evidence from BRICS Nations.
9. Intellectual Property Rights in Semi-Conductor Industries
10. Do Financial Constraints Matter in Accessing Agricultural Loan? Organic vs. Conventional Farmers.
11. Stakeholders' Perception of CSR Practices: Evidence from Indian Companies.
12. Risk Measurement of Indian Banks: A CSRISK Analysis.
13. Corporate Environmental Information Disclosure in India: Role of Board Characteristics.
14. Evaluating the Impact of Corporate Governance Determinants on Risk and Profitability of Indian Firms.
15. Mergers and Efficiency Gains: A Case of Indian Banks
16. Application of GARCH Models for Volatility Modeling of Stock Market Returns: Evidence from Indian Stock Exchange.
17. Corporate Governance, Capital Structure and Financial Performance: An Analysis of Indian Automobile Industry.
18. State-of-the-Art Master Slave Flip-Flop Designs for Low Power VLSI Systems
19. A Modified Implementation of Tristate Inverter Based Static Master-Slave Flip-Flop with Improved Power-Delay-Area Product
20. Automated transistor width optimisation algorithms for digital circuits
21. A comprehensive comparison between LE and LM-based methodologies for optimisation of digital circuits
22. Standard test bench for optimization and characterization of combinational circuits
23. A novel methodology for flip-flop optimization and characterization in NOC design space
24. Design and development of circuit optimizer using TCl and SPECTREMDL(SPICE) interface
25. Logical effort based automated transistor width optimization methodology
26. A high performance flip flop for low power low voltage systems
27. A Low Power High Density Double Edge Triggered Flip Flop for Low Voltage Systems
28. An Area and Power Efficient Design of Single Edge Triggered D-Flip Flop
29. A modified implementation of tristate inverter based static master-slave flip-flop with improved power-delay-area product.
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