1. Test raises questions about VHDL/Verilog interoperability
- Author
-
Meyer, Ernest
- Subjects
Integrated circuit design ,Circuit designer ,Cadence Design Systems Inc. -- Product information ,VDOC 454 (Simulation software) -- Testing ,Circuit design -- Product information ,Computer software industry -- Product information ,Compatible hardware -- Product information ,Upward/downward compatibility -- Product information ,Computer-aided design -- Product information ,Very high speed integrated circuits -- Product information ,Compatible software -- Product information ,Testing -- Product information ,Forward compatibility -- Product information ,Interoperability -- Product information - Abstract
Test raises questions about VHDL/Verilog interoperability If the VHSIC hardware description language (VHDL) is going to be used for documenting designs, then a particular VHDL file must produce an unambiguous […]
- Published
- 1990