Search

As IoT is getting a thriving development, IC technology has stepped into the nano-meter era. For advanced 28 nm process and beyond, the device pitch becomes smaller. As a result, the coupling effect increases rapidly, degrading the performance of the critical design block, such as sense amplifiers in SRAM design. In addition, the process variation needs to be carefully addressed. In this paper we introduce an improvement over traditional latch type sense amplifier. The modification employs additional coupling effect in order to cancel out the device coupling observed in original design. The improved design shows a significant yield improvement based on the Monte-Carlo simulations under various operating conditions. The layout pattern modification is also presented, demonstrating an alternative sense amplifier implementation to address the coupling effect at negligible power and area overhead. [ABSTRACT FROM AUTHOR]

Ab initio calculations on the anisotropic relaxation of a CuO/TiO2 surface under electric fields and the visible light absorption of these relaxed surfaces are reported. We compare the relaxation of the CuO/TiO2 surface under the electric fields in the direction of [001] or [010]. Fewer Cu–O bonds with highly coordinated Cu-ions are found in the CuO/TiO2 relaxed surface under the electric field in the [010] direction. The Cu–O bonds in the interface of the CuO/TiO2 surface led to an improved visible light absorption in the polarization direction of [001]. The CuO/TiO2 relaxed surface under the electric field in the [010] direction exhibits a more effective absorption of visible light. However, the electric field in the [001] direction induces more relaxation on the CuO/TiO2 surface, breaking the Cu–O bonds. This leads to the partial reduction of CuO to Cu2O on the CuO/TiO2 relaxed surface under the electric field in the [001] direction and inefficient absorption of visible light is observed for this surface. [ABSTRACT FROM AUTHOR]

The ab initio calculations about the properties of the interstitials doping in the rutile TiO2 and their impact on the transport coefficients are reported. As the doping of the Zr or Ti interstitials in the TiO2, the lattice Ti4+ ions acquire the excess electrons so reduced to the Ti3+ or Ti2+ ions. However, the Cu interstitials could not lose enough electrons to reduce the lattice Ti4+ ions. Furthermore, the Ti or Cu interstitials in the ZrO2 also are unable to promote the lattice Zr4+ ions to form the lattice Zr3+ or Zr2+ ions. The high transport coefficients are observed in the defected TiO2 with the Ti or Zr interstitials as the high concentration of the Ti3+ or Ti2+ ions. So, the Zr interstitials are the favorable choice for the extra-doping to improve the transport properties in the TiO2-based resistive random access memory. [ABSTRACT FROM AUTHOR]

Power consumption is becoming a pressing issue in SRAM cell design. Recent research shows that SRAM power contributes a key part of the whole chip power consumption. In this paper, we present a new 6T-SRAM cell structure for nano-scale technology with stability of low power application by using separate write and read operation. Simulation results with standard 65nm CMOS technology show the correct operation, the speed is closed to the traditional 6T cell, power consumption reduces about 22.45 % during write 0. In particular, this structure maintains its data with leakage current and positive feedback in idle mode which can greatly improve the power consumption of the nano-scale SRAM. [ABSTRACT FROM AUTHOR]

ICs for portable applications need high integration and low supply voltage. Because of high integration, more noise propagates onto the supplies. So a low voltage, high PSR LDO is needed. In this paper, such a LDO is proposed. The simulation results show that the PSR is - 78dB at 1 kHz and the minimum supply vohage is 0.9V. [ABSTRACT FROM AUTHOR]