1. A comparison of plasma-induced damage on the reliability between high-k/metal-gate and SiO2/poly-gate complementary metal oxide semiconductor technology
- Author
-
Weng, Wu-Te, Lee, Yao-Jen, Lin, Horng-Chih, and Huang, Tiao-Yuan
- Subjects
- *
COMPARATIVE studies , *PLASMA gases , *RELIABILITY in engineering , *GATE array circuits , *SILICON oxide , *COMPLEMENTARITY (Physics) , *METAL oxide semiconductors , *FIELD-effect transistors , *PLASMA instabilities - Abstract
Abstract: This study examines the effects of plasma-induced damage (PID) both on advanced SiO2/poly-gate and Hf-based high-k/dual metal-gates transistors processed with advanced complementary metal–oxide-semiconductor (CMOS) technology. In addition to the gate dielectric degradations, this study demonstrates the PID impacts on transistor reliability including the positive bias temperature instability (PBTI) of n-channel metal–oxide-semiconductor field-effect transistors (MOSFETs) and the negative bias temperature instability (NBTI) of p-channel MOSFETs with gate dielectric thickness scaling. This study shows that high-k/metal-gate transistors are more robust against PID than conventional SiO2/poly-gate transistors with similar physical thickness. Finally this study proposes a model that successfully explains the observed experimental trends in the presence of PID for advanced high-k/metal-gate CMOS technology. [Copyright &y& Elsevier]
- Published
- 2010
- Full Text
- View/download PDF