Electrical Properties of Metal-Induced Laterally Crystallized p-Type LTPS-TFT With High- $\kappa $ ZrTiO4 Gate Dielectric Featuring Low Equivalent-Oxide-Thickness.

In this paper, we investigated the electrical properties of a metal-induced laterally crystallized (MILC) p-type low-temperature polycrystalline-silicon thin-film transistor (LTPS-TFT) using high- \kappa ZrTiO4 (ZTO) gate dielectric. With the orthorhombic-ZTO (111) preferred crystal system, the gate-stack with a low equivalent-oxide-thickness (EOT) of 4.1 nm and high permittivity of 50 achieve high dielectric quality by showing a low interfacial trap density ( N_{\mathrm{ it}}) of 3.5\times 10^{11} cm ^-2 eV ^-1 near the mid-gap traps. From these results, the MILC p-type LTPS-TFT exhibits a record subthreshold slope of 80 mV/decade, which is attributed to the low N\mathrm{ it} and EOT. In addition, the high-hole field-effect mobility of 250 cm2/Vsec at 1 MV/cm and high I\mathrm{\scriptscriptstyle ON}/I\mathrm{\scriptscriptstyle OFF} ratio of 1.5\times 10^8 were observed. From the reliability evaluation, the degradation in the positive-bias stress, hot-carrier stress, and self-heating stress was dramatically superior to the conventional LTPS-TFT with SiO2 gate dielectric. These results confirm that the ZTO dielectric holds a great potential for the next-generation LTPS-TFTs. [ABSTRACT FROM AUTHOR]