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Performance and Reliability Codesign for Superjunction Drain Extended MOS Devices.

Authors :
Somayaji, Jhnanesh
Bhat, M. S.
Kumar, B. Sampath
Shrivastava, Mayank
Source :
IEEE Transactions on Electron Devices. Oct2017, Vol. 64 Issue 10, p4175-4183. 9p.
Publication Year :
2017

Abstract

Conventionally, integrated drain-extended MOS (DeMOS) like high-voltage devices are designed while keeping only performance targets for a given application in mind. In this paper, for the first time, performance and reliability codesign approach using 3-D TCAD has been presented for various superjunction (SJ) type DeMOS devices. In this context, how to effectively utilize the SJ concept in a DeMOS device for System on Chip applications, which often has stringent switching and RF performance targets, is explored in detail in this paper. Moreover, design and reliability tradeoffs for switching and RF applications are discussed, while considering two unique sets, one with fixed breakdown voltage and other with fixed ON-resistance. Finally, hot carrier generation, safe operating area concerns, and electrostatic discharge physics are explored and compared using 3-D TCAD simulations. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
00189383
Volume :
64
Issue :
10
Database :
Academic Search Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
125755824
Full Text :
https://doi.org/10.1109/TED.2017.2733043