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Experimental gm/{I}{D} Invariance Assessment for Asymmetric Double-Gate FDSOI MOSFET.
- Source :
-
IEEE Transactions on Electron Devices . Jan2018, Vol. 65 Issue 1, p11-18. 8p. - Publication Year :
- 2018
-
Abstract
- Transconductance efficiency ( gm/{I}D ) is an essential design synthesis tool for low-power analog and RF applications. In this paper, the invariance of gm/{I}D versus normalized drain current curve is analyzed in an asymmetric double-gate (DG) fully depleted MOSFET. This paper studies the breakdown of this invariance versus back-gate voltage, transistor length, temperature, drain-to-source voltage, and process variations. The unforeseeable invariance is emphasized by measurements of a commercial 28-nm ultrathin body and box fully depleted Silicon-on-Insulator (SOI) (FDSOI) CMOS technology, thus supporting the gm/{I}D -based design methodologies usage in DG FDSOI transistors sizing. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189383
- Volume :
- 65
- Issue :
- 1
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Electron Devices
- Publication Type :
- Academic Journal
- Accession number :
- 127950516
- Full Text :
- https://doi.org/10.1109/TED.2017.2772804