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GEPDFs: Path Delay Faults Based on Two-Cycle Gate-Exhaustive Faults.
- Source :
-
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems . Jul2022, Vol. 41 Issue 7, p2315-2322. 8p. - Publication Year :
- 2022
-
Abstract
- Path delay faults model small delay defects that affect the operation of the circuit when they accumulate along a path. For lines on a path, the propagation conditions can be related to those of transition faults. Two-cycle defect-aware, cell-aware and gate-exhaustive faults model delay defects with more complex activation conditions than transition faults. This article observes that detecting gate-exhaustive faults along a path results in the detection of small delay defects with more complex activation conditions than transition faults. Such path delay faults are referred to as gate-exhaustive path delay faults. This article defines gate-exhaustive path delay faults and describes a path selection procedure to support test generation. The experimental results for benchmark circuits demonstrate the possibility of detecting gate-exhaustive path delay faults. [ABSTRACT FROM AUTHOR]
- Subjects :
- *LOGIC circuits
*INTEGRATING circuits
*INTEGRATED circuits
Subjects
Details
- Language :
- English
- ISSN :
- 02780070
- Volume :
- 41
- Issue :
- 7
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
- Publication Type :
- Academic Journal
- Accession number :
- 157551938
- Full Text :
- https://doi.org/10.1109/TCAD.2021.3105913