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Design of Class-E Amplifier With MOSFET Linear Gate-to-Drain and Nonlinear Drain-to-Source Capacitances.

Authors :
Wei, Xiuqin
Sekiya, Hiroo
Kuroiwa, Shingo
Suetsugu, Tadashi
Kazimierczuk, Marian K.
Source :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Oct2011, Vol. 58 Issue 10, p2556-2565. 10p.
Publication Year :
2011

Abstract

This paper presents expressions for the waveforms and design equations to satisfy the ZVS/ZDS conditions in the class-E power amplifier, taking into account the MOSFET gate-to-drain linear parasitic capacitance and the drain-to-source nonlinear parasitic capacitance. Expressions are given for power output capability and power conversion efficiency. Design examples are presented along with the PSpice-simulation and experimental waveforms at 2.3 W output power and 4 MHz operating frequency. It is shown from the expressions that the slope of the voltage across the MOSFET gate-to-drain parasitic capacitance during the switch-off state affects the switch-voltage waveform. Therefore, it is necessary to consider the MOSFET gate-to-drain capacitance for achieving the class-E ZVS/ZDS conditions. As a result, the power output capability and the power conversion efficiency are also affected by the MOSFET gate-to-drain capacitance. The waveforms obtained from PSpice simulations and circuit experiments showed the quantitative agreements with the theoretical predictions, which verify the expressions given in this paper. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
15498328
Volume :
58
Issue :
10
Database :
Academic Search Index
Journal :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers
Publication Type :
Periodical
Accession number :
65933896
Full Text :
https://doi.org/10.1109/TCSI.2011.2123490