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3-D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link.
- Source :
- IEEE Journal of Solid-State Circuits; Apr2010, Vol. 45 Issue 4, p856-862, 7p
- Publication Year :
- 2010
-
Abstract
- This paper describes a three-dimensional (3-D) system integration of a full-fledged processor chip and two memory chips using inductive coupling. To attain a 3-D communication link with a smaller area and lower power-consumption, shortening the link distance and preventing signal degradation due to unused inductors are important challenges. Therefore, we developed a new 3D-integrated wire-penetrated multi-layer structure for a shorter link distance and an open-skipped-inductor scheme for suppressing signal degradation. In addition, to avoid undefined-value propagation in stacking multi-memories using an inductive-coupling link, we proposed a memory-access-control scheme with a pinpoint-data-capture scheme. We demonstrate that three fabricated chips can be successfully AC-coupled using inductive coupling. The power and area efficiency of the link are 1 pJ/b and 0.15 mm²/Gbps, respectively, which are the same as those of two-chip integration. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189200
- Volume :
- 45
- Issue :
- 4
- Database :
- Complementary Index
- Journal :
- IEEE Journal of Solid-State Circuits
- Publication Type :
- Academic Journal
- Accession number :
- 50915640
- Full Text :
- https://doi.org/10.1109/JSSC.2010.2040310