Effects of postdeposition annealing ambient on hysteresis in an Al2O3/GeO2 gate-dielectric stack on Ge.

We report on the effects of postdeposition annealing ambient on the hysteresis observed in the C-V measurement of Al2O3/GeO2 gate-dielectric stacks fabricated on Ge substrates. The results indicate that two types of oxide trap are responsible for the observed hysteresis: a type-I oxide trap that causes persistent C-V hysteresis and a type-II oxide trap that disappears when gate voltage is biased once in the accumulation region. We show that both types of oxide trap reside in the capacitor annealed in O2 ambient, but that only the type-II oxide trap resides in the capacitor annealed in N2 + 10% H2. Time-domain measurements of absorption current suggest that holes injected into the gate-dielectric stack induce the electronic deactivation of the type-II oxide trap. [ABSTRACT FROM AUTHOR]