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Design of Al2O3/LaAlO3/SiO2 Gate Stack on Various Channel Planes for High-Performance 4H-SiC Trench Power MOSFETs
- Source :
- Diffusion and Defect Data Part B: Solid State Phenomena; August 2024, Vol. 358 Issue: 1 p79-87, 9p
- Publication Year :
- 2024
-
Abstract
- An Al<subscript>2</subscript>O<subscript>3</subscript>/LaAlO<subscript>3</subscript>/SiO<subscript>2</subscript> gate stack is designed and implemented on various trench-gate channel planes for high-performance trench power MOSFETs. The designed high-k gate stack achieves a significant enhancement in the gate blocking capability (~1.73X) and maintains a low interface state density (D<subscript>it</subscript>), in comparison to the SiO<subscript>2</subscript>­ gate. Moreover, owing to the implementation of the high-k gate stack, the high-k trench gate MOSFETs conduct a drain current of approximately 1.3 times larger than that of the SiO<subscript>2</subscript> trench gate MOSFETs on all 24 channel planes at the same overdrive voltage (V<subscript>gs</subscript>-V<subscript>th</subscript>) of 10 V. An analysis of the mobility limiting mechanisms on different channel planes reveals that the highest channel mobility on the (1120) channel plane is primarily due to its largest Coulomb scattering mobility and surface roughness scattering mobility.
Details
- Language :
- English
- ISSN :
- 10120394
- Volume :
- 358
- Issue :
- 1
- Database :
- Supplemental Index
- Journal :
- Diffusion and Defect Data Part B: Solid State Phenomena
- Publication Type :
- Periodical
- Accession number :
- ejs67556893
- Full Text :
- https://doi.org/10.4028/p-9MknRR