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FPGA Implementation of Modular Multiplier in Residue Number System
- Source :
- IOTAIS
- Publication Year :
- 2018
- Publisher :
- IEEE, 2018.
-
Abstract
- This work presents a description of a highperformance hardware implementation of a Montgomery modular multiplier using a residue number system (RNS). An RNS can be considered as self-defense against simple power analysis (SPA) and differential power analysis (DPA) attacks, and can be used for public-key cryptography, such as the Rivest, Shamir and Adleman (RSA) cryptosystem and elliptic curve cryptosystems (ECC). Various kinds of security are required for Big Data analysis. The proposed RNS-based modular multiplier is suitable for public-key cryptography that can be used for Big Data security. It is implemented on field-programmable gate-array (FPGA) technology and optimized by trying different variants of the Montgomery Algorithm on it. The proposed RNS-based modular multiplication takes only 22 ns on the Xilinx Virtex-II FPGA. In addition, it needs relatively few resources on the FPGA, needing only 68 slices.
- Subjects :
- 0209 industrial biotechnology
Modular arithmetic
Computer science
business.industry
Cryptography
02 engineering and technology
Residue number system
020202 computer hardware & architecture
Public-key cryptography
Power analysis
020901 industrial engineering & automation
Elliptic curve cryptosystem
0202 electrical engineering, electronic engineering, information engineering
Cryptosystem
Hardware_ARITHMETICANDLOGICSTRUCTURES
Arithmetic
Elliptic curve cryptography
Field-programmable gate array
business
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2018 IEEE International Conference on Internet of Things and Intelligence System (IOTAIS)
- Accession number :
- edsair.doi...........5ca9e8358ebea06066ee97c05b70af23
- Full Text :
- https://doi.org/10.1109/iotais.2018.8600881