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High lead solder failure and microstructure analysis in die attach power discrete packages

Authors :
Kenny Chiong
HongWen Zhang
Sze Pei Lim
Source :
2016 IEEE 18th Electronics Packaging Technology Conference (EPTC).
Publication Year :
2016
Publisher :
IEEE, 2016.

Abstract

High lead solder has a long history of use in the semiconductor industry as a die attach and interconnect material within high-current-density discrete power packages. The main reason high Pb solder is still an ideal material and cannot be replaceable until today because of its low resistance, high thermal conductivity for improved electrical performance, ductility to accommodate thermal expansion mismatches between joining materials, and a high melting temperature to sustain multiple reflow cycles. Typical high Pb die-attach materials are PbSn, PbSnAg or PbInAg alloys with the formation of intermetallic compounds which builds an adhesion layer between substrate or die metallization and bulk solder is critical for giving a strong reliable joint. Both Ag3Sn and Cu3Sn IMC layer are the common interface formation for TiNiAg backside die metallization on bare Cu leadframe. IMC interface Ag3Sn layer spalling with discrete structure embedded in the Cu3Sn IMC on the die side is not desirable as it may weaken the interface structure and thus leading to solder crack formation. It can happen at both the die side as well as Cu lead side. Spalling is associated with (1) the Sn content inside the solder, (2) the reflow profile being used (over heating). The overleaching Cu and the formation of Cu3Sn or Cu-rich particles inside the joint or even along the Ag3Sn layer at die side would make the joint harder and more brittle. In fact, vertical crack and the localized circular crack at the SiC die top was found right beneath the clip dimple during the reflow process. The localized circular cracking right beneath the dimple clip indicates a compression stress there along X and Y directions. Meanwhile, the vertical crack indicates the tensile stress along the X and Y directions inside the die. The CTE match between the substrate and Die or the clip and Die may warp the Si die. The hardened solder did not absorb the strain caused by the CTE mismatch and finally the stress from the mismatch strain lead to the crack of the Si die. The focus of this study is to investigate the die cracking and correlation between the BLT and IMC thickness formation will be explored as a part of this study as well throughout a series of DOEs performed to characterize the reflow process.

Details

Database :
OpenAIRE
Journal :
2016 IEEE 18th Electronics Packaging Technology Conference (EPTC)
Accession number :
edsair.doi...........eecf5746b94a80ef4f3ebef0d8295216