Design of an Analog Memory Cell in 0.25 micron CMOS process

CMOS VLSI technology is the most dominant integration methodology prevailing in the world today. Various signal-processing blocks are made using analog or digital design techniques in MOS VLSI. An important component is the Memory unit used to store data. In the project a memory cell has been built up using analog design method. A capacitor is used as the basic storage device. The main idea behind analog memory is that the analog value of the charge or voltage stored in the capacitor is the data stored. So the dielectric quality of the capacitor becomes important here to determine how effectively it can store some charge. Analog memory is a trade off between hardware cost, chip area and accuracy or quality of storage. The circuit of analog memory cell was developed starting from the idea that required voltage will be stored in a capacitor and MOS transistors were used as switches. A given technology of integration was used and hence the dielectric property of the capacitor was fixed. By suitable circuit configuration the analog voltage value was written to the capacitor, read out when required and the charge loss was also refreshed. The results obtained are as given in the thesis.
Comment: Bachelors Thesis submitted in partial fulfillment of the requirements for the degree of Bachelor of Technology (Honours) in Electronics and Electrical Communication Engineering at the Indian Institute of Technology - Kharagpur (year 2002), by Paramita Barai under the guidance of Prof. Dr. A. S. Dhar