1. A novel open-loop high-speed CMOS sample-and-hold
- Author
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Mousazadeh, Morteza, Hadidi, Khayrollah, and Khoei, Abdollah
- Subjects
- *
COMPLEMENTARY metal oxide semiconductors , *DIGITAL electronics , *LOGIC circuits , *ELECTRONIC systems - Abstract
Abstract: A new open-loop high-speed CMOS sample-and-hold is presented. Based on new method for further reduction of voltage-dependent charge injection, a new CMOS sample-and-hold was designed. Simulation results confirm the effectiveness of this method. Over 10dB improvement in signal-to-noise ratio, compared to the signal-to-noise ratio of conventional bottom plate sampling S/Hs was achieved with this method. A comparison between newly designed S/H and the bottom-plate sampling S/H is presented. [Copyright &y& Elsevier]
- Published
- 2008
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