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In order to suppress the torque ripple of an open-end winding permanent-magnet synchronous machine (OEW-PMSM), a q-axis current injection method is typically employed but the disturbances caused by the third flux linkage parameter mismatch can augment the torque ripple. To solve this problem, in this paper, first, a zero-sequence current (ZSC) and zero-sequence back-EMF observer (ZCBO) are proposed based on an adaptive sliding mode control, which is able to simultaneously estimate ZSC and zero-sequence back EMF under varying conditions. Based on this ZCBO, the estimated ZSC and zero-sequence back EMF could compensate for the one-step control delay and suppress the aforementioned disturbances. Second, although central hexagon modulation is employed in the predictive current control (PCC) scheme, zero-sequence voltage (ZSV) still exists in the zero-sequence path due to the dead time of the inverter, affecting the predictive accuracy of the ZCBO. To accurately establish the ZCBO, the ZSV caused by the dead time of the inverter is considered in the ZCBO. Finally, a comparative study of two types of methods is presented, and simulations established by MATLAB software and experimental confirmations are carried out to verify the effectiveness of the proposed PCC scheme in this paper. [ABSTRACT FROM AUTHOR]

This paper presents a 5-level inverter topology for open-end induction motor drives by using a single dc source. The open stator windings of the drive are supplied with a 3-level flying capacitor inverter from one end and capacitor-fed 2-level inverter from another end. The voltage ratio of the dc link to the capacitor in 2-level inverter is maintained at 4:1 ratio to generate five-level voltage output. The capacitor in 2-level inverter is balanced by the switching redundant vector combinations from both the inverters while the floating capacitors in the 3-level inverter are balanced by using redundant switching states. The proposed topology gives 5-level operation with less number of floating capacitors and power semiconductor switches compared to other existing topologies. Also, the balancing of the capacitors is independent of load power factor and modulation index. Further, the generalization of the proposed dual inverter scheme for any n-level inverter is also included in this paper. The experimental results and required analysis are also presented to validate the inverter scheme. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

Reduced switch active phase converters (APC) are cost-effective solutions for running three-phase loads from single-phase grids. This paper proposes a novel auxiliary-capacitor-based APC (AC-APC) for this application. The combination of the topological location of the auxiliary capacitor and the control of the AC-APC reduces current stress on the semiconductor devices. In this paper, a selection criterion for the optimal auxiliary capacitor value is formulated to reduce the device currents in such a way that the overall efficiency is enhanced. This paper presents a comparative analysis of converter volt-ampere (VA) rating and device power loss for conventional H-bridge active front-end and inverter-based topology, APC, and AC-APC. To evaluate the efficacy of the proposed AC-APC, an experimental study is conducted on the APC and the AC-APC feeding a 3-hp three-phase induction motor. At a full load of $\text{2.5}\,\text{kW}$ and $\text{0.8 } \text{power factor}$ , the measured maximum efficiency of the AC-APC is $2\%$ higher than that of the APC. Analytical evaluation of converter currents and device power loss are in close agreement with experimental observations. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper presents a new topology based on a modified class-E resonant inverter used as an LED series current regulator. The proposed topology behaves as a controllable nondissipative impedance that adjusts the current flowing through the lamp. In this circuit, the LED is placed at the dc side of the class-E inverter, in series with the input filter inductance. The power handled by the ac side is sent back to the input by means of two diodes. Despite the addition of these two diodes, the converter maintains all the advantages of the class-E inverter: low component count, simple control, and extremely low switching losses. The LED current can be controlled with a small variation of the operating frequency. This way, the low-frequency current ripple of the lamp can be strongly reduced even when there is a considerably high input voltage excursion, such as the one expected in electrolyticless high-power-factor LED ballast. This paper proposes a simplified methodology based on the fundamental approach aiming to design and build a laboratory prototype. The prototype is designed in order to minimize the effect of LED voltage in the output current. This way, the input voltage ripple can be canceled using a simple feedforward control. [ABSTRACT FROM AUTHOR]

Impedance source inverters have experienced a fast evolution since the first release of the Z-source inverter in 2003. This evolution is not limited to improving the structure of the different topologies but also includes their modulation and control schemes in order to reinforce their performance from many perspectives. Accordingly, many modulation schemes have been proposed in different research activities, but the full differences among these modulation schemes, including their effect on the switching losses, are not clear yet to the researchers. Hence, this research activity is aimed at introducing a comprehensive review of these different modulation schemes employed for the three-phase impedance source inverters, which is enhanced with a comparative assessment. In this paper, different modulation schemes are classified and reviewed, introducing an important benchmark in order to identify the basic differences between these modulation schemes. In other words, from this paper, the concept of classifying the different modulation schemes and the mandatory equations to implement each scheme can easily be drawn. Moreover, this review is essential for the next part, i.e., Part II, in which a comparative assessment is introduced. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper analyzes the combination in a cascaded H-bridge multilevel inverter (CHBI) based on transformers with the different turn ratios for increasing the voltage level and proposes the switching method for achieving the output voltage distribution among H-bridge cells (HBCs). The transformers used in this paper are connected to the output of the respective HBCs, and the secondary sides of all the transformers are connected in series for generating the final output voltage. Only one of the transformers, in particular, has a different turn ratio for increasing the output voltage level. In this paper, the possible turn ratio of the special transformer with a different turn ratio is discussed in detail, and a switching method based on the level-shifted switching method for the topology used in this paper is proposed. To verify the effectiveness of the proposed method, a three-phase 21-level CHBI is experimentally tested. [ABSTRACT FROM PUBLISHER]

Microinverters require high voltage gain capability for interfacing the low dc voltage output of photovoltaic (PV) module to single-phase ac grid. A two-stage nonisolated inverter is proposed in this paper, with a first boost stage and a second traditional pulse width modulated grid-tied inverter stage. The proposed boost stage consists of a coupled inductor added with a voltage multiplier to achieve the required high voltage gain at high efficiency and to operate over a wide input voltage range. Among the coupled inductor topologies, adding a clamp circuit is a common solution to limit the voltage spike caused by leakage inductance. In the proposed converter, the resonance between the coupled inductor and voltage multiplier is used to address the issue of voltage spike, thereby reducing both component count and device voltage stress. Detailed analysis and design procedure of the proposed converter is presented in this paper. Experimental results of a 250-W microinverter are presented to validate the proposed converter. [ABSTRACT FROM PUBLISHER]

This paper presents a new multilevel converter topology based on a variable or multilevel dc-link stage. This stage is shared by all inverter output phases, thus increasing the number of output voltage levels while reducing the overall number of active devices compared to traditional topologies; therefore, it is called a reduced multilevel converter (RMC). The converter is not capable of reducing the blocking voltage of the devices; hence, unlike other multilevel converters aimed at medium-voltage applications, this converter is interesting for low-voltage- and high-power-quality-demanding applications such as photovoltaic inverters, wind energy conversion systems, and uninterruptible power supplies. The main novelty behind the proposed concept is the basic dc cell used to generate the variable dc-link voltage, which includes a controlled path through the floating capacitors to provide the necessary degree of control to enable a shared multilevel dc link for all the output phases of the converter. The dc cells are connected in a multicell structure to increase the number of levels of the converter. A five-level version of the RMC topology is briefly compared to other five-level converters such as the five-level active neutral-point-clamped converter and the five-level flying capacitor converter. This paper presents the structure of the new topology with its operating principle, switching states, main characteristics, and experimental validation using finite-control-set model-predictive control. [ABSTRACT FROM PUBLISHER]

To improve light load efficiency, a three-phase photovoltaic (PV)-based microinverter may operate in single-phase, two-phase or three-phase mode depending on the available input power. Therefore, its dc-link capacitor may be subjected to large peak-to-peak voltage ripple when operating in phase skipping mode. This paper determines the minimum value of the dc-link capacitor by allowing the maximum acceptable voltage ripple on the dc link. This allows for the use of film capacitors instead of electrolytic capacitors in order to improve the microinverter reliability. Unfortunately, higher dc-link voltage ripple introduces harmonic distortion on the inverter output current waveform if it is not compensated for by the dc-link voltage controller. This paper proposes a simple synchronous control method to regulate the dc-link voltage with the presence of large voltage ripple. The dc-link voltage controller is synchronized with the phase-locked loop and samples the average value of dc-link voltage without introducing unwanted harmonics into the voltage sense path. Experimental results were obtained from a 300-W three-phase half-bridge microinverter prototype to verify the proposed dc-link voltage control performance. Inverter output current total harmonic distortion of 1.6% was achieved even though the dc-link peak-to-peak voltage ripple reached as high as 87 V with 219-V split dc-link voltage. Dynamic response is fast enough to easily track the most extreme ramp change in input PV power. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

Rising demand for distributed generation based on renewable energy sources (RES) has led to several issues in the operation of utility grids. The microgrid is a promising solution to solve these problems. A dedicated energy storage system could contribute to a better integration of RES into the microgrid by smoothing the renewable resource's intermittency, improving the quality of the injected power and enabling additional services like voltage and frequency regulation. However, due to energy/power technological limitations, it is often necessary to use hybrid energy storage systems (HESS). In this paper, a second-order sliding mode controller is proposed for the power flow control of a HESS, using a four-leg three-level neutral-point-clamped (4-Leg 3L-NPC) inverter as the only interface between the RES/HESS and the microgrid. A 3-D space vector modulation and a sequence-decomposition-based ac-side control allow the inverter to work in unbalanced load conditions while maintaining a balanced ac voltage at the point of common coupling. DC current harmonics caused by unbalanced load and the NPC floating middle point voltage, together with the power division limits, are carefully addressed in this paper. The effectiveness of the proposed technique for the HESS power flow control is compared to a classical PI control scheme and is proven through simulations and experimentally using a 4-Leg 3L-NPC prototype on a test bench. [ABSTRACT FROM PUBLISHER]

This paper proposes and validates model predictive control as an alternative control strategy for H-bridgeneutral-point-clamped (H-NPC) converters for single-phase grid-tied string photovoltaic (PV) systems. The presented control scheme achieves good quality current waveforms with unity power factor, dc-link voltage control, and neutral-point voltage minimization. Furthermore, the predictive controller has been further enhanced by including an average device switching frequency restriction and a $dv/dt$ mitigation. The main contribution of this paper is the avoidance of the potential leakage current due to parasitic capacitance of the PV modules by using a predictive model based control technique instead of modulated schemes and eliminating high-frequency common-mode voltage components. Experimental results during steady state and dynamic operation are presented to illustrate the behavior of the H-NPC converter commanded by the proposed control scheme. [ABSTRACT FROM AUTHOR]

In this paper, two topologies are presented for the enhanced-boost quasi-Z-source inverters (qZSI), namely continuous input current configuration and discontinuous input current configuration of enhanced-boost qZSI with two-switched impedance networks. Similar to enhanced-boost impedance-source inverters (ZSIs), these proposed inverter topologies possess very high boost voltage inversion at low shoot-through duty ratio and high modulation index to provide an improved quality output voltage. Compared to enhanced-boost ZSIs with two-switched Z-source impedance networks, these proposed inverter topologies share common ground with source and bridge inverter, overcome the starting inrush problem, and draw continuous input current and the lower voltage across the capacitors. Moreover, the input ripple current is negligible. This paper presents the operating principles and analysis of continuous input current configuration enhanced-boost qZSI with two-switched impedance networks and compares with ZSI, switched inductor ZSI, DA/CA-qZSI, and enhanced-boost ZSIs. The theoretical analysis is done and is validated through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

A single-phase common-mode transformerless grid-connected photovoltaic (PV) converter, which is based on the integration of two stages, is proposed in this paper. Transformer elimination in grid-connected PV systems has many advantages. It not only reduces cost, size, and weight but also increases the complete system efficiency. Since there is no galvanic isolation between grid and PV array, a leakage current may appear due to the PV parasitic capacitance to the ground, if this is not taken into account in the converter design. This paper presents a dc/dc boost converter integrated with a full-bridge inverter. The integration of these two stages reduces the ground leakage current. The neutral line of the grid is directly connected to the negative terminal of the PV array, eliminating any possibility of leakage current in this terminal. The principle of operation of the transformerless converter is analyzed, and a 200-W topology is experimentally tested. [ABSTRACT FROM PUBLISHER]

This paper proposes an effective sliding mode controller (SMC) for a grid-connected 7-level packed U-cell (PUC7) inverter. The aim is to design a simple controller that deals effectively with the complex control problem of the PUC7 inverter (multiobjective control problem). The selection of the control actions is achieved according to the system state error at every sampling time, regardless of the previous values, which makes the control technique model-independent. The control algorithm evaluates online two cost functions (one for each state error), which are derived on the basis of sliding mode theory, and it selects the optimal control input in order to satisfy the reaching conditions of the two cost functions. Compared with the existing solutions, the proposed SMC technique ensures lower average switching frequency by tuning the hysteresis bandwidth of the capacitor-voltage error. The fast implementation, needless of gains tuning, and simple design procedure are the main features of the proposed algorithm. Simulation and experimental results are presented to prove the effectiveness of the proposed technique in controlling the PUC7 inverter with high dynamic performance and robustness against disturbances and parameters mismatch. [ABSTRACT FROM AUTHOR]

This paper proposes a new multilevel inverter (MLI) topology that utilizes trinary sequence for the dc sources. It gives maximum output voltage level with minimum dc source and switch count when compared to other sequences, such as symmetric, natural, binary, and quasi-linear. This is due to the fact that the trinary sequence generates of all additive and subtractive combinations of input dc levels in the output voltage waveform. The concept is implemented on a 9-level asymmetric MLI using only four active devices. Multicarrier unipolar pulsewidth modulation technique is adopted to create the switching pulses. Theoretical calculation of total harmonic distortion in both voltage and current waveforms has been performed using asymptotic time domain formula. These values are compared with simulation and experimental values for different modulation indices. Power loss calculation for proposed topology is discussed with appropriate mathematical equations. [ABSTRACT FROM AUTHOR]

The conventional three-level inverter only has voltage buck capability. The quasi-Z-source three-level T-type inverter (QZS 3LT $^2$ I) has been proposed to realize voltage buck–boost operation. In this paper, we further propose a novel modulation scheme for the QZS 3LT $^2$ I to realize voltage boosting, reduce the common-mode voltage (CMV), and control the neutral-point voltage balance simultaneously. The proposed scheme adopts a large vector, a medium vector, a small vector with low CMV magnitude, a zero vector, and a shoot-through vector to generate the output voltage. According to sector number and neutral-point voltage difference, a p-type or n-type small vector with low CMV magnitude is properly selected to balance the neutral-point voltage. Shoot-through states are inserted within zero vector to boost the dc input voltage without affecting the ac output voltage. Dwell times of basic vectors are calculated through the revised volt–second balance equation. Furthermore, a coordinate control strategy between neutral-point voltage balance and voltage boosting is proposed. Doing so, the CMV magnitude can be restricted within one-sixth of dc-link voltage and neutral-point voltage imbalance can be effectively mitigated. The effectiveness of the proposed scheme is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

Input-series-output-parallel (ISOP) inverter system is very suitable for high dc input voltage and large ac output current power conversion applications. If this topology is applied to the grid-connected occasion, a bulky-capacity grid-connected inverter can be built with multiple small-capacity standardized inverter modules, which can significantly improve the reliability of the system operation and facilitate system design. In this paper, we investigate an ISOP LCL-type grid-connected inverter system, and put forward an optimized way for the topology of combined LCL filters first. Then, the inverter-side inductor current is carefully chosen as the controlled variable and thus a concise distributed control method is proposed to achieve multiple control objectives. On the basis of the presented distributed control, the redundant control technique is also provided to heighten the reliability of the grid-tied ISOP inverter indeed. Finally, a three-module prototype is built and the experimental results validate the effectiveness of the raised strategy. [ABSTRACT FROM AUTHOR]

In complex terrain, semi-airborne transient electromagnetic surveying can effectively solve the detailed exploration problems to replace ground manual operation. This method has the advantages of high efficiency, deep exploration depth, and high signal-to-noise ratio. As the core component of the system, the constant-current transmission converter determines the primary field source of the surveying system. High-accurate and stable-output electromagnetic transmission technology is the key issues of the surveying equipment development. In this paper, the converter circuit topology is designed in detail and a novel model reference adaptive proportional-integral control algorithm is put forward. The rising overshoot of current is eliminated and falling edge is linear. Finally, the 20-kW high-power transmitting instrument has been completed and used for field experiments. A large number of experimental results show that the transmitting instrument can achieve high-power constant-current emission, stable output, and good dynamic performance. And the steady-state accuracy is better than the traditional transmitter. The converter successfully improved the semi-airborne transient electromagnetic system detection capability and achieved satisfactory results in field experiments. [ABSTRACT FROM AUTHOR]

A multilevel drive can be realized by using an open-ended machine, fed from dual two-level inverters. The topology supplied from isolated dc sources is suitable for transportation electrification. In vehicular systems, it is essential that the isolated dc sources, comprising of battery packs, should discharge uniformly and maintain balanced dc voltage at the dc-link terminal. A simple carrier-based pulsewidth modulation (PWM) technique is presented in this paper, which can effectively regulate the power drawn between the two two-level inverters while maintaining the multilevel operation of the drive. The modulation technique can balance the instantaneous state of charge of independent battery packs and dynamically equalize the power flow from the two inverters, based on drive requirement. This will enhance the reliability of the propulsion system in electric vehicles. The operation of the proposed PWM technique has been validated through detailed simulation and experimental tests. [ABSTRACT FROM AUTHOR]

This paper deals with the analysis of the input dc-link voltage ripple in multilevel inverter based on H-bridge and level doubling network (LDN). The LDN is basically a half-bridge fed by a floating capacitor, with voltage self-balancing capability, recalling the concept of a flying capacitor configuration. The amplitude of the LDN voltage ripple is analytically determined considering both the low-order and the switching harmonic components. In particular, peak-to-peak distributions of voltage ripples over the fundamental period are analytically determined, making possible the design of dc-link capacitor relying only on the dc-voltage ripple requirements. The case study makes reference to negligible switching ripple in the output current. It well represents either grid connection or passive load having almost sinusoidal currents. Numerical simulations carried out by MATLAB/Simulink and a complete set of experimental verifications are given to confirm the theoretical developments. [ABSTRACT FROM AUTHOR]

In this paper, a novel structure of switched capacitor converter (SCC) is proposed. First, the basic unit of the proposed SCC is presented. After that, a generalized structure of the proposed SCC is discussed. The presented SCC uses one dc source, several switches, diodes, and capacitors to produce multistep dc boosted output voltage. The capacitors in the SCC can be charged in trinary asymmetrical pattern. A detailed comparative study between the proposed and other recently developed SCC structures is presented. It is shown that the proposed SCC can produce an output voltage level with lower total standing voltage and lower maximum switch stress voltage as compared to most of the suggested SCC structures. Further, a switched capacitor multilevel inverter (SCMLI) based on cross-switched multilevel inverter has been developed and analyzed for symmetric and asymmetric dc source configurations. For fair comparison with the existing SCMLI structures, the overall cost of the structures is compared based on a cost function (CF). The proposed SCMLI provides lower cost function/output voltage level (CF/NL) in comparison with most of the other SCMLI structures for both symmetric and asymmetric dc source configurations. Extensive experimental studies validate the operation and performance of the proposed SCMLI structure. [ABSTRACT FROM AUTHOR]

This paper presents a new resonant generator topology for dual-frequency induction heating. The design offers functionalities that are not present in other solutions, which allow the ratio of equivalent resistance to be controlled at high (HF) and medium (MF) resonant frequencies. A simulation is performed of its interactive work during dual-frequency induction heating, using a specially developed software algorithm. The simulation combines coupled numerical calculations of the electromagnetic and thermal fields during dual-frequency heating of the workpiece with the analysis and modification of the resonance frequencies and power at HF and MF, in accordance with a user-imposed duty cycle. The results are used as the basis for a 100-kW physical model of the generator. The proposed LCLC topology for a dual-frequency resonant inverter with adjusted series inductance allows better use of the ac–dc power supply system, easier implementation of sequential dual-frequency heating, and easier control of MF and HF power waveforms. [ABSTRACT FROM AUTHOR]

The nine-arm modular multilevel converter (9A-MMC) has been recently proposed as a reduced MMC topology variation for six-phase drive applications, with 25% reduction in the number of employed arms and associated components, compared to a standard dual three-phase MMC, however with a limited output voltage amplitude. This paper proposes a hybrid 9A-MMC comprised of half-bridge submodules (SMs) in both the upper and lower arms, and full-bridge SMs in the middle arms. By employing the negative-voltage state of the full-bridge SMs, the hybrid 9A-MMC avoids the limitations imposed on the dc-link voltage utilization, while achieving further reduction in the component count, compared to a standard 9A-MMC with identical half-bridge SMs. The operating principles of the proposed hybrid 9A-MMC are illustrated with mathematical analysis, whereas its characteristics are verified through both simulation and experimentation. An assessment of the proposed topology quantifying its employed components is also provided, in comparison to other MMC-based six-phase machine drives. [ABSTRACT FROM AUTHOR]

In this paper, a new topology for half-bridge Z-source inverter is proposed. The proposed topology has only one impedance network. Unlike to the conventional half-bridge inverter, the proposed topology can provide zero voltage level at the output. It also increases output voltage level and stabilizes it in the desired value. Capacitor voltage stress in the proposed topology is low, and, therefore, nominal voltage of capacitor and cost decreases. In this paper, the steady-state analysis of the proposed inverter in two new operations which are named synchronous operation of diodes and asynchronous operation of diodes is conducted based on mathematics calculations. A method to obtain high-voltage gains by cascading the Z-network and combining middle inductors is presented that leads to cost, size, and weight reduction. Comparison among the proposed converter with conventional ones shows its excellent performance. The experimental results have good agreement with analytical analysis for the proposed topology. [ABSTRACT FROM PUBLISHER]

This paper proposes a hybrid modulation method for a dual-output five-leg indirect matrix converter topology. The proposed control technique combines a space vector modulation scheme (SVPWM) applied to the rectifier stage so as to control the input currents and a new digital scalar modulation scheme (DSPWM) designed to control the two loads output voltages. A generalized expression of the output voltage references is also developed showing the capability of the proposed method to control more than two independent loads without requiring additional mathematical development. Furthermore, a new modified expression of the output voltages references is proposed to enable the correct operation of the converter under unbalanced grid voltages. Also, this paper proposes a detailed mathematical analysis that allows evaluating the effect of output loads unbalances on the input current harmonic content. Simulation and experimental results are provided to show the effectiveness of the proposed theoretical investigations and confirm the capability of the proposed method to control multiple drive systems as well as ac input currents. [ABSTRACT FROM AUTHOR]

Zero-common-mode-voltage (CMV) operation of multilevel inverters results in reduced dc-bus utilization and reduced linear modulation range. In this paper, a method to increase the linear modulation range for zero-CMV operation without increasing the dc-bus voltage using a cascaded multilevel inverter with a single dc supply is presented. Using this method, the peak fundamental output voltage can be increased from 0.499 to 0.637  \textV\text{dc} with zero CMV inside the linear modulation range. Also, various pulse width modulation (PWM) switching sequences are analyzed in this paper, and the PWM sequence that gives minimum current ripple is used for the zero-CMV operation of the inverter. The inverter topology with single dc supply is realized by cascading a two-level inverter with two floating-capacitor-fed full-bridge modules. Simulation and experimental results for steady-state and dynamic operating conditions are presented to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a sliding-mode control (SMC)-based scheme for the variable-speed direct-driven wind energy conversion systems (WECS) equipped with a permanent magnet synchronous generator connected to the grid. In this paper, diode rectifier, boost converter, neutral point clamped inverter, and L filter are used as the interface between the wind turbine and grid. This topology has abundant features such as simplicity for low- and medium-power wind turbine applications. It is also less costly than back-to-back two-level converters in medium-power applications. The SMC approach demonstrates great performance in complicated nonlinear systems control such as WECS. The proposed control strategy modifies reaching law (RL) of the sliding mode technique to reduce chattering issue and to improve total harmonic distortion property compared to conventional RL SMC. The effectiveness of the proposed control strategy is explored by simulation study on a 4-kW wind turbine, and then verified by experimental tests for a 2-kW setup. [ABSTRACT FROM PUBLISHER]

This paper presents a model predictive control technique applied to a dual-active bridge inverter where one of the bridges is floating. The proposed floating bridge topology eliminates the need for isolation transformer in a dual inverter system and therefore reduces the size, weight, and losses in the system. To achieve multilevel output voltage waveforms, the floating inverter dc-link capacitor is charged to the half of the main dc-link voltage. A finite-set model predictive control technique is used to control the load current of the converter as well as the floating capacitor voltage. Model predictive control does not require any switching sequence design or complex switching time calculations as used for space vector modulation; thus, the technique has some advantages in this application. A detailed analysis of the converter as well as the predictive control strategy is given in this paper. Simulation and experimental results to validate the approach are also presented. [ABSTRACT FROM PUBLISHER]

This paper presents an improved five-level bidirectional converter (iFBC) controlled by finite control set model predictive control (FCS-MPC). This control strategy consists in using the discrete time nature of the iFBC to define its state in each sampling interval. Using FCS-MPC the switching frequency is not constant; however, it is suitable to follow the current reference with low total harmonic distortion (THD). The iFBC prototype that was specially developed for obtaining experimental results is described in detail along the paper, as well as its principle of operation, power theory, and current control strategy. The iFBC was experimentally validated connected to the power grid through a second-order LfCf passive filter operating as an active rectifier and as a grid tie inverter. For both operation modes, the experimental results confirm the good performance (in terms of efficiency, low current THD, and controlled output voltage) of the iFBC controlled by FCS-MPC. [ABSTRACT FROM PUBLISHER]

This paper presents a three-phase open-end winding induction motor drive. The drive consists of a three-phase induction machine with open stator phase windings and dual-bridge inverter supplied from a single dc voltage source. To achieve multilevel output voltage waveforms, a floating capacitor bank is used for the second of the dual bridges. The capacitor voltage is regulated using redundant switching states at half of the main dc-link voltage. This particular voltage ratio (2:1) is used to create a multilevel output voltage waveform with three levels. A modified modulation scheme is used to improve the waveform quality of this dual inverter. This paper also compares the losses in the dual-inverter system in contrast with a single-sided three-level neutral point clamped converter. Finally, detailed simulation and experimental results are presented for the motor drive operating as an open-loop v /f controlled motor drive and as a closed-loop field-oriented motor controller. [ABSTRACT FROM PUBLISHER]

This paper introduces a sliding mode control (SMC) strategy for three-phase dynamic voltage restorers (DVRs) with a 12-switch voltage source inverter. The compensating voltage references needed in the SMC strategy are generated by an adaptive notch filter (ANF), which exhibits excellent performance under grid voltage anomalies such as voltage sags, swells, and unbalanced and distorted grid voltage conditions. The consequence of using the ANF eliminates the use of phase-lock loop or frequency-lock loop and low-pass filter, which makes it distinguishable from the existing reference signal generation solutions. In addition, the use of the SMC strategy with its attractive properties makes the control implementation simple. Theoretical results are supported by simulation results as well as real-time laboratory results over a range of grid voltage anomalies. These results show that the proposed control strategy not only offers an excellent dynamic response independent from the parameter variations and disturbances but also compensates the voltage sags, swells, and harmonics on the load terminals under the defined limits of the IEEE-519 standard. [ABSTRACT FROM AUTHOR]

This paper presents a new reconfiguration module for asymmetrical multilevel inverters in which the capacitors are used as the dc links to create the levels for staircase waveforms. This configuration of the multilevel converter makes a reduction in dc sources. On the other hand, it is possible to generate 13 levels with lower dc sources. The proposed module of the multilevel inverter generates 13 levels with two unequal dc sources (2VDC and 1VDC). It also involves two chargeable capacitors and 14 semiconductor switches. The capacitors are self-charging without any extra circuit. The lower number of components makes it desirable to be used in wide range of applications. The module is schematized as two back-to-back T-type inverters and some other switches around it. Also, it can be connected as a cascade modular which leads to a modular topology with more voltage levels at higher voltages. The proposed module makes the inherent creation of the negative voltage levels without any additional circuit (such as H-bridge circuit). Nearest level control switching modulation scheme is applied to achieve high-quality sinusoidal output voltage. Simulations are executed in MATLAB/Simulink and a prototype is implemented in the power electronics laboratory in which the simulation and experimental results show a good performance. [ABSTRACT FROM AUTHOR]

This paper proposes and experimentally assesses two zero-sequence current control strategies that allow continuous operation of the three-phase dual-inverter drive using an open-end winding permanent magnet synchronous machine (PMSM) when freewheel diodes (or semiconductor switches) in either inverters fail open circuit. With an identified failure present, the proposed control strategies inject zero-sequence current to bias the phase current(s) of the faulted phase(s) such that the phase current(s) are unipolar, thereby eliminating current flow in the device(s) that have failed. Two possible injection modes are proposed. The first mode injects the minimum required zero-sequence current to bias the current in the phase that has a semiconductor open-circuit failure(s). The injected zero-sequence current varies over a fundamental cycle. This minimizes the increase in total rms currents in the phases yielding higher torque capability in fault conditions. The second mode injects a zero-sequence current that has a constant value over a fundamental cycle to bias all three-phase currents appropriately. This mode is used if more than one phase has suffered a fault. Additional thermal and current stresses resulting from both techniques were assessed and compared. A detailed electromagnetic torque model was also developed to demonstrate that the zero-sequence current does not affect the average torque output. Experimental results verify the theoretical treatment and are used to examine the advantages of techniques and show the improvement in the maximum available torque under fault conditions. [ABSTRACT FROM AUTHOR]

This paper presents a high-efficiency inverter with the aid of the soft-switching technology, which is accomplished by the resonance of the in-series inductance with the snubber capacitance. The equivalent circuit of the quarter-phase ultrasonic motor is initially deduced, based on which the topology along with the operations of the novel inverter is subsequently presented. The configuration of the new quarter-phase inverter shows its uniqueness in terms of the shared arms and the especially designed snubber capacitance in comparison with the existing inverters. The circuit analysis infers that the dead time of the inverter is the key factor to arrive at the zero-voltage-switching or the zero-current-switching operations. Experimental measurements have demonstrated that the efficiency of the whole drive increases by a factor of 1.25 after replacing the traditional inverter with the proposed one. It should also be noted that the proposed inverter in association with the design method of the dead time not only can work for the quarter-phase ultrasonic motor, but also can be applicable for other kinds of quarter-phase devices. The soft-switching operations are achieved in the quarter-phase inverter for the first time, whose amplitudes of the output voltage and switching frequency are not required to be constant any more. [ABSTRACT FROM AUTHOR]

The development of a photovoltaic ac module composed of a high static gain nonisolated dc–dc converter with current source output characteristic followed by an unfolding low-frequency inverter is presented in this paper. The operation of the dc–dc converter with high static gain and with reduced switch voltage is obtained using the Cuk converter integrated with the switched-inductor technique. The nonisolated structure allows the elimination of the volume and losses of the power transformer and leakage inductance, and an output filter configuration is proposed to reduce the high-frequency ground leakage current. The grid-tied inverter operating in a discontinuous conduction mode (DCM) allows a sinusoidal output current with low harmonic distortion (THD = 3.72%) to be obtained without current control loop and without the use of a current sensor at the output. The maximum power point tracking operation is obtained without the use of the current sensor. The DCM operation increases the current stress, but the proposed converter presents two switches and two input inductors sharing the input current in these components. The theoretical analysis, design procedure, and experimental results are presented for a prototype with a dc input voltage Vi = 30 V, an ac output voltage Vo = 127 V, and output power Po = 180 W. [ABSTRACT FROM AUTHOR]

In this paper, a fixed switching frequency model predictive current controller is designed and implemented on a sensorless five-level packed U-cell (PUC5) inverter interfacing the utility. The predictive control methodology is based on a voltage vector generation technique for the cost function optimization by nullifying its derivative. The aim of the controller is to allow a fixed-frequency operation with no iterations while operating as a utility line current regulator. A pulsewidth modulator based on employing PUC5 redundant switching states fixes the PUC5 auxiliary dc bus capacitor voltage to its desired level with no necessity of a regulator; the overall technique reduces system complexity with less sensors and no loops in the predictive algorithm making it suitable for industrial applications. System discrete model is developed and experimental results verify the performance of the designed controller in making a fast response in regulating the grid current and balancing the capacitor voltage. [ABSTRACT FROM AUTHOR]

Conventional two-level as well as multilevel voltage-source-inverter topologies with a hexagonal voltage-space vector structure generate low-order harmonics in the machine terminal voltages when operated beyond the linear modulation range in variable speed drive application. Progressing from hexagonal to a higher sided polygonal voltage-space-vector structure (VSVS) suppresses significant low-order harmonics throughout the modulation range. In addition, the linear modulation range will also be enhanced very near to the base speed. In this paper, for the first time, the generation of a multilevel 24-sided VSVS using a single dc source for induction-motor drives is proposed. A cascaded topology with a dc-source-fed flying-capacitor inverter and two low-voltage capacitor-fed H-bridge cells forms the power circuit. The features and advantages of the proposed scheme are validated through experimental results and discussions. [ABSTRACT FROM AUTHOR]

A novel fault-tolerant inverter topology of the multiport dual-stator doubly salient electromagnetic machine (MDDSEM) drive is proposed in this paper for high reliability applications such as automotive and aerospace industries. The proposed topology adopts four diverter switches to reconnect the floating phase windings under the fault conditions and reconfigures the dual inverter to be a five-leg inverter; the output performance could be maintained after a single-phase open-circuit or short-circuit fault of the dual inverter. Compared with the traditional fault-tolerant method of the dual inverter for the MDDSEM, the lower cost and smaller volume of the proposed fault-tolerant system can be achieved. The operation principle and the optimized commutation method of the five-leg inverter for the MDDSEM are analyzed to eliminate the unexpected phase current drop so that the torque performance in the fault-tolerant mode could be improved. The effectiveness and feasibility of the proposed fault-tolerant topology and control strategies are verified by the simulation and experimental results of a 24/16-pole MDDSEM that includes both steady-state and dynamic processes with the standard angle control method and the advanced angle control method. [ABSTRACT FROM AUTHOR]

In this paper, a novel integrated interleaved dual-mode time-sharing inverter (IIDMI) is proposed for grid-tied transformerless photovoltaic (PV) applications. While the dual-mode time-sharing conversion technique ensures minimum losses, the IIDMI also retains the advantages of interleaved topologies, such as low total harmonic distortion of the ac current with reduced filtering requirements, increased power density, and reduced current and thermal stresses of power devices. The leakage current problem, which is a main concern with the transformerless PV inverters, is solved by increasing the frequency of the main side band of the common-mode voltage above the resonance frequency of the common-mode impedance, while avoiding high switching losses. The current control, especially at transitions between the buck and the boost modes of operation, is highly improved by utilizing a fast-response deadbeat control scheme. The working principles of the IIDMI are explained in detail, and a 2.2-kW experimental prototype is implemented to confirm the theoretical achievements. [ABSTRACT FROM AUTHOR]

This paper investigates dc-link capacitor optimization for three-phase photovoltaic-based microinverters. This concept minimizes the storage capacitance by allowing greater voltage ripple on the dc link. Therefore, the microinverter reliability can be significantly increased by replacing electrolytic capacitors with film capacitors. However, this intentionally increased voltage ripple can introduce harmonic distortion on the output current of the inverter stage if it is not mitigated by the dc-link voltage controller. For this purpose, a robust and accurate dc-link voltage control is proposed to filter this ripple while regulating the dc-link voltage without using any additional circuit components. The experimental results on a 400-W three-phase half-bridge microinverter prototype validate the theoretical analysis of the dc-link capacitor optimization and show that a significant reduction of the dc-link capacitor requirement can be achieved. The proposed high-accuracy dc-link voltage controller is also implemented on this prototype to demonstrate very low harmonic distortion of the inverter output current while tightly regulating the dc-link voltage even during transients. [ABSTRACT FROM AUTHOR]

Usually, the parallel-compensated inductive power transfer (IPT) topology fed by a current-source inverter is controlled through variable switching frequency and fixed 50% duty cycle method. This enables the system to operate at resonance frequency, which drifts due to load and other parameter variations. Owing to this control constraint, the load requirements are fulfilled by adding extra dc–dc chopper at the output. This paper presents a new control technique for a parallel–series/series IPT network, fed from a full-bridge current-source inverter to meet the load demand directly by an inverter. Therefore, the extra chopper stage at the output side of the converter is eliminated. The control goals are achieved through a two-loop control method, where the inner input current loop controls the source current and the outer output current loop meets the load requirements. The detailed steady-state operation, converter design, small-signal modeling, and control are reported, and experimental results obtained from a 1.6-kW lab prototype are included to verify the mathematical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a zero-sequence circulating current (ZSCC) control scheme for the multiparalleled three-level T-type inverters (3LT2Is). Based on the analysis with the proposed generalized model of multiparalleled 3LT2Is, it is seen that the ZSCC is influenced by the circuit parameters, duty cycles, and the circulating currents of the l th and first 3LT2I. To mitigate the circulating currents, a deadbeat control strategy for n-paralleled (n≥3) inverters is proposed, which is realized by adjusting the duty cycle of the small vectors in each PWM sampling period. Compared with the conventional PI control method, the ZSCC spike is mitigated with the proposed scheme, thus improving the quality of the output currents. Also, the reliability of the 3LT2Is system is improved because such a scheme only needs the information about the ZSCC and zero-sequence duty ratio in the l th and the first inverter. The proposed method can also be applied to the neutral-point-clamped converters. Simulation and experimental results verify the effectiveness of the theoretical analysis and the proposed method. [ABSTRACT FROM PUBLISHER]

Microinverters operating into the single-phase grid from new energy source with low-voltage output face the challenges of efficiency bottleneck and twice-line-frequency variation. This paper proposed a multilevel inverter based on bridge modular switched-capacitor (BMSC) circuits with its superiority in conversion efficiency and power density. The topology is composed of dc–dc and dc–ac stages with independent control for each stage, aiming to improve system stability and simplify the control method. The BMSC dc–dc stage, which can be expanded to synthesize more levels, not only features multilevel voltage gain but also partially replaces the original bulk input capacitor and functions as an active energy buffer to enhance power-decoupling ability between dc and ac sides. In dc–ac stage, the control strategy of optimized unipolar frequency doubling sine-wave pulse width modulation is proposed to improve the quality of output waveform. Meanwhile, the multilevel voltage phase has been optimized to further reduce the power loss. Finally, a prototype has been built and tested. Associated with the simulation, the experimental results validate the practicability of these analyses. [ABSTRACT FROM PUBLISHER]

A new pulsewidth modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is proposed in this paper. A three-level NPC inverter is completely mature and very well-established topology in high-power applications. However, the three-level NPC inverter has an inheritance problem of the neutral-point voltage unbalancing due to the split dc-link capacitors. This structure can cause large neutral-point voltage ripple. Furthermore, output currents of the three-level NPC inverter are distorted by the neutral-point voltage ripple. Therefore, the neutral-point voltage must be controlled. In this paper, a new DPWM method using two different offsets for the neutral-point ripple reduction is proposed and the effectiveness of the proposed DPWM method is verified by using the simulation and the experimental results. [ABSTRACT FROM PUBLISHER]

The success of electric vehicles (EVs) greatly depends on battery size, cost, lifetime, and capacity. The battery capacity of EVs has to contain enough energy to allow EV users to drive, at least, the minimum distance that internal combustion engine vehicles take. However, even with very efficient EVs and combining all the available highly efficient EV technologies, the battery capacity still needs to be large. Thus, one alternative to reduce the battery size is to improve the charging infrastructure by implementing sufficient public/private fast-charging locations, which will significantly increase the EV driving range with relatively low battery capacities. However, this kind of infrastructure requires charging with higher current capability, due to the high power levels involved in the fast-charging process. In this paper, a bidirectional dc/dc converter with six inverter legs connected to a three-phase output is proposed. The converter is similar to a three-phase dual-active-bridge (DAB) converter with more inverter legs in parallel. These additional inverter legs increase the converter current capability, without affecting the DAB main characteristics, preserving similar modulation techniques and DAB advantages. An accurate study about the proposed topology is carried out in this paper, and simulations and experimental results are shown for a 20-kW prototype, validating the theoretical analysis. [ABSTRACT FROM PUBLISHER]

A four-level five-phase open-end winding (OeW) drive topology is introduced in this paper. The drive comprises a five-phase induction machine with open-end stator windings, supplied using two two-level voltage-source inverters with isolated and unequal dc-link voltages, in the ratio 2 : 1. The topology offers the advantages of a modular structure with fewer semiconductor components and has a greater potential for fault tolerance, as compared with an equivalent single-sided four-level drive. Due to the large number of switching states, development of a suitable space vector pulsewidth-modulation (PWM) method can be challenging. Hence, this paper examines the implementation of two-level-shifted carrier-based PWM methods. The effect of dead time on the drive performance is discussed, and it is shown that simultaneous PWM switching of both inverters can lead to degraded output phase voltage waveforms. Detailed analysis of this phenomenon is presented, a solution is proposed, and the modified modulation techniques are incorporated in an experimental setup, at first in conjunction with $V/f$ control. Once the proof of concept has been provided, full field-oriented control is implemented in this OeW drive topology for the first time; detailed experimental testing is conducted, and results are reported. [ABSTRACT FROM AUTHOR]