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A multi-level boost topology based on a flying capacitor is compared in this work with the hybrid, multi-level, partial power processing topology already presented in the literature for use as a highly efficient and compact dc/dc stage in 1500-V, two-stage, grid-connected PV systems. Different variations of the resonant stage of the hybrid topology are analyzed and compared in terms of losses, volume and complexity. Full multivariable optimization is conducted for the multi-level boost topology with different number of levels and for all the analyzed variations of the resonant stage of the hybrid topology. Appropriately rated new classes of 650-V and 900-V WBG devices are included in the optimization algorithm. It is concluded that due to the dominant conduction losses and gap in the voltage rating of the commercially available WBG devices between 650V and 200V, increase of the number of levels over 4 leads to the deteriorated loss and volume performances. All the analysis related to the resonant stage of the hybrid topology is confirmed by detailed and comprehensive measurements of two prototypes of 4kW of nominal and 7kW of maximal power. Additionally, all the loss models applied in the optimization algorithms presented in this paper are confirmed by detailed measurements, thermal calibration and finite element thermal simulations of the wide bandgap devices and inductor designs employed in this work. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are playing a pivotal role in the power sector with potential applications, such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost, and higher efficiency compared with their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level voltage-source inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the dc-link capacitors and FCs. The generation of various output voltage levels and the limitation of the sinusoidal pulsewidth modulation control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared with the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. [ABSTRACT FROM AUTHOR]

With the rapid development of photovoltaic and fuel cell stacks, high voltage gain converters are urgently demanded. Conventional boost is limited by the exaggerated duty cycle, it is impossible to obtain a high voltage gain while ensuring efficiency. Therefore, a zero-voltage switching (ZVS)-modified SEPIC converter that combines a voltage multiplier cell with traditional SEPIC is proposed in this paper. With detailed parameters design process, this presented converter works at zero voltage switching (ZVS), while obtaining high voltage gain without extremely high duty cycle. Besides, voltage stress is also reduced and low-voltage component with lower parasitic parameters can be used, thus efficiency is maintained. In order to further improve the power density, an integrated inductor scheme is adopted in this paper without changing intrinsic working states of the two inductors. A 36-W prototype is built, and experiments are conducted to verify the advantages of the proposed converter. The efficiency is up to 91.5% at full load. [ABSTRACT FROM AUTHOR]

This paper presents a neutral-point deviation and ripple compensating control method applied to a three-level neutral-point-clamped (NPC) converter. The neutral-point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral-point of the dc link. This paper also proposes a control scheme compensating for the neutral-point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the switching functions and ac input currents are employed to accurately explain the behavior of three-level NPC converter. Simulation and experimental results are presented to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

A high-frequency high voltage gain discontinuous conduction mode coupled-inductor boost LED driver based on planar component is presented in this paper. GaN switch is adopted with lower conducting resistance and higher switching speed. Zero voltage switching (ZVS) is achieved at the same time to reduce high switching loss caused by high switching frequency. Compared with the previous work, the voltage gain is higher and efficiency is higher because of ZVS. This paper focuses on high efficiency; therefore, resonant gate driver is adopted and efficiency is increased by 0.6%. In terms of the coupled-inductor, planar component is used and parameter optimization is also proposed to realize lower loss, including wingding loss and fringing loss caused by the air gap. A 500 kHz 36 W prototype has been designed to demonstrate theoretical analysis. In addition, comparison of drive loss between the resonant gate driver used in this paper and conventional driver implemented by Si8271 is made, revealing advantages of the resonant driver. Obtained efficiency was up to 92.1% at full load. [ABSTRACT FROM AUTHOR]

Modular multilevel converter (MMC) has been a promising candidate in high voltage direct current (HVdc) transmission systems. Due to the features of simple structure, low cost, and low power losses, half-bridge (HB) is usually adopted as the submodule circuit in the traditional MMC. However, an HB submodule circuit-based MMC does not have the capability of blocking dc short-circuit fault, which obstructs the development of low-cost HVdc systems with overhead lines. In order to solve this problem, an MMC with active clamped T-type submodule (ACTSM) to own dc fault blocking capability is proposed in this paper. Compared with other submodule circuits, the proposed ACTSM has many features, such as symmetrical blocking capability, low power losses, low voltage stress, and low amount of independent drive signals. The topology, operation principle, dc fault blocking capability, and distribution of power losses of the ACTSM are presented in this paper. The effectiveness of the ACTSM-based MMC is validated by both simulations and experiments. [ABSTRACT FROM AUTHOR]

Achieving high efficiency and high power density features of intermediate bus converter (IBC) in data center application is very critical. This paper proposes a nonisolated switched-tank dc–dc converter (STC) to meet the high requirement of IBC. The proposed STC has fixed voltage conversion ratio. Theoretical analysis provides the guideline for designing resonant tank and nonresonant tank as well as selecting proper deadtime for the proposed circuit. With resonant operation feature of the proposed circuit, zero current switching is realized on all switching devices to help the high-efficiency operation of the proposed converter. Through the proposed design methodology in this paper, power loss on switching devices and planar inductors can be minimized. In addition, detailed power loss analysis and breakdown provide hints for further efficiency improvement. Simulation has been performed to validate the operating principle of the proposed STC. A designed 6x STC (450 W nominal/600 W maximum) based on eGaNFETs is demonstrated. With 54 V typical input voltage, the output of the 6x STC is 9 V. The GaN-based prototype achieves a peak efficiency of 98.55%. Also, it achieves 97.18% efficiency and 750 W/in3 power density at 450 W. [ABSTRACT FROM AUTHOR]

This paper presents a new modular ac/dc step-up soft-switched converter with unity turns ratio high-frequency transformers for medium-voltage (MV) dc grid in wind energy systems. In the proposed converter, the three-phase boost rectifier is combined with step-up resonant circuits and high-gain output rectifier modules (called voltage quadrupler modules) to form a modular step-up power conversion unit. As a result, the proposed converter is able to achieve very high voltage gain without using any medium-to-high frequency transformers with very large turns ratio, which greatly simplifies the insulation requirement and design of the high-frequency transformer. In addition, soft-switching operations are achieved in all the semiconductor devices to maintain high efficiency. The techniques to ensure voltage balancing across the dc-link capacitors and to achieve output short-circuit protection will be discussed in this paper. To realize high-frequency MV operation, silicon carbide (SiC) devices are utilized in the converter implementation on a 1.5 MW, 690 VAC/40 kV converter system to validate the performance of the proposed circuit. Experimental results on a 3.5 kW, 145 VAC/6.2 kV, 95.4% efficiency SiC-based laboratory-scale proof-of-concept prototype are then provided to highlight the merits of this work. [ABSTRACT FROM AUTHOR]

Multilevel converters with floating capacitors (FCs) are widely applied in recent years in a wide range of industrial applications from high-voltage direct current systems to high power drives. However, some FC topologies lack complete FC voltage balancing capability due to the inherent topology limitation or the insufficient switching state for capacitor balancing. This will result in large ripples on capacitors at low frequency (such as fundamental frequency), limiting their performance and application, particularly, when the fundamental frequency is very low in low-speed drive operations. Typical examples of those multilevel converters are modular multilevel converters (MMC), nested neutral-point-clamped (NNPC) converter, etc. In order to improve the FC balancing for this kind of multilevel converters, this paper proposes a carrier-based pulse-width modulation (PWM) method, named stair edge PWM method. This method can obtain sufficient redundant switching states for FC voltage balancing by producing multiple levels in one PWM period. The FC voltage balancing is thus achieved at switching frequency, which can greatly reduce the capacitor voltage ripple and therefore enable the use of much smaller FCs. Meanwhile, the voltage stress on each device and low $dv/dt$ feature are still the same as the normal multilevel operation, reserving two of the most salient features of multilevel converters. The proposed method also features much simpler and easier implementation compared with space-vector-based approaches, particularly when high-level converters are considered. An application example using a four-level NNPC converter is provided in this paper. The effectiveness and performance of the proposed method are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

This paper presents a single-stage nonisolated switched capacitor ac–dc converter for power-factor correction (PFC). This converter features reduced passive components, single switch, transformerless high voltage gain, and improves the power factor, reduces total harmonic distortion, and voltage stress across the switch. The peak current mode with a dynamic resonant perturbation scheme compensates the subharmonics that exist at zero crossing of the source current is implemented for PFC. In this paper, the principle of operation, large signal modeling of the circuit, and control method for the proposed PFC converter are provided. [ABSTRACT FROM PUBLISHER]

This paper presents a novel single source fed isolated gate driver circuit based on the dual-forward converter topology. The two forward converters are paralleled at the secondary side to achieve 0%–100 $\%$ duty cycle range together with galvanic isolation. The gate driver switching frequency is independent of the main pulse-width modulation frequency (PWM). As a result, the gate driver switching devices and magnetics are designed for high frequencies independent of the main PWM frequency. At high frequencies, problems of resonance due to parasitics become significant. This paper discusses this problem and proposes a novel solution to mitigate it. In addition, this paper also presents a novel solution and circuit to produce negative gate pulse for miller clamp. The proposed circuit can be used for any application, irrespective of switching frequency, thus making it a wide band generalized gate driver. The circuit is analyzed and verified experimentally. [ABSTRACT FROM PUBLISHER]

In this paper, an electric vehicle (EV) battery charger with interleaved Landsman converter (ILC) followed by a flyback converter, is designed and evaluated for improved power quality (PQ) charging of battery. A built-in wave-shaping is obtained at the charger front-end due to improved PQ characteristics of ILC. This PFC converter consists of two Landsman converter cells, which are designed in discontinuous conduction mode (DCM) to share the input and output currents. The current sharing at input results into lower input current ripple as well as peak current stress through the switch, is reduced. This, further improves the input current harmonics profile. Moreover, the reduced output voltage ripple gives reduced rms current in the output capacitor. A phase shift PWM scheme (PSPWM) is used for ILC and the duty cycle for the switches is selected below 50%. This allows the ripple cancellation at line and load sides. The interleaving at PFC stage as well as DCM based design ensures a low cost charging solution as compared to the conventional Landsman converter (CLC) based chargers in this power range. However, the flyback converter provides the current control during the charging of the battery in constant current (CC) and constant voltage (CV) regions. The harmonics spectrum of mains current follows the recommended PQ regulations over a range of varying line voltages and loadings. [ABSTRACT FROM AUTHOR]

This paper presents a new configuration of high gain (HG) single ended primary inductor converter (SEPIC) with a ripple-free input current to maximize the efficiency of the PV panel for standalone water pumping system (WPS). The ripple eliminating circuit combined with the HG SEPIC converter to achieve reduced ripples in photovoltaic (PV) current is independent to the duty cycle control and hence, it can be easily integrated to the main power circuit of configuration. This circuit does not need any active switches, control, or drive circuit for its execution. The ripple eliminating circuit yields a complete removal of the electrolytic capacitor connected across the PV array and significantly reduces the inductance of the HG SEPIC converter. It also improves the response and power density of the dc–dc converter. The large gain of dc–dc converter enables the use of low-voltage PV panel and minimizes the partial shading and parasitic capacitance effects on PV array source. Due to the substantial compatibility between natural characteristics of switched reluctance motor (SRM) drive and WPS, a four-phase SRM drive is utilized in the proposed scheme. In addition, a single current sensor based maximum power point tracking technique is utilized in the proposed system, which helps to reduce the cost and improve the accuracy of the overall system. Analytical, simulated, and experimental results of the developed system are presented to demonstrate the performance of the system. [ABSTRACT FROM AUTHOR]

The operating principle of the clamp circuits like clamping diodes and flying capacitor in three-level LLC converter is different from other three-level converters, because the mean value of the resonant tank current is always zero and pulse-frequency modulation control is generally used instead of pulsewidth modulation control. And the converter with only the clamping diodes or flying capacitor is difficult to realize voltage balance. In this paper, the characteristics of the three-level LLC converter with single clamp circuit are first analyzed. Then, the operation principle of the hybrid-clamped circuit under the unbalanced voltages on input capacitors is described with the mode analysis, based on which the mechanism for voltage autobalance is elaborated and the effects of two clamp circuits are derived. Then, the design of the clamping diodes and the flying capacitor is also involved. Finally, a three-level LLC converter prototype is built and the experimental results verify the validity of the theoretical analysis and design. [ABSTRACT FROM AUTHOR]

A modular quasi-resonant bidirectional dc–dc converter composed of half-bridge gallium nitride modules (HBGM) with reduced switch voltage stress is proposed in this paper. By using an auxiliary capacitor, a resonant circuit is formed to shape the current and voltage so that zero-voltage switching at turn-on instant is achieved. Since the switching loss dominates the power losses in a high-frequency dc–dc converter, the soft-switching performance leads to a noticeable reduction in the total loss; so, the operating temperature will decrease, and consequently, size of the heatsink will be reduced. The proposed circuit takes advantage of enhancement-mode gallium nitride (eGaN) switches regarding their small on-resistance RDS(on), low gate charge, and fast switching speed to improve both efficiency and power density. The main performance issue of adopting GaN switches in a bidirectional dc–dc converter is the high voltage stress of GaN devices, which is handled by connecting the HBGM in the active-clamped stacked configuration, as well as optimizing printed circuit board layout design. Finally, a 1 kW, 600 V laboratory prototype operating at 100 kHz is implemented to validate the proposed concept. [ABSTRACT FROM AUTHOR]

DC microgrid is gaining attraction and a recent trend in distribution power generation system due to penetration of renewables (especially photovoltaic or fuel cell). In this paper, a new triple-switch-triple-mode high step-up converter (TSTM-HS converter) is presented for dc microgrid applications. In the proposed converter, voltage lift technique is employed and range of duty cycle is extended by incorporating an additional switch in converter circuitry. By doing this, high voltage conversion ratio is achieved without using a transformer, coupled inductor, and multiple stages of switched capacitors. Moreover, the TSTM-HS converter operated in three modes with two types of the duty cycles to achieve low to high voltage conversion without using high duty cycle for each switch. The effects of difference in the inductance values on the regulation and operating behavior of the TSTM-HS converter are discussed. The continuous conduction mode and discontinuous conduction mode characteristics of the TSTM-HS converter are discussed in detail with steady-state analysis and boundary condition. The comparison is provided to highlight the benefits of the TSTM-HS converter. The selection of semiconductor devices and the design of reactive components are discussed for the TSTM-HS converter. The experimental results of the proposed converter are provided which validate the theoretical approach, performance, and feasibility of converter. [ABSTRACT FROM AUTHOR]

This paper introduces a new zero current switching topology for parallel balancing of serially connected batteries string. The main advantage of the balancing concept in this study is that energy is transferred only when the cells are unbalanced. As a result, the power losses are significantly reduced since no current circulates through the system when balanced. This has been enabled by a modification of an isolated series-resonant converter operating in a discontinuous conduction mode. A single transformer for two cells is used, as opposed to conventional isolated topologies that require a transformer per cell. The realization is simple and sensorless. Experimental results have been obtained by a prototype of two modules balancing four series-connected batteries. [ABSTRACT FROM AUTHOR]

This paper introduces a generalized control method based on the finite control set-model predictive control for a single-phase N-level flying capacitor multilevel rectifier used for solid state transformers. Unlike the conventional finite control set-model predictive control, the proposed method does not use the switching function to calculate the predicted value of the grid current. The proposed method also predicts the dc-link voltage without switching function so that it enables each leg voltages to be controlled stably and independently. Therefore, the number of states to be considered is significantly reduced, in addition to the computational time; and the level expansion of the flying capacitor multilevel rectifier is facilitated. In addition, since the cost function for controlling the grid current and that for controlling the voltage of the flying capacitor is separated, weighting factors are not required. The validity of the proposed method was verified by a simulation of a single-phase 11-level flying capacitor multilevel rectifier using Powersim software, and an experiment on a single-phase 5-level flying capacitor multilevel rectifier prototype. [ABSTRACT FROM AUTHOR]

The integration of switched-capacitor techniques into multilevel inverters (MLIs) with a dc source string contributes to the boosting of voltage gain, renders it particularly attractive in reducing the number of input dc sources in the series string. However, the recent two-stage MLI topologies suffer from high voltage stress across the backend H-bridge. Addressing this concern, an improved topology, namely the one-switched-capacitor integrated MLI (1SCI-MLI) is proposed in this paper. An extended topology of 1SC-MLI is also established by appropriate incorporation of another switched-capacitor circuit. The two proposed topologies are endowed with voltage boosting capability. They also feature low switch count and low number of dc sources. More importantly, they resolve the high voltage stress problem in the existing counterparts. Their corresponding operational analysis and comparisons with recent MLI topologies are discussed. Simulation and experimental results from a laboratory prototype are presented to validate the effectiveness of the proposed topologies. [ABSTRACT FROM AUTHOR]

Recently multilevel inverters (MLIs) have received wide attention from industry and academia, as they are changing into a viable technology for diverse applications. To produce high-quality output using less switch count, development of novel reduced switch MLI (RS MLI) topologies has been a focus of current research theme. This paper presents design and control of a switched-diode dual source single switch MLI (SDDS MLI). The generalized SDDS MLI is first designed using an asymmetric basic unit. Proposed SDDS MLI requires less switch count and driver circuit count compared with the few recently developed RS MLI topologies. To improve the voltage quality by eliminating targeted low-order harmonics, a modified version of fish swarm optimization algorithm is examined for computing optimum switching angles required to control the SDDS MLI. Moreover, suitability and superiority of the derived algorithm are established by comparing with traditional selective harmonic elimination techniques. The developed topology is investigated through several MATLAB simulations as well as experimental tests in the laboratory applying the modified control approach. [ABSTRACT FROM AUTHOR]

An improved bridgeless (BL) Cuk converter-based electric vehicle (EV) battery charger with high power factor and increased efficiency is designed and developed in this paper. It provides low cost and high-power-density-based charging solution for the EV. This charger incorporates less number of devices operating over one switching cycle, which reduces the additional conduction loss incurred by a diode bridge rectifier of the conventional charger. Hence, it improves the charger's efficiency. The added advantage of the proposed topology is that the unwanted capacitive coupling loop is removed, as well as the unwanted conduction through the body diode of the inactive switch in the previously developed BL Cuk converter is avoided. This significantly improves the charger's efficiency. For the constant current and constant voltage charging, the commands are synchronized by a flyback converter. The proposed charger draws a sinusoidal current from ac mains and the total harmonic distortion in the supply current is reduced to the limits specified by the IEC 61000-3-2 guidelines. The improved efficiency and power quality indices of the proposed charger are investigated to demonstrate its satisfactory charging operation at all operating conditions. [ABSTRACT FROM AUTHOR]

The hybrid modular multilevel converter with cascaded full bridges (HMMC-CFB) is a recently proposed dc fault tolerant converter topology for high-power applications. It has a director part (DP) consisting of a series of connected half-bridge submodules, and a wave-shaping part (WSP) composed of a series of connected full-bridge submodules (FBSMs). The submodules in DP avoid high voltage stresses and improve synchronization between DP and WSP by slowing down the change rate of DP output voltage. This slowdown is achieved by using a trapezoidal reference signal for DP. The WSP attenuates the voltage harmonics produced by DP. However, the energy exchanged by WSP changes with modulation index, which may cause improper voltage regulation of the submodule capacitors. This paper proposes a new control technique to regulate the energy exchanged by WSP, which uses a variable slope trapezoidal reference signal of DP. To obtain this slope, the feedforward and feedback controllers are used. The feedforward controller gives the value of slope depending on the modulation index (mv) to keep the energy exchanged by WSP nearly equal to zero, whereas the losses and nonideality of the converter are taken care of by the feedback controller. This technique guarantees proper voltage regulation of the submodule capacitors for all modulation indices. The efficacy of the proposed technique is confirmed using simulations and experimentations. This paper also presents a circulating current suppressing controller for HMMC-CFB. The proposed control schemes and dc fault tolerant capability of HMMC-CFB are tested on a grid-connected model built in PSCAD. [ABSTRACT FROM AUTHOR]

Three-phase voltage-source inverters typically feature a significant amount of dc energy storage to maintain a stiff dc bus. In these cases, the dc-link capacitor is sized to store enough energy to maintain several tens of cycles of ac output at the rated power. In this paper, we propose to reduce the size of the dc-link capacitor dramatically to store enough energy to provide just one high-frequency switching cycle of the ac output power. The dc bus is no longer stiff, and hence, classical sinusoidal pulse-width modulation cannot be used. However, the stored energy modulation (SEM) proposed herein synthesizes high-quality sinusoidal output voltage waveforms, even with such tiny dc-link capacitors. In SEM, the switching intervals of the interconnecting switches are carefully determined nonlinear functions of various operating parameters such as reactive component sizing, switching frequency, load levels, etc. This paper presents the analytical and detailed design development of the SEM approach along with circuit simulation, experimental results, and comparative evaluation of a dc-to-three-phase system example. [ABSTRACT FROM PUBLISHER]

This paper proposes a multilevel series compensator (MSC) to deal with voltage sags/swells, harmonic compensation, or reactive power compensation. Such a device can be considered as a dynamic voltage restorer or a series active power filter (Series-APF). The MSC can improve the power quality of loads located in stiff systems. The configuration is based on three-phase bridge (TPB) converters connected by means of cascaded single-phase transformers. This arrangement permits the use of a single dc-link. A generalization for $K$ -stages in which $K$ -transformers are coupled with $K$-TPB converters is presented. The topology permits generating a high number of levels in the voltage waveforms with a low number of power switches in comparison with a classic topology. The multilevel waveforms are generated by the converters through a suitable pulsewidth modulation (PWM) strategy that takes into consideration the transformer turns ratios. Modularity and simple maintenance make the proposed MSC an attractive solution compared with some conventional configurations. Model, PWM strategy, and overall control are discussed in this paper. Simulation and experimental results are presented as well. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel single-switch dc/dc converter for the future renewable electric energy delivery and management system to implement the distributed renewable energy resources (DRER). The DRER is responsible for the maximum power point tracking of the photovoltaic panel (PV) module and also for the control of central energy storage device. Due to the characteristics of the PV module and the dc-bus, the single power stage must provide low current ripple in the input and output terminals, must operate with output current and voltage regulation, and present a high-voltage conversion ratio. To achieve such features, this paper proposes a novel integrated Boost–Zeta converter. To avoid a complex modeling and control, we propose a disaggregation concept for this. Experimental results are presented for the purpose of operating the converter and also for the operation of the system. [ABSTRACT FROM PUBLISHER]

This paper presents an isolated auxiliary power supply for medium-voltage power electronics systems. The proposed converter comprises two stages: a non-isolated ac/dc stage that connects directly to the medium-voltage line, and an isolated dc/dc stage that provides 100-W output power at 24 V, with 10 kV isolation. The proposed modular ac/dc stage uses just one active semiconductor device per module, features an internal capacitor voltage balancing, and achieves power factor correction by employing predictive current control. High switching frequency operation of both converter stages enable a reduction in system size and weight when compared to traditional low-frequency transformer-based approach. The proposed converter is simulated and its operation is validated experimentally on a 100-W prototype. [ABSTRACT FROM AUTHOR]

This paper introduces a three-phase grid-connected inverter for commercial-scale photovoltaic systems. The circuit topology combines an ac-inductor-less active bridge with a parallel-connected pulsewidth modulation inverter acting as an instantaneous reactive power compensator. The active bridge, called a 120° conduction inverter, operates at a switching frequency equal to the grid frequency and outputs a 120° rectangular current, while the compensator eliminates the harmonic currents included in the rectangular current. The main advantage of this strategy is the reduction in size of the required ac inductor by a factor of 4, as well as the reduction of power losses in the switching devices. The theoretical analysis clearly shows that the compensator can synthesize a sinusoidal output current by controlling only instantaneous reactive power, thus eliminating the need for electrolytic capacitors. A 5-kW experimental setup validates the operating principle and the control method of the proposed inverter and exhibits an inverter efficiency as high as 99.2% with Si superjunction mosfets. [ABSTRACT FROM AUTHOR]

This paper presents the development, analysis, and performance evaluation of a new topology for an isolated dc power electronic converter (PEC). The proposed topology (called the reverse flyback dc PEC) is developed to process a discontinuous input voltage and produce a continuous output voltage. The reverse flyback dc PEC is operated based on charging the inductive element in the high-frequency transformer, while discharging the energy to the output side through on–off actions of the switching element, which is located on the secondary side of the high-frequency transformer. A prototype for the proposed reverse flyback dc PEC is constructed to evaluate its performance under different operating conditions. Performance results show that the reverse flyback dc PEC is capable of processing discontinuous input voltages with different duty ratios and maintaining continuous output voltages with a minor sensitivity to the load type of ratings. [ABSTRACT FROM AUTHOR]

This paper proposes a high-frequency isolated dc/dc converter, whose switching frequency is 20 MHz. Meanwhile, the switch voltage stress is reduced based on optimal switch impedance. In the proposed converter, the switch can operate in ZVS condition, which can help to reduce the switching loss. A mathematical model of the proposed high frequency converter is built, which provides an effective design method for the system parameters. Meanwhile, the design method for PCB air-core transformer has been proposed and depicted. To verify the feasibility of the proposed converter and mathematic model, a 10 W prototype is built. [ABSTRACT FROM AUTHOR]

In this paper, a highly reliable back-to-back (BTB) power converter is proposed for doubly fed induction generator-based wind turbines (DFIG-WTs). When a power switch open-circuit fault is encountered in either the grid-side converter (GSC) or the rotor-side converter (RSC), a four-switch three-phase (FSTP) topology is formed to avoid using redundant bridge arms, which reduces the power circuit complexity and minimizes the conduction and switching losses. A simplified space vector pulsewidth modulation technique is used to eliminate sector identification and complex trigonometric calculations. In addition, the influence of dc-bus capacitor voltage unbalance on the electromagnetic torque is analyzed in detail. The offset current components are calculated, and they are deducted from the reference values in the modified control strategies to suppress the dc-bus voltage deviation. Moreover, the power loss model of a BTB converter is analyzed in detail, and the efficiency study is performed in various post-fault situations. Simulations in MATLAB/Simulink are carried out to verify the performance of a DFIG-WT based on a FSTP BTB converter. Furthermore, the control hardware-in-the-loop setup with RSC and GSC separately simulated in a digital real-time simulator is applied for experimental verification of the proposed control strategy. [ABSTRACT FROM AUTHOR]

A switching-capacitor-based buck–boost converter (with common ground) for point of load applications is proposed in this paper. It is capable of operating in stand-alone buck or boost mode in addition to its primary operation of performing the buck–boost conversion. The striking feature of the proposed converter is low source current ripple content irrespective of its mode of operation (buck–boost, buck, or boost). First, feasible pulsewidth modulation schemes for the proposed converter are identified and thereafter the corresponding circuit performance analysis, steady-state analysis, and state-space modelling is established. Through steady-state analysis, voltage gain expressions are formulated and equations defining L-C components are derived in terms of their ripple quantities. The state-space models are used to formulate small-signal analysis and to obtain the relevant transfer functions required in the controller design. A voltage-mode/current-mode controller is designed, with a tradeoff in bandwidth, to control the proposed converter and transit it from buck to boost mode or vice versa seamlessly. A 30–55 W, 100 kHz, prototype point of load converter with 36-V input dc source is built to supply power at constant load voltage of either 48 or 28 V. The proposed converters’ effectiveness is demonstrated experimentally in terms of reduced source current ripple along with seamless transition from buck to boost mode and vice versa. [ABSTRACT FROM AUTHOR]

A discontinuous pulsewidth modulation (DPWM) strategy for three-level neutral-point-clamped (NPC) traction inverter drive for electric vehicles (EVs) with minimum switching loss for the full power factor (PF) range is developed and presented in this paper. Considering the dynamic loading conditions in an EV propelled by an induction motor (IM), the discontinuous modulation strategy is generalized to obtain minimum switching loss for a wide variations in load PF and modulation depth. The dynamic operating conditions in EV may render frequent unbalances in dc-link capacitor voltages in NPC inverter. It is demonstrated that the addition of an appropriate offset signal with the reference discontinuous signals generates compensating neutral current in the right direction, which can be used to mitigate existing unbalance in two dc-link capacitor voltages. Minimum switching loss at variable PF is attained by positioning the nonswitching clamped regions of the reference auxiliary signals according to the load PF. The effectiveness of the proposed scheme for a wide range of torque/speed variations is studied through simulation by developing a MATLAB/SIMULINK model of an IM traction inverter drive with field-oriented control strategy for closed loop control. Finally, the modulation scheme is validated through experimentation in a small-scale prototype NPC inverter with motor loads. [ABSTRACT FROM AUTHOR]

In this paper, a multipulse ac–dc converter fed multilevel inverter (MLI)-based indirect vector controlled induction motor drive (IVCIMD) is proposed for medium-power application. A 54-pulse ac–dc converter is utilized at the supply side to suppress the input current total harmonic distortion, as per the IEEE-519 standard. Mainly three separate isolated transformers are utilized and each transformer is configured as an 18-pulse ac–dc converter. Due to the phase shift in primary windings, these three transformers are reconfigured as a 54-pulse ac–dc converter. A 15-level binary-based cascaded MLI is utilized at the motor side to enhance the required performance of IVCIMD. A 15-level inverter is switched at fundamental frequency, which ensures the very low switching losses in the proposed IVCIMD. A modified nearest level modulation strategy is proposed to achieve fundamental switching frequency. The performance of the proposed IVCIMD is simulated at various operating conditions by utilizing Simulink/MATLAB platform. Simulated results are validated with experimental results on a developed prototype in the laboratory to show its usefulness for medium-power applications. [ABSTRACT FROM AUTHOR]

This paper presents the operation principle and benefits of a novel power converter topology named three-level two-stage decoupled active neutral point clamped (3L-TDANPC) converter, which is implemented based on a hybrid utilization of silicon (Si) insulated gate bipolar transistors (IGBTs) and silicon carbide (SiC) metal–oxide semiconductor field-effect transistors (mosfets). The 3L-TDANPC converter can achieve high efficiency with limited number of SiC mosfet modules while keeping balanced loss distribution among the switching devices, which helps increase the converter power ratings. In addition, in this 3L-TDANPC converter, the SiC mosfet has a potential to ride through short-circuit fault because of the presence of Si IGBTs. The key challenges that are associated with system resonant current are investigated and the methods to damp such resonant current are proposed and explained in detail. The simulation and experimental results based on a 1-MW 3L-TDANPC converter prototype confirm the expected benefits of this proposed converter and the effectiveness of the proposed resonant current damping methods. [ABSTRACT FROM AUTHOR]

In this paper, a fifth-order boost point-of-load converter is developed by cascading a modified fourth-order boost converter with a combination of L–C and diode. This topology has the following salient features: Single-switch topology, common ground between source and load, low-voltage stress across intermediate capacitors, and voltage gain same as other reported fifth-order boost converters with no common ground. Steady-state and dynamic analyses demonstrate the proposed converter's boosting feature and dynamic performance, respectively. A contoured robust Bode plot methodology is employed to design the robust voltage-mode controller to ensure load voltage regulation in the presence of uncertainties. The necessary and sufficient conditions under which the designed controller guarantees the load voltage regulation and robust stability are obtained. A step-by-step robust controller design procedure is outlined. The salient features of the proposed converter and its robust performance are studied analytically, using the MATLAB platform, and validated experimentally on a 60-W prototype module. [ABSTRACT FROM AUTHOR]

This paper presents a dual output power factor correction (PFC) converter for switched reluctance motor (SRM) drives. Here, a modified single-ended primary inductance converter (SEPIC) is proposed for a wide range of speed control and to achieve PFC at ac mains. The switching frequency of the converter is considered to be 20 kHz. The converter is designed to operate in the discontinuous conduction mode (DCM) of operation, which reduces the size of the output inductor. The DCM mode to obtain PFC also reduces the sensor requirement as compared to the continuous conduction mode (CCM), where two voltage sensors and one current sensor add to the drive cost. The drive is proposed for universal ac mains (90–270 V ac). Simulated and experimental results are demonstrated to validate the performance of the drive during different operating conditions. The input current total harmonic distortion is reduced to comply with an IEC 61000-3-2 standard. [ABSTRACT FROM AUTHOR]

Flyback/forward derived power converters offer operational simplicity, but require active clamping circuits to reduce switch voltage stress and improve the converter efficiency. This paper presents an active clamping circuit technique, which additionally ensures enhancement in the converter voltage gain. This is enabled by the proposed auxiliary circuit, which introduces a charged capacitor in series with the primary source during the energizing interval. Two circuits are designed on this principle, and design and operation of both are presented for discontinuous conduction modes. It is shown that the voltage gain of these circuits increases with increase in the leakage inductance, which is an improvement over existing converters. Also, in one circuit primary (secondary) winding, rms current is similar to (lower than) that in a typical ideal flyback converter, leading to improvement in power density. Operation and analyses of this variant are experimentally verified with a 400-V laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper investigates an ac–dc–ac multilevel power converter. The studied configuration is composed of two single-phase ac–dc–ac three-leg modules and series-connected H-bridges in the shared part of system. Because the proposed converter has shared legs between the input and output, it is employed in applications with same input and output frequency. Uninterrupted power supply and unified power quality conditioner are application examples for this converter. Such multilevel topology has lower dc-link voltage rating, which, consequently, presents low switch blocking voltages when compared to conventional topologies. System model, a space-vector pulsewidth modulation (PWM) strategy to symmetrical and asymmetrical dc-link voltages, and an overall control strategy to adjust the system variables are presented. A power flux analysis shows the operation zone in which the individual dc-link voltage balancing is possible. PWM and control strategies are developed to reduce the semiconductor total losses, harmonic distortion, and switching stress. Two ac–dc–ac multilevel conventional structures are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. [ABSTRACT FROM AUTHOR]

Pollution problems caused by fossil fuels have led to more investigations on renewable energy systems. Photovoltaic cells and fuel cells output low-level voltage than required; therefore, high gain dc–dc converters are used to boost this low voltage. The Z-source converter can be employed as dc–dc converter to boost the photovoltaic panel voltages. It also offers other advantages, such as clamped switched voltage, high voltage gain, isolation of energy source from the load, and positive polarity for output voltage; therefore, this is a good choice for high step-up applications. This paper presents analysis of a novel high step-up Z-source based dc–dc converter that has higher voltage gain than the Z-source converter. Furthermore, high efficiency, low device voltage stress, and wide voltage gain range make it a good candidate for photovoltaic and high voltage step-up applications. The proposed dc–dc converter is evaluated experimentally for converting 24-V dc input to 300-V dc output at 100 W and to validate the simulation results. [ABSTRACT FROM AUTHOR]

This paper proposes a multilevel flying capacitor dc/dc boost converter (FCBC) with a small capacitance of the flying capacitor for the reduction of converter size. In this paper, the design methods for the boost inductor and the flying capacitor in the n-level FCBC are principally and experimentally confirmed. Furthermore, the boost inductor is designed based on maximum product of voltage-time, regardless the number of level. Meanwhile, the minimum capacitance of the flying capacitor is designed based on the maximum switching device voltage stress, regardless of the output voltage ripple influences. Moreover, the achieved maximum efficiency of the designed three-level FCBC is 98.5% at the output power of 1 kW. Finally, the effectiveness of small capacitances of the flying capacitor in the three-level and five-level FCBCs is analyzed. The characteristics of the distorted voltage across the input voltage source and the boost inductor, and the distorted current to the output side (output capacitor and load) are investigated with several capacitances of the flying capacitors in the three-level and five-level FCBCs. As a result, it is experimentally confirmed that the distorted voltage is drastically reduced by increasing the number of level. Besides, the distorted current is almost the same although the number of level is increased. Therefore, based on the experimental results, it is shown that small capacitance of the flying capacitor can be used in the n-level FCBC without compromising the stability of converter operation. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid pulse width modulation-based discontinuous modulation (D-HPWM) strategy with dc-link voltage balancing for a three-level neutral-point-clamped (NPC) traction inverter drive. The results are then compared with continuous-hybrid-PWM (C-HPWM) to check the performance improvement. The HPWM strategy uses both the advantages of carrier- and space-vector-based PWM strategies. The duty cycles are generated using the carrier-based strategy to reduce the computational time and complexity of the system and redundant vector states are used to keep the two dc-link capacitor voltages balanced. As discontinuous PWM (DPWM) reduces the switching losses considerably compared to the continuous PWM, the DPWM strategy is developed in this paper for the HPWM-based strategy. Detailed comparison studies are then carried out in MATLAB/Simulink and PLECS to show the conduction and switching loss distribution with change in modulation index for different power switches. A 54.0-kW surface permanent magnet synchronous machine (PMSM) is used for this simulation studies. Moreover, the total inverter loss and losses in each insulated gate bipolar transistor (IGBT) are also compared. Detailed experimental performance analysis is also carried out with a scaled down prototype of a 6.0-kW surface PMSM, NPC inverter, and real-time emulator DSpace, to show the capacitor voltage deviation with both control strategies. [ABSTRACT FROM PUBLISHER]

Parallel ac-link universal power converters are a relatively new class of power converters that can be configured as dc–dc, dc–ac, ac–dc, and ac–ac. These converters are extensions of a buck–boost converter in which the current of the inductor is alternating and the input and output can have any number of phases with any forms, voltage amplitude, or frequency. By placing a small capacitor in parallel with the link inductor, all the switches can benefit from soft switching. The main limitation of the parallel ac-link universal power converter is its large number of switches. A three-phase ac–ac configuration requires 24 unidirectional switches. This paper proposes two topologies based on the parallel ac-link universal power converters that significantly reduce the number of switches. One of the proposed topologies reduces the number of switches in a three-phase ac–ac configuration to 16. The other topology reduces the number of switches to 10. The latter can offer galvanic isolation with only a single-phase high-frequency transformer. This paper presents the principles of the operation of the proposed topologies and evaluates them through simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a single-stage single-switch light-emitting diode (LED) driver that integrates a buck–boost circuit with a Class-E resonant converter by sharing single-switch device. The buck–boost circuit, working as a power-factor correction (PFC) stage, operates in the discontinuous conduction mode (DCM) to shape the input current. The Class-E converter steps down the voltage to drive the LED. For specific component parameters, the Class-E converter can achieve soft-switching on the power switch and two rectifier diodes, and reduce switch losses at high frequencies. Electrolytic capacitors are used in the proposed converter to achieve a lower cost, but the system reliability decreases. To overcome this disadvantage, film capacitors can be used, but the current ripple increases. Neglecting the cost, multilayered film capacitors are the best option, if higher reliability and lower current ripple are required. The proposed driver features high efficiency (90.8%), and a high power factor (PF) (0.995). In this paper, analytical results and design considerations at 100 kHz are presented, and a 100-W prototype with 110 \textV\text{AC} input was built to validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents an improved dc-link voltage balancing algorithm for a three-level neutral-point-clamped inverter by considering phase current direction. Detailed studies on the effects of change in load current direction on the dc-link capacitor voltages are presented. A maximum value of power factor is numerically derived, above which it affects the capacitor voltage balancing capability. Compared with the previously presented research work, the inputs to the space-vector pulsewidth-modulation block are the three phase currents and the difference between the two capacitor voltages. Depending on the states of the two dc-link capacitor voltages and phase current direction, redundant voltage vector sequences are selected. The selected vectors keep the capacitor voltage deviations within 5% of the total dc-link voltage. Two zero switching vectors (i.e., PPP and NNN) are also removed from all subsectors of the earlier proposed strategy, which one used to produce higher common-mode voltages. Detailed simulation and experimental results are presented in this paper for a 6.0-kW surface permanent-magnet synchronous machine. Both the simulation and experimental results show the required performance of the proposed system. [ABSTRACT FROM AUTHOR]

This paper is concerned with the use of a three-level inverter for a synchronous reluctance machine (SynRM). The SynRM suffers from a poor power factor due to poor machine saliency. This makes it harder to operate the three-level neutral-point-clamped inverter due to a strict requirement to have the two dc-link capacitor voltages balanced. This paper proposes a new nearest three vector modulation algorithm which can balance the two dc-link capacitors even at poor machine saliency ratio (poor power factor). In this paper, a method of sizing the two dc-link capacitors based on the machine power is also proposed. A comparison between two- and three-level inverters was conducted. The SynRM registered lower $d$-axis current ripple with a three-level inverter, indicating lower core losses in the machine. [ABSTRACT FROM PUBLISHER]

A dual active bridge (DAB) converter promises high power density. The highest power transfer can be achieved by phase shift modulation inside the zero-voltage switching boundaries. This paper analyzes the transients of DAB commutation. Although commutation has been previously analyzed for DAB with the linear turn-off snubbers, in today's industries, the output capacitors of the switches are utilized as the snubberless approach. The presence of these time-variant capacitors leads to nonlinear equations. This paper applies a piecewise linear model for analyzing the commutation of the ac-link current into the switches. The study is inspired by practical experiments, and the results are experimentally verified. [ABSTRACT FROM PUBLISHER]

A single-phase bridgeless Cuk ac/dc power factor correction (PFC) rectifier with positive output voltage is proposed in this paper. For low output voltage product applications, the rectifier is designed to convert high input voltage to low output voltage. Due to no bridge diodes required and thus decreased input conduction losses, the proposed rectifier efficiency can be improved. The proposed rectifier operates in discontinuous conduction mode, and the current-loop circuit is hence not needed. In addition, only a single switch is used in the rectifier to simplify the control circuit design. A simple translation method to have the positive output voltage in the Cuk converter is presented in the rectifier to reduce the component counts and the cost. The operational principles, steady-state analysis, and design procedure of the proposed rectifier are addressed in detail in this paper. Simulation and experimental results obtained from a 150-W rated prototype circuit with input of 90–130 Vrms, 60 Hz, and output of 48 Vdc have verified the validity of the proposed rectifier. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel bidirectional inverter, named series ac-link inverter. This three-phase inverter belongs to a new class of partial resonant ac-link converters in which the link is formed by a series ac inductor/capacitor (LC) pair having low reactive ratings. The input and output of this converter can be either dc, ac, single-phase, or multiphase. Therefore, they can appear as dc–dc, dc–ac, ac–dc, and ac–ac configurations. In all of these configurations, the ac capacitor is the main energy-storage element, and the inductor is merely added to facilitate the zero-current turnoff of the switches and their soft turn-on. Due to the zero-current turnoff of the switches in the proposed converter, the use of SCRs with natural commutation is possible as well. Since the current and voltage of the link are both alternating, no bulky dc-electrolytic capacitors are required in this converter. This paper mainly focuses on bidirectional dc to three-phase ac conversion. This single-stage inverter can step up or step down the voltage in a wide range. If galvanic isolation is required a single-phase high-frequency transformer can be added to the link. In the proposed inverter, the power can flow in both directions, and therefore, it is an excellent candidate for battery-utility interface and electric vehicle applications. In this paper, the principles of the operation of the proposed inverter, along with its design and analysis, are studied. Moreover, the performance of the proposed configuration is evaluated in this paper. Both simulation and experimental results are included. [ABSTRACT FROM AUTHOR]

This paper proposes a new circuit configuration and a control scheme for a single-phase current-source inverter with a power decoupling circuit which is called as the active buffer. The proposed inverter achieves a low-dc-input voltage ripple and also provides a sinusoidal current that can achieve unity power factor, without large passive components in the dc bus such as smoothing inductors and electrolytic capacitors. These components are conventionally required in order to decouple the power pulsation caused by the single-phase power source. In this paper, the fundamental operations of the proposed inverter are demonstrated experimentally. From the experimental results, the input voltage ripple is 8.87%, and the output current total harmonic distortion is 4.24%. In addition, an output power factor of 99% and a maximum efficiency of 94.9% are obtained. Finally, it is confirmed that the maximum power densities of the conventional circuit and the proposed circuit are 2.75 kW/L at the switching frequency of 70 kHz and 4.86 kW/L at the switching frequency of 80 kHz, respectively. [ABSTRACT FROM AUTHOR]