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Modular multilevel converter (MMC) is considered to be one of the most promising multilevel topologies from the medium- to high-voltage power applications. However, by reason of energy exchange between the dc side and ac side, the fluctuation of sub-module (SM) capacitor voltage for the MMC system is inevitable. Moreover, this fluctuation would deteriorate the total harmonic distortion (THD) of the output voltage. The influence of the fluctuation of the SM capacitor voltage on the output voltage is analyzed mathematically in detail. In this paper, an improved phase-shifted carrier (PSC) pulse width modulation (PWM) for the MMC is presented to suppress the influence of the fluctuation of SM capacitor voltage. This improved modulation can be regarded as a nonlinear compensation applied in the traditional PSC-PWM method. The THD of the output voltage is improved with this modulation method noticeably. Simulation and experiment results verify the effectiveness of the proposed modulation. [ABSTRACT FROM AUTHOR]

The paper proposes a method of active switching harmonics current reduction in the dc-link capacitor of a two-level, three-phase, back-to-back converter. Based on the derived analytical solution for switching harmonic currents in the dc-link, it is shown that by specific control over the pulsewidth-modulated (PWM) carriers’ phase angles, the targeted harmonics of the rectifier and the inverter can be synchronized in phase such that their cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. A three-step procedure to implement the method is detailed in the paper. The effectiveness of the proposed approach is verified experimentally. [ABSTRACT FROM AUTHOR]

In this paper, a three-step PWM method for the average-current-controlled three-phase six-switch boost PFC rectifier is proposed. It is shown that the three-step PWM compared to the conventional six-step PWM exhibits a lower total harmonic distortion of the input currents and higher power factor. However, the three-step PWM, unlike the six-step PWM, is adversely affected by the duty-cycle limitations and has unbalanced conduction losses of the upper and lower switches of the three-phase rectifier bridge. The average-current control of the three-step and six-step PWM is illustrated with MATLAB/Simulink simulation waveforms and experimentally verified on a 3 kW prototype. [ABSTRACT FROM AUTHOR]

The device switching frequency of current source converters (CSCs) in high-power medium-voltage (MV) drive applications is normally around 500 Hz. Conventional space vector modulation (SVM) features fast dynamic response but its output contains low-order harmonics with high magnitudes. In this paper, a natural-sampling-based SVM (NS-SVM) scheme is proposed to substantially suppress the low-order harmonics in practical CSC-based drives. This study proposes an equivalent discretization of NS-SVM wherein natural sampling pulse width modulation performance can be achieved with regular sampling frequency (same as a conventional SVM) instead of a high or even infinite sampling frequency. Equations for natural-sampling-based dwell time calculations for each selected vector are developed. The corresponding simplified but precise enough equations are derived on the basis of the Newton–Raphson algorithm to achieve fast online digital implementation. The proposed NS-SVM features superior low-order harmonic performance and inherits the high dynamic response and low sampling frequency of conventional SVM. Simulations and experiments are provided to verify the proposed NS-SVM scheme. [ABSTRACT FROM AUTHOR]

This paper proposes novel pulsewidth modulation (PWM) schemes for multi-space-vector pulsewidth modulation (MSVPWM), which is used in position sensorless control of interior permanent-magnet synchronous motor drives. The estimation of the rotor position is based on magnetic saliency and employs high-frequency components of voltage and current, which are excited by MSVPWM. The difference between the instantaneously applied voltage vector and the reference voltage vector causes current ripple. Since six or four voltage vectors are generated during a PWM period, the sequences of the error voltage vectors lead to different types of current ripples. In this paper, the proposed MSVPWM schemes employ six sequences for zero-/low-speed operation and 24 sequences for high-speed operation to reduce line current ripple. Experimental results confirm that the proposed MSVPWM schemes lead to significant reduction in harmonic current while maintaining high performance of sensorless estimation. [ABSTRACT FROM AUTHOR]

This paper presents an average current mode buck dimmable light-emitting diode (LED) driver for large-scale single-string LED backlighting applications. The proposed integrated current control technique can provide exact current control signals by using an autozeroed integrator to enhance the accuracy of the average current of LEDs while driving a large number of LEDs. Adoption of discontinuous low-side current sensing leads to power loss reduction. Adoption of a fast-settling technique allows the LED driver to enter into the steady state within three switching cycles after the dimming signal is triggered. Implemented in a 0.35-μm HV CMOS process, the proposed LED driver achieves 1.7% LED current error and 98.16% peak efficiency over an input voltage range of 110 to 200 V while driving 30 to 50 LEDs. [ABSTRACT FROM AUTHOR]

Pulse-width-modulated (PWM) converters have been widely applied for power processing, and they are typically the stems of other types of converters, such as quasi-resonant, Z-source, and switched-inductor hybrid converters. Development of PWM converters has been spanning over a century, starting from the buck converter. The well-known PWM converters include buck, boost, buck–boost, Ćuk, single ended primary inductive converter (SEPIC), zeta, Z-source, quasi-Z source, etc. Many attempts have been proposed to develop these converters based mostly on canonical cell concepts and by introducing extra LC filters to the cells. This paper presents an enhancement to the layer and graft schemes by introducing the ideas of dc voltage/current offsetting, capacitor/inductor component splitting, diode grafting, and inverse operation of PWM converters. The PWM converters, which can be operated in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), therefore can be synthesized systematically according to decoded transfer gains. Decoding and synthesizing PWM converters uniquely bridge transfer gains to converter topologies and provide readers a comprehensive understanding of PWM-converter evolution from the original converter, the buck converter. Additionally, in this paper, the Ćuk, SEPIC, and zeta converters all with the same transfer gain of $D/(1 - D)$ are proved to be equivalent to the buck–boost converter with an extra LC filter. For further illustrating the proposed approaches, various types of Z-source converters, switched-capacitor/switched-inductor hybrid converters, and a single-stage interleaved converter are reviewed, and new PWM converters are developed. [ABSTRACT FROM AUTHOR]

In photovoltaic applications, many previous research works have focused on pulsewidth modulation (PWM) resonant converters in order to achieve a high efficiency with a wide input voltage range. Conventional approaches utilized symmetric boosting modulation at the secondary side rectifier to obtain a symmetric operation, and they utilized two boosting modes in a switching period. Among various rectifier structures, the voltage doubler structure has a strong advantage due to a small number of components. However, it suffers from serious hard switching losses in the secondary side rectifier. In this paper, a new converter with a novel asymmetrical modulation is proposed and verified. The strong point of the proposed converter is that it eliminates hard switching turn-on losses from the rectifier, while maintaining the minimized number of components. Although the proposed converter adopts an asymmetric modulation, the offset current on the transformer becomes zero inherently. Furthermore, a “forced half resonance” operation of the proposed converter keeps rms current stresses at the same level as conventional converter although it has a higher peak current. Accordingly, the proposed converter achieves a superior efficiency with the minimum number of components at 35–25 V input and 380 V/300 W output specification. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems having rechargeable batteries are prone to be complex and costly because multiple converters are necessary to individually regulate a load, PV panel, and battery. This paper proposes novel nonisolated multiport converters (MPCs) integrating a bidirectional pulsewidth modulation (PWM) converter and phase-shift-switched capacitor converter (PS-SCC) for standalone PV systems. A PWM converter and PS-SCC are integrated by reducing the total switch count, realizing the simplified system and circuit. In the proposed MPCs, two control freedoms of duty cycle and phase shift angle are manipulated to individually regulate the load, PV panel, and/or battery. The detailed operation analysis was performed to mathematically derive gain characteristics and zero voltage switching operation boundaries. For the battery discharging mode, in which the PV panel is not available and the MPC behaves as a single-input–single-output converter with two control freedoms available, the optimized control scheme achieving the lowest rms current is also proposed to maximize power conversion efficiencies. Various kinds of experimental verification tests using a 200-W prototype were performed to verify the theoretical analysis and to demonstrate the performance of the proposed MPC. [ABSTRACT FROM AUTHOR]

In motor drive system, ear-piercing acoustic noise caused by high-frequency vibration from motor becomes unacceptable in sensitive environments, due to the application of pulsewidth modulation (PWM) and consideration of switching losses. In this paper, a novel method which associates a presented dual three-phase permanent magnet synchronous motor (PMSM) called dual-branch three-phase PMSM with carrier phase-shift technique is implemented to completely reduce odd-order PWM frequency vibration. The proposed motor has two no phase-shift three-phase windings, whose coils wind on the same teeth; it is driven by paralleled inverters with magnetically coupled inductors. With carrier phase shifting $\pi $ , the odd-order carrier frequency current harmonics with the identical amplitude in two windings are opposite in phase, and therefore the produced magneto-motive-force (MMF) harmonics in the air gap offset with each other. The experimental results are provided to verify the validity of the proposed method in vibration reduction. Compared with the previous work of vibration reduction for dual three-phase PMSMs, the proposed method can achieve total elimination of odd-order PWM frequency vibration. [ABSTRACT FROM AUTHOR]

This paper introduces a novel pulsewidth modulation (PWM) scheme for an open-winding permanent magnet synchronous machine (OW-PMSM) driven by dual two-level three-phase inverter with common dc bus, which can effectively deal with the inherent zero-sequence current (ZSC) problem. Based on the conventional symmetrical unipolar double-frequency sinusoidal PWM scheme with an appropriate phase shift, the common mode voltage (CMV) of two inverters remains same and cancel out each other to eliminate the modulated zero-sequence voltage (ZSV) disturbance source. In this case, the double-frequency effect can be retained to reduce the ac side current ripple and suppress both corresponding motor vibration and acoustic noise, which is advantageous to improve the synthetic performance of motor. The dc-bus voltage utilization of the novel PWM scheme is proved to reach the same maximum value comparing to the conventional modulated ZSV elimination scheme. Meanwhile, a zero-sequence controller is designed to suppress ZSC by further adjusting the two CMVs to counteract other zero-sequence disturbance sources. To verify the analysis, the proposed PWM technique associated with the control method is implemented in an OW-PMSM experimental setup to validate the superiority of the proposed method. [ABSTRACT FROM AUTHOR]

A novel PWM full bridge (FB) dc–dc converter for large power industrial applications is proposed in this paper. The soft switching mode of the primary switches can be varied under different input and output conditions to achieve optimum system efficiency. In the zero-voltage and zero-current switching (ZVZCS) mode, the turn-on and turn-off switching loss can be optimized because the soft switching conditions of the turn-on and turn-off instants are well decoupled. In the zero-voltage switching (ZVS) mode, the turn-off switching loss can also be optimized because there is no requirement for light load operation in this mode. Four mosfets with ultra-low on-state resistance are used, thus, the added conduction loss is small. The auxiliary mosfets with high switching frequency are turned on with zero-current and off with zero-voltage, hence, the added switching loss can also be neglected. Furthermore, some drawbacks of the conventional ZVS and ZVZCS converters, e.g., narrow ZVS load range, high primary circulating current, incomplete reset of the primary current, and unreasonable VA rating of the added components, have been well solved. The operation principles and soft switching characteristics are discussed. Experimental results from an 18-kW prototype are provided to verify the proposed converter. [ABSTRACT FROM AUTHOR]

One important characteristic of modular multilevel converter (MMC) is the existence of circulating current, which consists of a dc component and a series of undesirable even-order (predominantly second-order) harmonics. However, only the dc part of the circulating current is required for power balance, the ac harmonics are unwanted. These undesirable harmonics should be suppressed to reduce device stress and power losses. Most state-of-the-art circulating current suppression techniques employ separate controllers to generate the arm reference voltage for circulating current suppression. This paper proposes an alternate approach, eliminating the need of any additional control loop. Generation of undesirable circulating current is prevented inherently in the modulation stage. Reduced switching frequency sorting algorithm based modulation framework is employed to ensure reduced switching loss. Suitability of the proposed method is validated by experiments performed on a three-phase laboratory prototype of MMC. Steady state and transient operation of the MMC in grid-connected condition is studied. [ABSTRACT FROM AUTHOR]

This paper proposes a novel pulsewidth modulation cell-level diffusion charge redistribution (DCR) converter based on a switched capacitor converter (SCC) utilizing diffusion capacitance of photovoltaic (PV) cells for PV modules under partial shading. Although a discrete inductor and capacitor are additionally necessary, Joule losses associated with switching operations can be reduced compared to the conventional capacitorless DCR converter. First, ac impedance measurement for a PV cell with 125 × 125 mm was performed, and the diffusion capacitance values were measured to be approximately 6.0 mF at its maximum power point voltage of 0.574 V. Second, the theoretical loss model was derived based on the detailed analysis, and it revealed that an optimal duty cycle achieving the lowest Joule loss was dependent on shading conditions. Third, a dual maximum power point tracking (MPPT) algorithm that controls duty cycles of not only the DCR converter, but a front-end boost converter is also proposed. With the dual MPPT control, the DPP converter operates at its optimal duty cycle to minimize the Joule loss while the boost converter seeks the MPP. The experimental results demonstrated that the maximum power significantly increased, thanks to the DCR converter, and that both the DCR and boost converters operated with respective optimal duty cycles. [ABSTRACT FROM AUTHOR]

The acoustic noises caused by the fixed-frequency signal injection scheme limit the applications of saliency tracking based sensorless control methods for interior permanent magnet synchronous machine (IPMSM) drives at low-speed operation. In this paper, a pseudorandom-frequency sinusoidal injection (PRFSI) considering the sample and hold effect in practical applications is proposed to reduce the undesired acoustic noises. Since the power spectral density (PSD) of the excited high-frequency (HF) current could be dispersed and continuously distributed with PRFSI, the additional HF acoustic noises can be reduced. Through the comparative analysis of HF response currents PSD results for PRFSI and fixed-frequency sinusoidal injection (FFSI), the principle of acoustic noises reduction with PRFSI is analyzed theoretically. Furthermore, the optimal selection of the injection signals is derived considering the sample and hold effect. Whereby, a comparative evaluation of the proposed PRFSI versus FFSI is carried out on a 2.2-kW position sensorless IPMSM drive, in terms of position estimation and PSD results, which verifies the effectiveness of the proposed scheme. [ABSTRACT FROM AUTHOR]

This paper proposes a generalized design framework for three-phase Vienna rectifiers to handle the neutral point voltage balance issue. On the basis of the design framework, it is convenient to construct various neutral point voltage balancing methods with the guarantee of stability. As demonstration, three representative neutral point voltage balance approaches are presented by choosing different zero-sequence voltages. A comprehensive comparison among the three approaches is given in the aspects of input current quality, capacitor voltage fluctuation, and system efficiency. The comparison results provide guidance for constructing the most appropriate approach based on the specific requirement. Finally, simulation and experimental results verify the correctness and effectiveness of the presented approaches and the related performance analysis. [ABSTRACT FROM AUTHOR]

This paper presents a novel approach to derive a pulsewidth modulation (PWM) technique for the generalized multi-phase drive. This novel approach is called a phase traversing principle. The given phase traversing principle is applied to the proposed PWM technique for five-phase open-end winding induction motor drive fed from a single dc source. The proposed PWM technique has the benefits of phase clamping, symmetrical operation of inverters, and common-mode current (CMC) elimination. Thus, it reduces the switching losses and also minimizes the issue of the CMC. The symmetrical operation of dual inverters further helps in the even distribution of losses. Also, the proposed PWM technique gives a good harmonic performance. The performance of the proposed PWM technique is analyzed using the switching loss function and harmonic flux trajectory methods. The first analysis gives justification of the reduced switching losses. While the second analysis gives the deviations in the motor flux with respect to variation in. modulation indices The proposed PWM technique is verified with both simulation and hardware results. [ABSTRACT FROM AUTHOR]

Direct power control (DPC) has been proposed as an effective control method for pulsewidth modulated (PWM) converters. The recent development focuses on the integration of the model predictive (MP) control and DPC to obtain better steady-state performance. In most MP-DPCs, duty cycle optimization (DCO) is a common technique to achieve the power error minimization. However, the periodic occurrence of a duty cycle larger than one (D > 1) deteriorates the performance of the PWM converter by inducing current spikes and power surges. To address this problem, this paper conducts an in-depth examination on the “D > 1” case common in MP-DPC using DCO. It is found the “D > 1” case is caused by the wrong control action of the active power in the starting period of each sector. Furthermore, a new table containing an additional pre-calculated interval in every sector is developed to eradicate the “D > 1” case and its associated power quality issues. Both simulation and experimental results are provided to demonstrate the effectiveness of the new table. [ABSTRACT FROM AUTHOR]

Finite-control-set model predictive control (FCSMPC) has been proposed as a powerful control strategy for the power control of the pulse-width modulation rectifier. However, conventional FCSMPC applies only one voltage vector during one control period, which still presents relatively high power ripples. Introducing a zero vector in combination with a nonzero vector during one control period can improve the steady-state performance of the conventional FCSMPC, but the fixed vector combination is not an optimal solution in minimizing power errors. This paper proposes an improved two-vectors-based MPC, which relaxes the vector combination to two arbitrary voltage vectors. Compared to prior improved MPC with fixed vector combinations, the proposed method achieves better steady-state performance without affecting the dynamic response. Furthermore, the average switching frequency is reduced by up to 29.5% in average. The principles of vector selection and optimal vector duration are introduced in detail. The results obtained from two kinds of three-vectors-based predictive control methods are also presented for the aim of comparison. Both simulation and experimental results confirm the theoretical study and the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Among high-power pulsewidth modulation (PWM) current-source motor drives, the transformerless structure using the integrated dc choke has been widely acknowledged with superior advantages. A typical challenge faced by such transformerless PWM current-source drive systems is the potential common-mode resonance excited by the common-mode voltage (CMV). Since the implementation of power factor compensation (PFC) at low motor speeds may increase the CMV in such drives, the common-mode resonance could be serious and further aggravate the CMV stress on the system. In this paper, the critical factors on the common-mode resonance are thoroughly investigated. Based on the investigation, a solution based on average-value-reduction (AVR) space-vector modulation (SVM) is proposed to suppress the common-mode resonance while maintaining the PFC function. The investigation of common-mode resonance and the effectiveness of the proposed resonance suppression solution are verified through experiments on a transformerless PWM current-source drive system. [ABSTRACT FROM AUTHOR]

The research on noninvasive incipient fault diagnosis of power converters is very critical to avoid strenuous periodic checkups and costly interruptions. In many of the research studies, on-state resistance of power MOSFETs is identified as the fault precursor, and suggested to be monitored online for prognosis. In this paper, a condition monitoring algorithm is proposed for power MOSFETs of interleaved converters and integrated with the conventional current loops. The proposed technique utilizes on-state resistance information of the switches to adjust the current reference of each interleaving leg. In addition, a pulse-width adjustment method is proposed to avoid one current sensor and current-control loop. With the proposed scheme, the thermal stress on the aged device can be reduced, and the overall lifetime of the converter can be extended. The proposed approach is verified on two-leg interleaved converters both in simulation and experimentally. [ABSTRACT FROM AUTHOR]

This paper presents a sensorless control strategy for pulsewidth modulated active filters. The complete solution uses only two current sensors, which are located in the grid interface. The compensation is performed by the imposition of sinusoidal current references in the grid, and does not require algorithms for disturbance estimation. The virtual flux concept for grid synchronization and multiple quasi-resonant compensators in the current scheme are employed for selective harmonic mitigation. A discretization analysis is presented in order to obtain a precise digital realization of the current controllers. It is proposed as a regulator for the direct-current bus voltage in the active filter, which employs only information of the modulated voltage and is compatible with the previous sensorless synchronization solution. Experimental results from a 1-kVA prototype converter are presented, covering the solution with and without the voltage sensor in the direct current bus. Analyses of stationary and transient responses are performed by using a six-pulse diode rectifier as nonlinear load. [ABSTRACT FROM AUTHOR]

This paper proposes a simple model predictive direct power control (MP-DPC) of single-phase pulsewidth-modulated rectifiers with constant switching frequency using modulation function optimization. The instantaneous active and reactive power theory for single-phase converters is discussed, on the basis of a second-order generalized integrator. The modulation function is resolved from the cost function of the MP-DPC scheme. The relationship between the instantaneous powers and ac-side inductance mismatch is discussed. The inductance mismatch has an effect on the reactive power, but not effect on active power. The quantitative expression of reactive power caused by inductance mismatch is shown and verified in the experimental test. An inductance parameter online estimation scheme is proposed to eliminate its effect on reactive power. Compared with the conventional proportional-integral-based instantaneous current control scheme and finite-control-set MP-DPC scheme, the proposed MP-DPC can provide these advantageous features: lower current harmonics and total harmonic distortion components, faster dynamic response, fewer adjusted parameters, and zero steady-state error. In addition, the proposed MP-DPC is free of the weighting factor selection in cost function. The effectiveness of the proposed MP-DPC scheme is verified by experimental results. [ABSTRACT FROM AUTHOR]

The nongenerative-boost type rectifier, which is called the Vienna rectifier, is advantageous in terms of efficiency and current total harmonic distortion. Therefore, the Vienna rectifier is used in grid-connected applications such as telecommunication systems and wind turbine systems. Owing to the structural characteristics of the Vienna rectifier, various switching methods exist. Among these methods, a carrier-based discontinuous pulse-width modulation (CB-DPWM) method guarantees high efficiency compared to continuous pulse-width modulation methods; moreover, it is simple compared to a DPWM method based on space vectors. In this paper, the performance of the CB-DPWM method, its applicable region depending on the power factor and modulation index (Ma ), and its efficiency are analyzed in detail. Then, based on the analysis, a neutral-point voltage balancing method for the CB-DPWM method is proposed. The effectiveness and performance of the proposed neutral-point voltage balancing method are verified by simulation and experiment. [ABSTRACT FROM AUTHOR]

In a single-phase grid-connected nanogrid system, a bidirectional ac–dc converter is usually required to transfer energy between the ac grid and a dc bus. Active ac power balancing is often implemented to prevent the ac grid ripple power from injecting into the dc bus. A four-phase-leg sinusoidal pulsewidth-modulation (SPWM) converter can readily provide power factor correction and active ac power balancing. In this paper, the use of three-phase-leg SPWM converters for achieving these functions is analyzed. A family of bidirectional single-phase ac–dc three-phase-leg SPWM converters with an ac storage capacitor for use in a nanogrid system is designed with a general control structure and a modulation scheme for minimizing the ac storage capacitance. The general control structure is designed to achieve a decoupled system of a power-factor-correction converter cascaded with an active ac power load at the dc bus. The decoupled system is developed based on decomposition to differential-mode and common-mode voltages. The modulation method involves an extra zero-sequence voltage injection derived from the three-phase-leg SPWM voltages without introducing higher order harmonic distortions. A significant reduction of the ac storage capacitance and an improvement of converter efficiency are achieved. The design and analysis are verified by simulations and experimental measurements. [ABSTRACT FROM AUTHOR]

This paper presents a topology of a single-phase floating full-bridge three-level pulse width modulation (PWM) power inverter suitable for high-voltage/high-power dc–ac conversion. High power efficiency is obtained thanks to the slow (50/60 Hz) biasing of the H-bridge power supply terminals, allowed by a particular arrangement and control of two complementary active neutral point clamped voltage-source converters. As result, the main PWM switching voltage as well as the maximum drain–source voltage $V_{{\rm DSS}} of related transistors are reduced to one-half of the input VDD voltage. This is allowed by the internally generated and accurately balanced middle-node voltage VDD/2. Consequently, advantageous $r_{{\rm DS}({\rm on})}$ of the low-voltage transistors, along with reduced switching PWM voltage result in considerable decreasing of power losses in whole output power range. This paper introduces the main concept of the floating H-bridge topology, and presents in detail the circuit realization. The performances are demonstrated on $450 V_{{\rm DC}}/230 V_{{\rm AC}}$ 2 kW power inverter exhibiting 98.6% peak efficiency and realized in very small $100\times 60\times 30$ mm3 volume. [ABSTRACT FROM AUTHOR]

When faced with distorted grid voltage, more harmonics will appear in the output currents of the grid-connected inverters. The grid-voltage feedforward strategy, as the most direct solution to compensate the harmonics, however, is seriously affected by the errors in the grid-voltage feedforward loop, such as delays. This issue is more significant for high-power inverters, where the switching frequency is relatively low (< 5 kHz), and the grid-interface inductance is small (< 0.5 mH). The errors mainly include the signal distortion caused by the conditioning circuits, the control delay of the digital controller, and the zero-order hold (ZOH) characteristic of pulse width modulation (PWM). In this paper, several improvements have been made to reduce the signal distortion and compensate the delays. A second-order Butterworth low-pass filter in the conditioning circuit is carefully designed with the maximum flat magnitude response and the almost linear phase response to avoid distorting the measured grid voltage. Furthermore, based on the conventional repetitive predictor, an open-loop simplified repetitive predictor is proposed to compensate the delays in the grid-voltage feedforward loop. Three predictive steps are achieved by the open-loop simplified repetitive predictor to compensate the delays: one step for the delay caused by the conditioning circuit, the second step for the control delay of the digital controller, and the third step for the ZOH characteristic of PWM. The effectiveness of the improved grid-voltage feedforward strategy are experimentally validated on a 250-kVA solar power generation system, where the current harmonics are effectively attenuated. In addition, the inverter starting current is suppressed. [ABSTRACT FROM AUTHOR]

A zero-voltage switching (ZVS) grid-connected full-bridge inverter and its modulation schemes are investigated. A novel sinusoidal pulse width modulation scheme for the ZVS full-bridge inverter (ZVS SPWM) is proposed in this paper. The ZVS SPWM is evolved from the double-frequency SPWM by adding gate drive to the auxiliary switch. The ZVS condition is analyzed and the circulation loss of the resonant branch is optimized by adjusting the energy storage in the resonant inductor. The reverse recovery of the body-diode of MOSFET is relieved and ZVS is realized for both main and auxiliary switches. The filter inductors are significantly reduced with higher switching frequency. The design guideline of resonant parameters and the implementation of ZVS SPWM in DSP controller are introduced. The ZVS SPWM scheme is verified on a 3-kW inverter prototype. According to the experimental result, peak efficiency as 98.8% is achieved. [ABSTRACT FROM AUTHOR]

A pulse skipping modulation (PSM) technique improves the light load efficiency in a dc–dc converter by selectively skipping a few clock pulses. However, in existing PSM schemes, the number of charge and/or skipped cycles cannot be predefined. Therefore, it is difficult to predict the ripple parameters and ensure a stable periodic behavior. Further, it becomes difficult to further minimize power losses under light load conditions. This paper proposes a voltage-mode digital pulse skipping modulator which uses a digital pulse-width-modulator (PWM) as a building block, thus making it easy to operate the system in both PWM and PSM modes. Unlike in existing PSM schemes, the sequence and the count of charge and skip cycles can be fully prespecified in the proposed scheme, with the number of skip cycles optimally chosen to maximize the efficiency. Stability analysis is carried out using discrete-time modeling, which provides guidelines to ensure a stable periodic operation with predictable ripple parameters. Small-signal modeling and design of the proposed PSM scheme are discussed. A prototype buck converter was fabricated and tested. The proposed control scheme is implemented using an FPGA device, and the experimental results fully support the analytical predictions. [ABSTRACT FROM PUBLISHER]

The authors have proposed two methods for iron loss evaluation of the ac filter inductor used in a pulsewidth modulation (PWM) inverter. The first method is a loss map method, which can be used for the iron loss calculation of the ac filter inductor without using a real PWM inverter, and the second method is an iron loss analyzer (ILA), which can measure the iron loss of the ac filter inductor during every switching period on a real PWM inverter. In this paper, the measurement results obtained using the ILA and the results calculated using the loss map method on both the single-phase and three-phase inverters are compared. The calculated iron loss of the ac filter inductor on the three-phase PWM inverter is found to have a relatively large error for certain PWM pulse conditions. In order to reduce the calculation error, the authors propose a modified loss calculation method and demonstrate that the calculation error is reduced to less than 2%. [ABSTRACT FROM PUBLISHER]

Modulation schemes can significantly change the performance of a converter in the steady state. They have, thus, been extensively studied, but directed more at three-phase topologies, where triplen offsets are added. Single-phase systems, including ac–dc–ac, are less widely pursued, even though various topologies have since been proposed. The intention of this paper is, thus, to study two promising single-phase ac–dc–ac converters using reduced number of switches, and subsequently proposes modulation schemes for them. The proposed schemes help the converters to achieve better thermal spread among their switches, while keeping their dc-link voltages low. Single points of failure are thus minimized, allowing the converters to have longer lifetimes. Simulation and experimental results have demonstrated the intended performances, hence verifying the analyses presented in this paper. [ABSTRACT FROM PUBLISHER]

This paper provides a theoretical and experimental discussion about the performance, availability, and flexibility of a battery energy storage system (BESS) using a modular multilevel cascaded converter based on single-star bridge cells (MMCC-SSBC). The SSBC-based BESS produces three-phase multilevel voltage waveforms, and eliminates both harmonic filters and a complicated zig-zag transformer from the ac side. The circuit modularity of the SSBC enables the usage of multiple individual low-voltage battery modules. Along with control strategy based on zero-sequence-voltage injection, this modularity enhances the availability and flexibility of the BESS. A three-phase laboratory downscaled system rated at 140 V, 10 kW, and 21 kW·h is designed, constructed, and tested to verify the operating principles and performance. The tested BESS produces a current total harmonic distortion (THD) of 3.0% even when it operates with different active-power commands for individual bridge cells. In addition, zero-voltage ride-through capability is verified for the severest single-phase, two-phase, and three-phase voltage sags. Mathematical analysis and experimental verification validate the downscaled system and performance, making the BESS prospective. [ABSTRACT FROM PUBLISHER]

Conventional three-phase rectifiers are controlled to achieve good power factor and low total harmonic distortion in the input. In the case of pulsating power loads, the fast dynamic response implies that the load pulses are reflected in the generator. These pulsating loads affect the lifetime operation of the generator, especially when it is not oversized (as in the case of aircraft applications). In order to smooth the power demanded from the generator, it is preferable to reduce the bandwidth of the output voltage controller for the rectifier but it affects its stability due to the fact that the right-half-plane (RHP) pole given by the negative impedance of a constant power load requires high-bandwidth control loop to compensate it. In this paper, an energy control method is proposed that utilizes the energy stored in the output capacitor of the rectifier to control the output voltage of the rectifier. In such a way, the minimum bandwidth restriction imposed by the RHP pole of the power load is eliminated and the bandwidth of the voltage loop can be defined low enough to demand smooth power from the generator. [ABSTRACT FROM PUBLISHER]

Eliminating the leakage current is one of the most important issues for transformerless three-phase photovoltaic (PV) systems. In this paper, the leakage current elimination of a three-phase four-leg PV inverter is investigated. With the common-mode loop model established, the generation mechanism of the leakage current is clearly identified. Different typical carrier-based modulation methods and their corresponding common-mode voltages are discussed. A new modulation strategy with Boolean logic function is proposed to achieve the constant common-mode voltage for the leakage current reduction. Finally, the different modulation methods are implemented and tested on the TMS320F28335 DSP +XC3S400 FPGA digital control platform. The experimental results verify the effectiveness of the proposed solution. [ABSTRACT FROM PUBLISHER]

Efficiency in a light load dc–dc converter is improved by reducing the switching frequency with the load current. Further, a bifrequency operation (BFO) using pulse train (PT) control can achieve spread spectrum. Using discrete-time models, this paper shows that a stable periodic BFO is generally not achievable in existing PT control methods. Thereafter, a unified multimode digital control technique is proposed, in which a voltage-mode digital pulse-width-modulator (DPWM) is used to control a predefined periodic BFO. Beside the fixed-frequency DPWM, an extra multiplexer is considered for real-time configuration to: 1) bifrequency pulse frequency modulation; 2) PT control; or 3) pulse regulation control; or 4) pulse skipping control with smooth transition. Analysis and design methods are discussed to ensure periodic BFO and to customize the power spectrum with predictable ripple parameters. A buck converter prototype is made, and the proposed control is implemented using an FPGA device. [ABSTRACT FROM PUBLISHER]

The switching frequency of medium-voltage high-power converters is limited to about 1 kHz due to semiconductor junction temperature constraint. The frequency band between the fundamental and carrier frequency is limited to a little more than one decade and the LCL filter design is usually a challenge to meet grid codes for grid-connected applications. Traditional designs focus on the optimization of the filter parameters and different damping circuits. However, this design is very influenced by the modulation technique and produced low-order harmonics. Widely used pulse width modulations (PWM), such as phase disposition PWM (PDPWM), produce low-order harmonics that constraint the design of the filter. Selective harmonic elimination PWM (SHEPWM) can eliminate theses low-order harmonics, enabling a more efficient design of the LCL filter. In this paper, the LCL grid filter of a multimegawatt medium-voltage neutral-point-clamped converter for a wind turbine is redesigned using the SHEPWM modulation. Experimental results demonstrate that the efficiency of the converter, filter, and overall efficiency are increased compared to that obtained with PDPWM. [ABSTRACT FROM PUBLISHER]

This paper proposes a new five-level voltage source inverter for medium-voltage high-power applications. The proposed inverter is based on the upgrade of a four-level nested neutral-point clamped converter. This inverter can operate over a wide range of voltages without the need for connecting power semiconductor in series, has high-quality output voltage and fewer components compared to other classic five-level topologies. The features and operation of the proposed converter are studied and a simple sinusoidal PWM scheme is developed to control and balance the flying capacitors to their desired values. The performance of the proposed converter is evaluated by simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a new space vector pulsewidth modulation scheme to reconstruct phase currents using neutral-point current sensing in three-level T-type converters (TLTTCs). For this purpose, zero vector and offset vectors are replaced with complementary active vectors. These active vectors do not affect the resultant output voltage and the voltage balance at the neutral point of TLTTCs. Hence, the pulsewidths of corresponding active vectors can be adjusted even at low speeds without much additional switching losses and low-frequency noise in the inverter. The modified switching patterns can easily be generated without significant computational complexity. The proposed method is experimentally verified using Texas Instruments TMS320F28335 and Spartan 6 controllers, on a custom designed T-type converter based on Fuji IGBT modules. [ABSTRACT FROM PUBLISHER]

A capacitor voltage-balancing method for a nested neutral point clamped (NNPC) inverter is proposed in this paper. The NNPC inverter is a newly developed four-level voltage-source inverter for medium-voltage applications with properties such as operating over a wide range of voltages (2.4–7.2 kV) without the need for connecting power semiconductor in series and high-quality output voltage. The NNPC topology has two flying capacitors in each leg. In order to ensure that the inverter can operate normally and all switching devices share identical voltage stress, the voltage across each capacitor should be controlled and maintained at one-third of dc bus voltage. The proposed capacitor voltage-balancing method takes advantage of redundancy in phase switching states to control and balance flying capacitor voltages. Simple and effective logic tables are developed for the balancing control. The proposed method is easy to implement and needs very few computations. Moreover, the method is suitable for and easy to integrate with different pulse width modulation schemes. The effectiveness and feasibility of the proposed method is verified by simulation and experiment. [ABSTRACT FROM PUBLISHER]

In this paper, three control schemes with variable switching frequencies are proposed and analyzed for the paralleled voltage source inverters (VSIs) fed permanent magnet synchronous motor (PMSM) drive. The proposed schemes could be applied in the low-speed operation region of high-power drive system, where the frequency modulation index is high. First, the field-oriented control (FOC) with phase-shifted chaotic space vector modulation (SVM) under synchronous frame and the FOC with phase-shifted chaotic sinusoidal pulse width modulation under stationary frame is proposed for the paralleled VSIs fed PMSM drive. The proposed phase-shifted chaotic PWM schemes not only eliminate specific switching harmonics completely but also suppress all remaining switching harmonic peaks in the spectrum. The avoidance of inherent circulating current is also considered in designing these two schemes. Second, the direct torque control (DTC) for the paralleled VSIs fed PMSM drive is proposed with circulating current suppression. Besides inheriting the advantages of DTC, the output currents of paralleled VSIs are kept balanced. The working principles of these three methods are presented in detail. Experimental results on a laboratory prototype are given to verify the validity of the three proposed control schemes for the paralleled VSIs fed PMSM with variable switching frequencies. [ABSTRACT FROM PUBLISHER]

This paper proposes a new bidirectional three-phase push–pull converter that has a simple structure and achieves zero-voltage switching turn-on of switches. Also, due to use of a single inductor, an imbalance among phase currents on the low-voltage high-current side is trivial in the proposed converter although no current sharing control is employed. In this paper, a new dual asymmetrical pulse width modulation (PWM) switching method is proposed for bidirectional power flow control with seamless mode change. The proposed switching method offers reduced circulating current and makes the converter easier to implement compared to the PWM plus phase shift-based control method since it is a general PWM method having two independent duty cycle controls on each side. Experimental results from a 3-kW prototype are provided to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

This paper revisits the switched flow graph (SFG) technique. A general and unified equivalent SFG model of a three-terminal switcher encountered in regular and tapped inductor converters operating in the continuous conduction mode is proposed. The model can be applied to most PWM topologies and facilitates construction of a complete flow graph of a given converter. The approach can be helpful in theoretical analysis and derivation of analytical expressions of converter's small-signal transfer functions. The suggested methodology extends the previously proposed SFG analysis technique and alleviates the principal difficulties involved. Furthermore, the approach is straightforward and expeditious. Application guidelines and examples are presented and compared to simulation and earlier theoretical results. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) has several submodules in cascade. To control the submodule capacitors voltage, a new generalized dynamic voltage balancing algorithm along with a simple pulse width modulator structure is proposed in this paper. With proposed pulse width modulator structure, the dynamic voltage balancing algorithm can be easily implemented with any type of carrier based pulse width modulation (including level-shifted and phase-shifted pulse width modulation) scheme without any modifications. This method does not require the sorting technique for selection of submodule capacitors voltage. The performance of the proposed voltage balancing algorithm is presented for MMC with three-level flying capacitor submodules (MMC-3L-FC). The proposed method is also applicable to the conventional two-level half bridge submodules as well. The effectiveness of the proposed voltage balancing algorithm is verified with the phase-shifted carrier-based pulse with modulation scheme. The results obtained from the MATLAB/SIMULINK simulations on 6-kV/ 2.5-MW system and the dSPACE DS1103-based laboratory prototype of 208-V/3-kVA MMC-3L-FC system are in close relationship, and thus, the proposed methodology is validated. [ABSTRACT FROM AUTHOR]

In this paper, the performance of the new three-dimensional space vector-based switching signal generation technique for a grid-connected four-leg voltage source inverter used as a shunt compensator is proposed. The shunt compensator can be used for reactive power compensation, harmonic elimination, load balancing, and neutral current elimination in a three-phase four-wire grid-connected system. It is shown through experimental studies that switching losses in the four-leg voltage source inverter are appreciably reduced to a maximum of 33% in three-dimensional space vector modulation without NULL vector as the number of switches controlled at any instant of time is six out of eight. The new proposed technique is compared with three-dimensional space vector modulation with null vector. Experimental results are given to show the validity of the proposed switching control strategy. [ABSTRACT FROM AUTHOR]

This study presents a novel overmodulation strategy for a six-phase voltage source inverter (VSI)-fed dual three-phase permanent-magnet synchronous motor. The proposed strategy can achieve minimum harmonic injection in the overmodulation region. Four-vector space vector pulse width modulation (SVPWM) renders mathematic foundations for this given method. However, the classical four-vector SVPWM used in six-phase VSI has asymmetrical pulse width modulation waveform, which makes it difficult for hardware implementation. In this paper, the modulation algorithms in both linear and overmodulation regions have been unified and implemented with the double zero-sequence injection PWM strategy. This strategy is able to overcome the inherent shortcomings of the four-vector SVPWM, and it achieves smooth transitions from linear to overmodulation region. Simulation analysis and experimental results demonstrate the effectiveness and feasibility of the proposed strategy. [ABSTRACT FROM AUTHOR]

This paper demonstrates for the first time the use of a very large secure digital card flash memory to the design of a three-phase pulse width modulation (PWM) generator and describes the hardware and software used for implementation. The new digital architecture differs from the conventional counter-based implementation, and it follows a preprogrammed optimal PWM pattern that is read from memory with magnitude and phase as coordinates. This architecture allows the inclusion of multiple optimization criteria within the PWM pattern. This digital architecture becomes valuable since the switching instants can be set in any conceivable manner, away from the rigid constraint of a repetitive sequence of states on each PWM period. Experimental results validate that the proposed new architecture allows simple and low cost implementation of complicated PWM patterns with harmonic reductions that could not otherwise be achieved for low cost. [ABSTRACT FROM AUTHOR]

In order to solve the problem of high voltage conversion ratio between dc bus and energy storage unit, a novel bidirectional three-phase dc/dc converter applicable to high-power condition is proposed in this paper. With the new PWM strategy and inherent ability of increasing voltage conversion ratio of Y–Δ connected transformer, the voltage conversion ratio is doubled. With the new PWM strategy, the effective duty cycle range of three-phase dc/dc converter is expanded, which results in halved filter inductance. Three-phase full-bridge structure is connected to the dc bus, while current-tripler unit is connected to the battery. As three-phase interleaved structure is adopted, not only current stress of switches decreases but also the frequency of input and output current ripple increases to three times of switching frequency, which leads to smaller filters and extended lives cycle of batteries. The operating principle and characteristics of the converter are analyzed in detail. A prototype with the 360-V dc bus converted to 48 V/42 A batteries was built and the results are given based on the experiments. [ABSTRACT FROM PUBLISHER]

A family of “Two-Switch Boosting Switched-Capacitor Converters (TBSC)” is introduced, which distinguishes itself from the prior arts by symmetrically interleaved operation, reduced output ripple, low yet even voltage stress on components, and systematic expandability. Along with the topologies, a modeling method is formulated, which provokes the converter regulation method through duty cycle and frequency adjustment. In addition, the paper also provides guidance for circuit components and parameter selection. A 1-kW 3X TBSC was built to demonstrate the converter feasibility, regulation capability via duty cycle and frequency, which achieved a peak efficiency of 97.5% at the rated power. [ABSTRACT FROM AUTHOR]

In this paper, a novel drive method, which is different from the traditional motor drive techniques, for high-speed brushless DC (BLDC) motor is proposed and verified by a series of experiments. It is well known that the BLDC motor can be driven by either pulse-width modulation (PWM) techniques with a constant dc-link voltage or pulse-amplitude modulation (PAM) techniques with an adjustable dc-link voltage. However, to our best knowledge, there is rare study providing a proper drive method for a high-speed BLDC motor with a large power over a wide speed range. Therefore, the detailed theoretical analysis comparison of the PWM control and the PAM control for high-speed BLDC motor is first given. Then, a conclusion that the PAM control is superior to the PWM control at high speed is obtained because of decreasing the commutation delay and high-frequency harmonic wave. Meanwhile, a new high-speed BLDC motor drive method based on the hybrid approach combining PWM and PAM is proposed. Finally, the feasibility and effectiveness of the performance analysis comparison and the new drive method are verified by several experiments. [ABSTRACT FROM AUTHOR]

In this paper, we propose model predictive control methods to reduce the common-mode voltage of three-phase voltage source inverters (VSIs). In the reduced common-mode voltage-model predictive control (RCMV-MPC) methods proposed in this paper, only nonzero voltage vectors are utilized to reduce the common-mode voltage as well as to control the load currents. In addition, two nonzero voltage vectors are selected from the cost function at every sampling period, instead of using only one optimal vector during one sampling period. The two selected nonzero vectors are distributed in one sampling period in such a way as to minimize the error between the measured load current and the reference. Without utilizing the zero vectors, the common-mode voltage controlled by the proposed RCMV-MPC algorithms can be restricted within ±Vdc/6. Furthermore, application of the two nonzero vectors with optimal time sharing between them can yield satisfactory load current ripple performance without using the zero vectors. Thus, the proposed RCMV-MPC methods can reduce the common-mode voltage as well as control the load currents with fast transient response and satisfactory load current ripple performance compared with the conventional model predictive control method. Simulation and experimental results are included to verify the effectiveness of the proposed RCMV-MPC methods. [ABSTRACT FROM AUTHOR]