210 results
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2. Intelligent Control of Performance Constrained Switched Nonlinear Systems With Random Noises and Its Application: An Event-Driven Approach.
- Author
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Wang, Xueliang, Xia, Jianwei, Park, Ju H., Xie, Xiangpeng, and Chen, Guoliang
- Subjects
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ADAPTIVE fuzzy control , *ADAPTIVE control systems , *NONLINEAR systems , *INTELLIGENT control systems , *RANDOM noise theory , *RESISTOR-inductor-capacitor circuits , *STOCHASTIC systems - Abstract
In this paper, the adaptive fuzzy control of switched stochastic nonlinear systems with set-time prescribed performance based on event-driven mechanism is studied. The creative part of this paper is that based on the set-time performance function, a modified event-triggered strategy that considers asynchronous switching to deteriorate system performance without strict assumptions is presented, which avoids Zeno behavior and saves communication resources. Then, by using backstepping recursive design technique, It $\hat {o}$ ’s differential lemma and mode-dependent average dwell time (MDADT) method, a novel adaptive performance control scheme is proposed, which can ensure that all the variables in the system are semiglobally uniformly ultimately bounded (SGUUB) in probability and the tracking error gets into prescribed boundary no later than an arbitrarily adjusted setting time. Finally, the proposed algorithm is applied to a RLC circuit and its practicability is verified via simulation results. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
3. Accelerating Address Translation for Virtualization by Leveraging Hardware Mode.
- Author
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Sha, Sai, Zhang, Yi, Luo, Yingwei, Wang, Xiaolin, and Wang, Zhenlin
- Subjects
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WALKING speed , *HARDWARE , *VIRTUAL machine systems - Abstract
The overhead of memory virtualization remains nontrivial. The traditional shadow paging (TSP) resorts to a shadow page table (SPT) to achieve the native page walk speed, but page table updates require hypervisor interventions. Alternatively, nested paging enables low-overhead page table updates, but utilizes the hardware MMU to perform a long-latency two-dimensional page walk. This paper proposes new memory virtualization solutions based on hardware (machine) mode—the highest CPU privilege level in some architectures like Sunway and RISC-V. A programming interface, running in hardware mode, enables software-implementation of hardware support functions. We first propose Software-based Nested Paging (SNP), which extends the software MMU to perform a two-dimensional page walk in hardware mode. Second, we present Swift Shadow Paging (SSP), which accomplishes page table synchronization by intercepting TLB flushing in hardware mode. Finally we propose Accelerated Shadow Paging (ASP) combining SSP and SNP. ASP handles the last-level SPT page faults by walking two-dimensional page tables in hardware mode, which eliminates most hypervisor interventions. This paper systematically compares multiple memory virtualization models by analyzing their designs and evaluating their performance both on a real system and a simulator. The experiments show that the virtualization overhead of ASP is less than 4.5% for all workloads. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
4. Weight-Dependent Gates for Network Pruning.
- Author
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Li, Yun, Liu, Zechun, Wu, Weiqun, Yao, Haotian, Zhang, Xiangyu, Zhang, Chi, and Yin, Baoqun
- Subjects
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INFORMATION filtering , *RECOMMENDER systems , *LOGIC circuits - Abstract
In this paper, a simple yet effective network pruning framework is proposed to simultaneously address the problems of pruning indicator, pruning ratio, and efficiency constraint. This paper argues that the pruning decision should depend on the convolutional weights, and thus proposes novel weight-dependent gates (W-Gates) to learn the information from filter weights and obtain binary gates to prune or keep the filters automatically. To prune the network under efficiency constraints, a switchable Efficiency Module is constructed to predict the hardware latency or FLOPs of candidate pruned networks. Combined with the proposed Efficiency Module, W-Gates can perform filter pruning in an efficiency-aware manner and achieve a compact network with a better accuracy-efficiency trade-off. We have demonstrated the effectiveness of the proposed method on ResNet34, ResNet50, and MobileNet V2, respectively achieving up to 1.33/1.28/1.1 higher Top-1 accuracy with lower hardware latency on ImageNet. Compared with state-of-the-art methods, W-Gates also achieves superior performance. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
5. Alternating Optimization Approach for Voltage-Secure Multi-Period Optimal Reactive Power Dispatch.
- Author
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Ibrahim, Tamer, Rubira, Tomas Tinoco De, Rosso, Alberto Del, Patel, Mahendra, Guggilam, Swaroop, and Mohamed, Ahmed A.
- Subjects
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REACTIVE power , *ELECTRIC networks , *ELECTRIC utilities , *POWER resources , *SYNCHRONOUS generators , *INTEGRATED software - Abstract
This paper proposes an optimization approach for day-ahead reactive power planning to improve voltage security in transmission networks. The problem is formulated as a voltage-secure multi-period optimal reactive power dispatch (MP-ORPD) problem. The optimization approach searches for optimal set-points of dynamic and static reactive power (var) resources. Specifically, the output includes set-points for switching shunts, transformer taps, and voltage magnitudes at the regulated buses. The primary goal is to maximize the dynamic reactive power reserve of the system, by minimizing the reactive power supplied by synchronous generators. As the size of the MP-ORPD problem increases significantly with increasing number of contingencies and time periods, efficiency is crucial for practical applications. In this paper, a decomposition technique based on consensus and alternating optimization, where integer variable targets are obtained via MILP, is used to partition the MP-ORPD problem into a set of subproblems, which can be solved in parallel to reduce the computation time. The proposed MP-ORPD problem and its solution algorithm are integrated into the EPRI-VCA software. The results of various power networks of large electric utilities in the Eastern interconnection demonstrate the effectiveness of the proposed algorithm in providing preventive control schedules. [ABSTRACT FROM AUTHOR]
- Published
- 2022
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6. Four-Vector Phase Model Predictive Voltage Control for Half-Centralized Open-End Winding Permanent-Magnet Linear Motor Systems.
- Author
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Jiang, Yixin, Wang, Wei, Wang, Zheng, Hua, Wei, and Cheng, Ming
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VOLTAGE control , *LINEAR systems , *PREDICTION models , *POWER electronics , *PERMANENT magnet motors - Abstract
In order to achieve the purpose of extending the speed range and reducing power electronics devices for the permanent-magnet linear motor drive system, a half-centralized open-end winding (OEW) topology is studied for rail transit applications in this paper. In this topology, compared with the traditional OEW topology, the number of voltage-source-inverters (VSIs) can be reduced from four to three to drive two OEW movers and all these VSIs share a common dc bus voltage. In order to improve the steady-state performances, a four-vector phase model predictive voltage control (FV-PMPVC) is proposed in this paper. Due to the spatial distribution of phase voltage vector (PVV), an orthometric synthesis principle (OSP) is proposed to calculated the duration time for the vector synthesis, which reduces the computation burden and enhances the robustness. Comparing the existing control method, FV-PMPVC can get similar dynamic performances but better steady-state performances. Additionally, the half-centralized topology using FV-PMPVC can have same speed range while less VSIs are required. The effectiveness of FV-PMPVC is verified by experimental results. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
7. An Optimal Algorithmic Approach to Efficiently Automate Fault Isolation and Service Restoration on an Arbitrary Distribution Feeder System.
- Author
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Granberg, Daniel, Pinney, David, and Eldali, Fathalla
- Subjects
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MATHEMATICAL proofs , *FAULT location (Engineering) , *RELIABILITY in engineering , *SALT marshes - Abstract
Weather-related or other types of faults can negatively impact the continuity of the electricity delivery to the consumers and, thus, lead to poorer reliability scores. 90% of customer outage-minutes are due to events which affect local distribution systems. The radial configuration is simple and has a low cost design; however, when a fault occurs it often causes power outages beyond the location of the fault itself. Therefore, it is beneficial for utilities to automatically isolate the fault and, thus, restore power to as many consumers as possible. The benefits of fault isolation and service restoration include, but are not limited to: enhanced reliability and resiliency, reduced loss of revenue to the utility, and enhanced comfort and satisfaction for the utility’s consumers. This paper provides an algorithm to quickly isolate a fault and automatically restore power to as many nodes of the distribution system as possible by opening and closing switches already placed within the system. The expert model and centralized algorithm that are proposed in this paper guarantee an optimal solution and a short run-time regardless of the size of the distribution system. A mathematical proof of the optimal nature of the solution is provided. In addition, the model is validated in practice, solving two different-sized systems. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
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8. Reconfigurable Filtering Power Divider With Arbitrary Operating Channels Based on External Quality Factor Control.
- Author
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Xu, Jin-Xu, Huang, Mo, Zhan, Wan-Li, and Zhang, Xiu Yin
- Subjects
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ELECTRIC power filters , *QUALITY factor , *POWER dividers , *QUALITY control , *PIN diodes , *IMPEDANCE matching - Abstract
In this paper, we propose a scheme to design the reconfigurable filtering power divider with arbitrary operating channels based on external quality factor ($Q_{\mathbf {e}}$) control. By using an input feeding line, ${n}$ resonators, and $m$ output feeding lines, the $n^{\mathbf {th}}$ -order $m$ -way filtering power divider topology can be obtained with a simple configuration. A coupled-line output feeding structure loading with multiple PIN diodes is proposed to adjust the output $Q_{\mathbf {e}}$ values. Design theories for obtaining the desired $Q_{\mathbf {e}}$ values are provided. Then, the filtering power divider can be fully reconfigured in the states with one to $m$ operating channels. Good input matching can be achieved without using an additional reconfigurable impedance matching network in all these states, resulting in a size and loss reduction. For verification, a 2nd-order 4-way reconfigurable filtering power divider is designed, fabricated, and measured. As compared to the reported reconfigurable power dividers, the proposed design shows the merits of fully reconfigurable operating channels, favorable filtering responses, low insertion losses, high isolation, and a simple structure. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
9. A Model-Based Approach Digital Pre-Distortion Method for Current-Steering Digital-to-Analog Converters.
- Author
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Valet, Patrick, Schwingshackl, David, Gaier, Ulrich, and Tonello, Andrea M.
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DIGITAL-to-analog converters , *TISSUE arrays , *COMPUTER architecture , *SIGNAL processing , *CALIBRATION - Abstract
This paper presents a novel static digital pre-distortion (DPD) method for a current-steering digital-to-analog converter (CS-DAC). The proposed method utilizes the knowledge of the current cell array architecture to calculate the static mismatch currents of the cells. The mismatch values are stored in memory and added to the original input code to generate the new pre-distorted input word. The converter corrects the static error with its own current cells without incorporating an additional calibration DAC (CALDAC) or programmable current sources. This results in a reduction in area, power and simulation run times because of the simpler circuit design. An Overflow-Cell-Selection (OCS) is introduced as a novel solution to further enhance the static linearity of the converter. It also can be implemented as a software solution for already existing DAC designs which do not have an integrated DPD and lab/measurement equipment (e.g., arbitrary wave generator (AWG)). This poses as a strong differentiation factor compared to other state-of-the-art static DPD methods. The evaluation of the proposed DPD is done via simulations in MATLAB and on- chip measurements with a 14-bit CS-DAC in 16 nm. Single tone measurements show a performance gain of the total harmonic distortion (THD) of 12 dB. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
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10. Biocompatible a-SiC:H-Based Bistable MEMS Membranes With Piezoelectric Switching Capability in Fluids.
- Author
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Moll, Philipp, Pfusterschmied, Georg, Schneider, Michael, Dorfmeister, Manuel, Knafl, Sebastian, Wanzenboeck, Heinz D., and Schmid, Ulrich
- Abstract
In this paper, we demonstrate biocompatible micromachined buckled membranes for the operation in liquids. The membranes feature diameters between 600 and 800 $\mu \text{m}$ as well as integrated piezoelectric thin film actuators, thus enabling switching between the bistable states. The membrane material is known to be not biocompatible, hence a hydrogenated amorphous silicon carbide (a-SiC:H) layer is deposited on the surface. For demonstration purposes, a 70 nm ±3 nm thin a-SiC:H coating with a specific silicon to carbon ratio was chosen, with a negligible impact on the overall switching performance of the bistable membranes. Furthermore, a relation between the membrane center velocity at the first characteristic resonance frequency and the switching ability of a membrane in different viscous fluids is shown. Based on a small signal analysis the switching behavior can be predicted. The membranes were successfully switched in liquids with a dynamic viscosity up to 286 mPa $\cdot \text{s}$. The biocompatibility of the membranes was examined by growing Caco-2 cells, a human carcinoma cell line, on a-SiC:H thin films, featuring different carbon contents and organic surface treatments. The proliferation and adhesion of the cells on the substrates are examined in an empirical cell growth and removal study. Only a-SiC:H surfaces pre-treated with an O2-plasma and coated with Collagen Type I indicated to provide an environment of improved cell adhesiveness compared to other surface treatments. The biological investigations resulted in good cell proliferation, that also depends on the altered hydrophilicity of the surface, as well as on the carbon content of the a-SiC:H thin films. This study reveals that a broad range of biocompatible a-SiC:H surfaces can be prepared, whereby the cell growth can be tailored in terms of proliferation and adhesion for different biomedical application scenarios. Finally, this paper reports on the mechanical features of bistable, buckled membranes and their suitability as a growth substrate for human cell cultures, due to the good biocompatibility of a-SiC:H thin films. We therefore suggest that it will be feasible to grow cells on bistable MEMS membranes, enabling cell experiments in liquid medical environments, with both mechanically excitable and biocompatible surfaces. [2022-0006] [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
11. An Effective Non-Square Matrix Converter Based Approach for Active Power Control of Multiple DGs in Microgrids: Experimental Implementation.
- Author
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Sadooghi, Ramin, Niknam, Taher, Sheikh, Morteza, Askarpour, Mohammad, Roustaei, Mahmoud, Chabok, Alireza, and Aghaei, Jamshid
- Subjects
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MATRIX converters , *REACTIVE power , *DISTRIBUTED power generation , *MICROGRIDS , *CASCADE converters - Abstract
In this paper, a new modulation strategy based on the carrier-based switching strategy for the non-square direct matrix converters (MC) is proposed to control the active power of distributed generation (DG) units. In this strategy, the active power of DGs is controlled by the central input current control of the non-square direct MC independent from the voltage and frequency. Conventionally, each DG has a converter, and for supplying a load with N number of DGs, N number of converters are needed and each converter has its own modulation switching and control strategy to control the power output of each DG. Needless to say, in a microgrid with N number of DGs, the control strategy of each converter has more complex structure than that of a microgrid with one converter, and surely the former strategy entails more volume and price. Using the proposed converter in this paper, it is possible to supply a load with N number of DGs through one converter. Also, the power outputs of all DGs are controlled by a central control strategy. The proposed central control strategy is described and simulated for a typical microgrid. Experimental and simulation results validate the effectiveness of the proposed converter and the proposed strategy. The results demonstrate the applicability and efficiency of the system and verify the theoretical analysis. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
12. Ultra-Voltage Gain Step-Up DC-DC Converter for Renewable Energy Micro-Source Applications.
- Author
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Bekkam, Krishna and Karthikeyan, V.
- Subjects
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DC-to-DC converters , *RENEWABLE energy sources , *CAPACITOR switching , *MOTOR drives (Electric motors) - Abstract
In renewable energy micro-source applications, a wide range of voltage conversion of the step-up converter is an essential part to equalize the typical low voltage of micro-source with DC-bus voltage of Inverter or motor drives. In order to meet this purpose, an ultra-voltage gain step-up DC-DC converter is proposed in this paper. The proposed converter has made an arrangement of the regenerative-boost fed switched inductor and capacitor configurations. Thereby, due to such an organization of structure, the proposed converter can develop an extremely high voltage-gain even at lower duty ratios. In addition, it has the advantage of lower switching stress across all power semi-conductive diodes. Furthermore, this paper describes the steady-state analysis and comparative features of the converter with existing recent literature. Finally, to validate theoretical analysis and test the feasibility and suitability of the proposed ultra-gain converter, the experimental results were observed by a 500 W fabricated prototype. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
13. A 1.5-GS/s 6-bit Single-Channel Loop-Unrolled SAR ADC With Speculative CDAC Switching Control Technique in 28-nm CMOS.
- Author
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Lee, Eunsang, Pyo, Changhyun, Lee, Sanghun, and Han, Jaeduk
- Subjects
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SUCCESSIVE approximation analog-to-digital converters , *ANALOG-to-digital converters , *NYQUIST frequency , *TIME-frequency analysis , *COMPARATOR circuits , *CALIBRATION - Abstract
This paper presents a 1.5-GS/s 6-bit single-channel loop-unrolled successive approximation register (SAR) analog-to-digital converter (ADC) using speculative capacitive DAC (CDAC) switching control technique. The proposed SAR ADC achieves a high sampling rate by eliminating additional delays in typical loop-unrolled SAR ADCs related to settling time constraints in their CDACs. Specifically, the CDACs are duplicated and controlled in speculative ways so that the CDAC outputs passage to their next values before completing the regeneration operation of comparators, thereby improving timing constraints for successive approximations. The switching power overhead from the CDAC speculation is mitigated by introducing an energy-efficient CDAC control technique that produces desired voltage transients with minimal power overheads. The prototype of the proposed SAR ADC is fabricated in a 28-nm CMOS technology and occupies an active area of 0.0038-mm2. The design consumes 5.8 mW from a 1.2-V supply. The ADC achieves 1.5-GS/s sampling frequency with a 31-dB SNDR at a low input frequency and a 28.6 dB at the Nyquist frequency without applying any offset calibration techniques, achieving the highest sampling frequency among the 6-bit single-channel loop-unrolled SAR ADCs reported. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
14. Stability of Logical Dynamic Systems With a Class of Constrained Switching.
- Author
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Ding, Xueying, Lu, Jianquan, and Li, Haitao
- Subjects
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DYNAMICAL systems , *DYNAMIC stability , *LOGIC , *STABILITY criterion - Abstract
In this paper, a novel constrained switching rule, called “time-triggered logical switching” (TTLS) is considered for switched logical dynamic systems (SLDSs). Compared with the general time-triggered switching, the activation mode of TTLS cannot be arbitrary and is pre-allocated according to the logic operation, which is more practical. The TTLS is described as an LDS, and according to the characteristics of LDS, the stability analysis of SLDSs with TTLS is converted into the stability analysis of SLDSs under the logical switching cycle sequences. Firstly, based on the equivalent algebraic form of SLDSs with TTLS, combining the Lyapunov theory of LDS with average dwell-time method, several sufficient conditions are put forward for ensuring the point stability of the considered SLDSs. Then, by defining the switching cycle invariant subset and constructing a new system, the set stability analysis of the original system is transformed into the point stability analysis of the new system, and further, the obtained results for the point stability analysis are applied to the set stability analysis. At last, the validity of obtained results is illustrated by simulation on gene and protein signaling activity patterns. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
15. Comprehensive Analysis of Voltage Step-Up Techniques for Isolated SEPIC.
- Author
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Andres, Bernardo, Romitti, Leonardo, Andrade, Antonio Manuel Santos Spencer, Roggia, Leandro, and Schuch, Luciano
- Subjects
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VOLTAGE , *LOW voltage systems - Abstract
High step-up converters are often used in photovoltaic applications due to low voltage of photovoltaic modules. In this paper, a study of several voltage step-up cells added on primary and secondary sides of an isolated dc-dc SEPIC (single ended primary inductor converter) is made, in order to increase its static gain and synthesize a family of converters. To perform this study and select the most appropriate resulting converter, theoretical and comparative analyzes are accomplished. They include a brief description of each converter, tables and curves with relevant information, such as voltage gain, voltage stresses and component count, and the identification of the use of coupled inductor or transformer based on the analysis of dc magnetizing current. Moreover, theoretical analysis and experimental results on a 50 kHz and 200 W prototype of selected isolated SEPIC with voltage doubler cell are presented to validate the proposed topology and concept. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
16. A Highly Integrated Tri-Path Hybrid Buck Converter With Reduced Inductor Current and Self-Balanced Flying Capacitor Voltage.
- Author
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Wang, Chuang, Lu, Yan, and Martins, Rui P.
- Subjects
- *
CAPACITORS , *VOLTAGE , *PRIVATE flying , *AC DC transformers , *LOW voltage systems , *DC-to-DC converters , *CAPACITOR switching - Abstract
This paper presents a single-stage tri-path buck converter with reduced inductor current and self-balanced flying capacitor voltage. The proposed converter introduces capacitor paths to reduce the average inductor current and inductor current ripple, hence decreasing the conduction loss. Operating with two states per conversion cycle, it exhibits a relatively low voltage conversion ratio of ${D}$ /(1 $+\,\,2{D}$). Besides, it realizes a self-balanced flying capacitor voltage in the charge redistribution phase. Similar to the conventional buck converter, the proposed converter in continuous-current mode only has two complex poles. Therefore, we design a Type-III compensator to obtain a good transient response. Moreover, the circuit does not require extra supplies for gate drivers due to the reutilization of the flying capacitor voltages, eliminating additional circuit and power overheads. The proposed converter, validated in a 65-nm standard CMOS technology, regulates a 0.7 V – 1 V output voltage from a 3.3 V – 4 V input voltage, delivering a maximum output power of 270 mW. The peak efficiency is 84%, with a switching frequency up to 5 MHz. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
17. An Active EMI Cancellation Technique Achieving a 25-dB Reduction in Conducted EMI of LIN Drivers.
- Author
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Ray, Abhishek, Magod, Raveesh, Talele, Bhushan, Alevoor, Shashank, Mayhugh, Terry, and Bakkaloglu, Bertan
- Subjects
- *
ELECTROMAGNETIC interference , *ELECTROMAGNETIC compatibility , *SYSTEMS on a chip , *FREQUENCY spectra , *COMPUTER performance , *POWER spectra , *VOLTAGE-controlled oscillators - Abstract
Robustness to electromagnetic interference (EMI) is one of the primary design aspects of state of the art automotive ICs like System Basis Chips (SBCs) which provide a wide range of analog, power regulation and digital functions on the same die. One of the primary sources of conducted EMI on the Local Interconnect Network (LIN) driver output is an integrated switching DC-DC regulator noise coupling through the parasitic substrate capacitance of the SBC. In this paper an adaptive active EMI cancellation technique to cancel the switching noise of the DC-DC regulator on the LIN driver output to ensure electromagnetic compatibility (EMC) is presented. The proposed active EMI cancellation circuit synthesizes a phase synchronized cancellation pulse which is then injected onto the LIN driver output using an on-chip tunable capacitor array to cancel the switching noise injected via substrate. The proposed EMI reduction technique can track and cancel substrate noise independent of process technology and device parasitics, input voltage, duty cycle and loading conditions of the DC-DC switching regulator. The EMI cancellation system is designed and fabricated on a 180nm Bipolar-CMOS-DMOS (BCD) process with an integrated power stage of a DC-DC buck regulator at a switching frequency of 2MHz along with an automotive LIN driver. The EMI cancellation circuit occupies an area of 0.7 mm2, which is less than 3% of the overall area in a standard SBC and consumes 12.5 mW of power and achieves 25 dB reduction of conducted EMI in the LIN driver output’s power spectrum at the switching frequency and its harmonics. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
18. FPGA Synthesis of Ternary Memristor-CMOS Decoders for Active Matrix Microdisplays.
- Author
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Wang, Xiao-Yuan, Wu, Zhi-Ru, Zhou, Peng-Fei, Iu, Herbert Ho-Ching, Kang, Sung-Mo, and Eshraghian, Jason K.
- Subjects
- *
LOGIC design , *LOGIC circuits , *GATE array circuits , *FIELD programmable gate arrays , *LED displays - Abstract
The search for a compatible application of memristor-CMOS logic gates has remained elusive, as the data density benefits are offset by slow switching speeds and resistive dissipation. Active microdisplays typically prioritize pixel density (and therefore resolution) over that of speed, where the most widely used refresh rates fall between 25–240 Hz. Therefore, memristor-CMOS logic is a promising fit for peripheral I/O logic in active matrix displays. In this paper, we design and implement a ternary 1–3 line decoder and a ternary 2–9 line decoder which are used to program a seven segment LED display. SPICE simulations are conducted in a 50-nm process, and the decoders are synthesized on an Altera Cyclone IV field-programmable gate array (FPGA) development board which implements a ternary memristor model designed in Quartus II. Our approach to logic synthesis demonstrates a potential way forward for simulating large-scale memristor-CMOS circuits without embedded RRAM for functional verification, and our SPICE results show an improvement in data density of a variety of decoders by a factor between 3.6-8.5. While the switching speed of memristors are one of several bottlenecks to using them in combinational logic, the comparatively slow refresh rates of typical microdisplays indicate this to be a tolerable trade-off, which promotes data density over speed. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
19. A Fast, Energy Efficient and Tunable Magnetic Tunnel Junction Based Bitstream Generator for Stochastic Computing.
- Author
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Becle, Etienne, Prenat, Guillaume, Talatchian, Philippe, Anghel, Lorena, and Prejbeanu, Ioan-Lucian
- Subjects
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MAGNETIC tunnelling , *BINARY sequences , *BIT rate - Abstract
This paper presents a full hardware implementation of a magnetic tunnel junction based stochastic tunable bitstream generator. It provides highly accurate control of the switching probability, while showing important robustness to process and temperature variations. We propose a new architecture of sensing scheme based on the pre-charged sense amplifier approach that uses an asynchronous digital module to control the internal signals of the sense amplifier with the purpose of improving the reliability against the timing hazards and reducing the power consumption by detecting the end of the reading to stop the required static currents. The circuit also features a digital feedback loop that analyzes the output bitstream and adapt the current in such a way that the bitstream encodes precisely the required probability. This circuit features an important bit generation rate at a low energy cost. Based on an exhaustive characterization of the circuit, we provide a behavioral description in Verilog, with timing and power files to be integrated as a standard cell in the digital design flow for application level evaluation of the performance. Thus, we also provide a design and evaluation flow from device to digital level of abstraction. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
20. Oil Conductivity Estimation of Transformer Insulation by Switching Impulse Application.
- Author
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Pradhan, A. K. and Tenbohlen, S.
- Subjects
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TRANSFORMER insulation , *POWER transformers - Abstract
This article discusses an advanced method for estimating dc conductivity of oil using parameters evaluated under switching impulse voltage application. Firstly, the effectiveness of switching impulse application for assessing the condition of oil–paper insulation is investigated. Thereafter, the evaluated parameters under switching impulse voltage are fitted by Havriliak and Negami (HN) model for estimating the oil conductivity. The method is applied on oil-impregnated pressboards containing different moistures and a distribution transformer for experimental investigation. Moreover, the limitations of the proposed method are also discussed in this article. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
21. An Accurate Impedance Model of Line Commutated Converter With Variable Commutation Overlap.
- Author
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Chen, Xiang, Ma, Junpeng, Wang, Shunliang, Liu, Tianqi, Liu, Dong, and Zhu, Tianyu
- Subjects
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VECTOR spaces , *BIVECTORS , *PHASE-locked loops - Abstract
This paper proposes an accurate impedance model for line commutated converter (LCC) in the stationary frame. The commutation overlap process caused by the transformer leakage inductance complicates the modeling for LCC. Traditional impedance models are derived in positive sequence and negative sequence frame based on the simplified commutation overlap process, which degrades the modeling accuracy and limits the description of frequency coupling. This paper systematically analyzes the effects of the commutation overlap process on the impedance model, and the impedance model with the accurate commutation overlap process is established in the dq-frame. For clearly revealing the frequency coupling phenomenon of the LCC, the complex space vector is employed to extend the impedance model in the dq-frame to the complex αβ-frame. A closed-loop model on PSCAD/EMTDC is used to verify the proposed impedance model in the time-domain and the frequency-domain. The consistency between the simulation results and theoretical analysis effectively verifies the accuracy of the proposed model. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
22. A Modulation Method to Eliminate Leakage Current and Balance Neutral-Point Voltage for Three-Level Inverters in Photovoltaic Systems.
- Author
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Yu, Tianbao, Wan, Wenchao, and Duan, Shanxu
- Subjects
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STRAY currents , *PHOTOVOLTAIC power systems , *PULSE width modulation transformers , *VOLTAGE - Abstract
In photovoltaic systems, common-mode voltage (CMV) generates leakage current, which shortens the insulation lifespan and causes safety problems. As for neutral-point-clamped (NPC) inverters, zero CMV PWM (ZCMV PWM) can be implemented to eliminate leakage current, but unable to balance neutral-point (NP) voltage in dc side. This article presents a novel modulation technique for NPC PV inverter. The strategy contains ZCMV PWM and another two modulation modes which keeps CMV constant in one switching period, so as to eliminate leakage current. In order to balance NP voltage, NP current is adjusted by selection of optimal modulation mode and the leakage current is still well eliminated during the process of balancing NP voltage. Compared with conventional ZCMV PWM, the proposed scheme can remove both leakage current and NP voltage deviation. The output performance and limitations of the proposed method are also introduced in the paper. Experiments are provided to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]
- Published
- 2023
- Full Text
- View/download PDF
23. The Impact of Device Uniformity on Functionality of Analog Passively-Integrated Memristive Circuits.
- Author
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Fahimi, Z., Mahmoodi, M. R., Klachko, M., Nili, H., and Strukov, D. B.
- Subjects
- *
UNIFORMITY , *MEMRISTORS , *COMPUTER systems , *ANALOG circuits , *ALGORITHMS , *NEUROMORPHICS - Abstract
Passively-integrated memristors are the most prospective candidates for designing high-speed, energy-efficient, and compact neuromorphic circuits. Despite all the promising properties, experimental demonstrations of passive memristive crossbars have been limited to circuits with few thousands of devices until now, which stems from the strict uniformity requirements on the IV characteristics of memristors. This paper expands upon this vital challenge and investigates how uniformity impacts the computing accuracy of analog memristive circuits, focusing on neuromorphic applications. Specifically, the paper explores the tradeoffs between computing accuracy, crossbar size, switching threshold variations, and target precision. All-embracing simulations of matrix multipliers and deep neural networks on CIFAR-10 and ImageNet datasets have been carried out to evaluate the role of uniformity on the accuracy of computing systems. Further, we study three post-fabrication methods that increase the accuracy of nonuniform 0T1R neuromorphic circuits: hardware-aware training, improved tuning algorithm, and switching threshold modification. The application of these techniques allows us to implement advanced deep neural networks with almost no accuracy drop, using current state-of-the-art analog 0T1R technology. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
24. Fixed-Time Stabilization for Nonlinear Systems With Low-Order and High-Order Nonlinearities via Event-Triggered Control.
- Author
-
Meng, Qingtan, Ma, Qian, and Shi, Yang
- Subjects
- *
SWITCHING theory , *NONLINEAR equations , *CONTROL theory (Engineering) , *NONLINEAR systems , *STABILITY criterion - Abstract
This paper investigates the fixed-time stabilization problem for a class of nonlinear systems via event-triggered control. The event-triggered mechanism can be applied to the nonlinear system with the coexistence of low-order and high-order nonlinearities. In order to deal with these low-order and high-order terms as well as achieve the objective of fixed-time stabilization, the initial value of the system is divided into two cases, and then the event-triggered controller is designed, respectively. By switching control theory, it is proved that the nonlinear system is globally fixed-time stable under the designed controller and the Zeno behavior can be excluded. Finally, two simulations show that the proposed technology is effective. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
25. Reconfigurable and Dynamically Transformable In-Cache-MPUF System With True Randomness Based on the SOT-MRAM.
- Author
-
Hou, Zhengyi, Wang, Zhaohao, Wang, Chao, Wang, Min, Wang, You, Wang, Xueyan, Duan, Cenlin, and Yang, Jianlei
- Subjects
- *
RANDOM number generators , *MONTE Carlo method , *BIT error rate , *THERMAL noise , *BINARY sequences , *ERROR rates - Abstract
In this paper, we present a reconfigurable Physically Unclonable Functions (PUF) based on the Spin-Orbit-Torque Magnetic Random-Access Memory (SOT-MRAM), which exploits thermal noise as the true dynamic entropy source. Therefore, the MRAM cells could be configured to random final states with stochastic switching mechanism. The proposed PUF is constructed and reconfigured by combining the small-capacity true random number generator (TRNG) and high-reliability secure hash algorithm (SHA-512), realizing the dynamic transformation between SOT-MRAM based last level cache and PUF (In-Cache-MPUF). Thanks to the full reconfigurability and the high endurance of SOT-MRAM, the proposed In-Cache-MPUF can achieve $10^{\textbf {14}}$ maximum PUF bits per cell, which has greatly motivated the implementations compared with the traditional weak PUFs utilizing the static entropy source of process variations. The Monte-Carlo simulation results using 40 nm technology and a compact MTJ model show that the proposed PUF has desirable randomness as the digitized bit streams passing all the NIST tests, achieving 50.0428% uniqueness as well as 49.9236% uniformity. It also shows comparable reliability to the state-of-the-art works: a maximum bit error rate of 0.14% and 0.12% at 100 °C and 0.9 V, respectively. In addition, the system level performance is tested and validated by gem5. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
26. Input-to-State Stability Criteria of Discrete-Time Time-Varying Impulsive Switched Delayed Systems With Applications to Multi-Agent Systems.
- Author
-
Fu, Zhiwen and Peng, Shiguo
- Subjects
- *
MULTIAGENT systems , *STABILITY criterion , *TIME-varying systems , *DISCRETE-time systems , *FUNCTIONALS - Abstract
This paper considers weakly and strongly input-to-state stability (ISS) of a discrete-time time-varying delayed system with synchronous impulses and switches. By employing the uniformly asymptotically stable function and mode-dependent dwell time conditions, ISS criteria are derived using the Krasovskii and Razumikhin techniques. The time differences of the Krasovskii functionals or the Razumikhin functions can be mode-dependent and time-varying, which release constraints of some existing results. As subsequent results, we apply the derived ISS criteria to the multi-agent systems (MASs). Finally, two examples considering the quasi-consensus of MASs are given to verify the established results. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
27. A Transformer-Based Technique to Improve Tuning Range and Phase Noise of a 20–28GHz LCVCO and a 51–62GHz Self-Mixing LCVCO.
- Author
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Esmaeeli, Omid, Lightbody, Sam, Shirazi, Amir Hossein Masnadi, Djahanshahi, Hormoz, Zavari, Rod, Mirabbasi, Shahriar, and Shekhar, Sudip
- Subjects
- *
PHASE noise , *VOLTAGE-controlled oscillators , *COMPLEMENTARY metal oxide semiconductors , *VARACTORS , *ELECTRIC capacity , *REACTIVE power - Abstract
Varactors in RF CMOS processes often have significantly lower Q- factor ($Q_{VAR}$) than inductors and transformers at mm-wave frequencies. Direct connection of varactors to the outputs of an LC oscillator lowers overall tank Q, $Q_{T} < Q_{VAR}$ , and at the same time, increases the ratio of parasitic capacitance to total tank capacitance which limits frequency tuning range (FTR). Instead, magnetically coupling a varactor to the oscillator core using an asymmetric transformer, where the core is connected to the primary and varactor to the secondary, limits the drop in $Q_{T}$. The ratio of parasitic capacitance to total tank capacitance is also reduced. The varactor can also be operated in accumulation-mode, with a larger $Q_{VAR}$. Thus, both FTR and phase noise (PN), in comparison to traditional tanks in LC VCOs, are improved simultaneously. In this paper, two VCO prototypes are implemented in 65-nm CMOS. A 60 GHz self-mixing VCO with a VCO core operating at 20 GHz shows an FTR of 18.5%, a PN of −92.5 dBc/Hz at 1 MHz offset, and an FoM $_{T}$ of −187.1 dBc/Hz. A 25 GHz VCO shows an FTR of 29.9%, a PN of −107.9 dBc/Hz at 1 MHz offset, and an FoM $_{T}$ of −194.2 dBc/Hz. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
28. Feedback Stabilization of Switched Linear Systems: A Quantization and Triggering Joint Event-Triggered Mechanism.
- Author
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Wang, Xiaomei and Zhao, Jun
- Subjects
- *
LINEAR systems , *LYAPUNOV functions , *SYMMETRIC matrices , *COMPUTER simulation - Abstract
This paper adopts a quantization-dependent Lyapunov function to study the output feedback stabilization problem of a switched system subject to output event-triggered sampling and quantization. First, a new event-triggered mechanism related to quantization parameters is proposed, which can obtain a trade-off between the event-triggered frequency and quantization density on the premise of ensuring asymptotic stability of the switched system. Moreover, sufficient conditions are obtained to ensure asymptotic stability of the switched system by a quantization-dependent Lyapunov function. Lastly, through a numerical simulation and PWM-driven boost converter system, we demonstrate the availability of the proposed quantization-dependent Lyapunov function and event-triggered mechanism methods based on quantization parameters, respectively. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
29. Event-Triggered Synchronization of Multiple Discrete-Time Markovian Jump Memristor- Based Neural Networks With Mixed Mode-Dependent Delays.
- Author
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Li, Huiyuan, Fang, Jian-An, Li, Xiaofan, Rutkowski, Leszek, and Huang, Tingwen
- Subjects
- *
MARKOVIAN jump linear systems , *LINEAR matrix inequalities , *NEURAL circuitry , *KRONECKER products , *SYNCHRONIZATION , *STABILITY theory , *VERTICAL jump - Abstract
This paper deals with global synchronization problem of multiple discrete-time Markovian jump memristor-based neural networks (DTMJMNNs) with mixed mode-dependent delays via a novel event-triggered impulsive coupling control (ETICC). The parameters of the multiple DTMJMNNs and the mixed time delays (both discrete and distributed delays) switch randomly according to a Markov chain. In the ETICC strategy, the controller does not work all the time, but only works at impulse instants determined by specific events. In particular, the coupling matrix can be non-Laplacian. By using the Lyapunov stability theory, linear matrix inequalities (LMIs), and the Kronecker product, some sufficient conditions for global synchronization of multiple DTMJMNNs under the event-triggered strategy are derived. Two examples are presented to test the validity of the theoretical analysis results. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
30. Nonlinear Control Design and Stability Analysis of Single Phase Half Bridge Interleaved Buck Shunt Active Power Filter.
- Author
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Echalih, Salwa, Abouloifa, Abdelmajid, Lachkar, Ibtissam, Hekss, Zineb, Aroudi, Abdelali El, Giri, Fouad, and Al-Numay, Mohammed S.
- Subjects
- *
ELECTRIC power filters , *DC-to-DC converters , *AC DC transformers , *CLOSED loop systems , *LYAPUNOV stability , *CAPACITORS , *VOLTAGE control - Abstract
This paper deals with nonlinear control of a single-phase half-bridge interleaved buck shunt active power filter (HBIB-SAPF) with a nonlinear load. The control objective for the system is twofold: performing power factor correction by compensating for harmonics and reactive current consumed by the nonlinear load from one hand and tightly regulating the HBIB converter DC capacitor voltage. Both objectives are accomplished using a two-loop nonlinear controller. The inner loop acts on the switching devices so that the active filter current tracks its reference with the aim of ensuring a unity power factor. This loop is tackled using backstepping technique and Lyapunov approach. The outer loop is responsible for regulating the DC capacitor voltage to its desired value, using a PI controller with a pre-filter. The stability analysis of the closed-loop system is formally performed by using the averaging theory. The validity of the designed nonlinear controller is checked by simulations in Matlab/SimpowerSystem showing its robustness and accuracy under various operating conditions. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
31. A GaN Driver for a Bi-Directional Buck/Boost Converter With Three-Level V GS Protection and Optimal-Point Tracking Dead-Time Control.
- Author
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Luo, Di, Gao, Yuan, and Mok, Philip K. T.
- Subjects
- *
TIME delay systems , *GALLIUM nitride , *ZERO voltage switching , *MODULATION-doped field-effect transistors , *ARTIFICIAL satellite tracking , *VOLTAGE-frequency converters - Abstract
This paper presents a gate driver for a GaN-based half-bridge structure operating in a buck converter with input voltage >40 V or a boost converter with output voltage >30 V. Two 500 pF on-chip capacitors are utilized to construct three-level gate drivers, providing a near- $V_{{\text {DD}}}$ negative voltage for gate of the rectifier switch to eliminate the induced pulse on the gate from the high dv / dt slew rate of $V_{\text {X}}$ when the main switch is turned on. The dead time controller tunes the delay of the gate signal of the rectifier switch by sensing the slope of $V_{\text {X}}$ , thus the near-optimal zero-voltage switching can be achieved with deviation < 3 ns. The GaN driver is implemented with a 0.18- $\mu \text{m}$ BCD process. The efficiencies can be improved by 8.33% and 6.87% at light load in a buck and a boost converter due to the dead-time control. The peak efficiencies of 20 V–12 V and 12 V–18 V conversions are 86.37% and 84.39%, respectively. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
32. Switching Device-Cognizant Sequential Distribution System Restoration.
- Author
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Arif, Anmar, Cui, Bai, and Wang, Zhaoyu
- Subjects
- *
RADIAL distribution function , *LINEAR programming , *SWITCHING circuits , *INTEGER programming , *TOPOLOGY - Abstract
This paper presents an optimization framework for sequential reconfiguration using an assortment of switching devices and repair process in distribution system restoration. Compared to existing studies, this paper considers types, capabilities and operational limits of different switching devices, making it applicable in practice. We develop a novel multi-phase method to find the optimal sequential operation of various switching devices and repair faulted areas. We consider circuit breakers, reclosers, sectionalizers, load breaker switches, and fuses. The switching operation problem is decomposed into two mixed-integer linear programming (MILP) subproblems. The first subproblem determines the optimal network topology and estimates the number of steps to reach that topology, while the second subproblem generates a sequence of switching operations to coordinate the switches. For repairing the faults, we design an MILP model that dispatches repair crews to clear faults and replace melted fuses. After clearing a fault, we update the topology of the network by generating a new sequence of switching operations, and the process continues until all faults are cleared. To improve the computational efficiency, a network reduction algorithm is developed to group line sections, such that only switchable sections are present in the reduced network. The proposed method is validated on the IEEE 123-bus and 8500-bus systems. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
33. An Elimination Method for an Emergency Situation in Gas-Insulated Switchgear in Power Grids.
- Author
-
Borecki, Michal and Sobolewski, Konrad
- Subjects
- *
ELECTRIC power distribution grids , *ELECTRIC power failures , *CURRENT transformers (Instrument transformer) , *SULFUR hexafluoride , *RELIABILITY in engineering - Abstract
This paper presents the possibilities of reducing emergency situations and reducing the time of failure in the power grid. The paper contains a detailed description of the method (algorithm) of operation in emergency situations on the example of a Gas-Insulated Switchgear (GIS) located in one of the system-forming (node) stations in the power grid. The level of detail contained in this paper, which has not been previously encountered in previous publications, favors an in-depth understanding of the possible solutions that result from these emergencies. The above method (algorithm) of activities has been developed based on three levels of research: simulation, theoretical and practical. This means that the simulation analysis that was performed based on theoretical information was experimentally tested as part of an emergency situation in one of the system-forming (nodal) stations in the power system. In order to achieve the result described in this article, one of the most promising types of devices used in power systems was selected - the GIS. This has been confirmed by numerous analyzes of the effectiveness of these devices included in this article. The paper contains a detailed description of the individual steps in the field of corrective actions and aimed at minimizing downtime. In addition, this article provides guidance to monitor possible emergencies that are designed to increase the reliability of the power grid. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
34. Study on Temperature Rise Characteristics of GIS Disconnector Under Different Operating Conditions.
- Author
-
Zhao, Lihua, Wang, Zelong, Zhu, Haiyi, Hong, Guo, Ren, Junwen, Long, Wei, and Huang, Xiaolong
- Subjects
- *
DEBYE temperatures , *FINITE element method - Abstract
The degradation of the electrical contact in a gas insulated switchgear (GIS) is closely related to overheating at the contact. However, the disconnector contact is one of the hot contacts in GIS. Therefore, in this paper, the finite element method was used to solve the three-dimensional multiphysics coupling temperature rise field and flow field in the Single Phase in One Tank (SPIOT) type GIS disconnector under different operating conditions. From the perspective of temperature rise field and flow field, this paper analyzed the temperature rise characteristics under different working conditions and explored the feasibility of the direct application of air, CO2 and C4F7N/CO2 mixed gas to an electrical device. The disconnector temperature rise experiment platform was then built to verify the simulation. The results showed that the temperature rise field and the flow field distribution were similar in four gas environments. SF6 gas had the smallest temperature rise, followed by C4F7N/CO2 mixed gas, and the temperature rise of CO2 and air was relatively large. Therefore, from the perspective of the temperature rise field and flow field, it was feasible to directly apply C4F7N/CO2 mixed gas to an electrical device in order to meet insulation requirements. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
35. A Variable Inductor Controlled Single-Stage AC/DC Converter for Modular Multi-Channel LED Driver.
- Author
-
He, Qingqing, Luo, Quanming, Wei, Yuqi, and Sun, Pengju
- Subjects
- *
LIQUID crystal displays , *ELECTRIC current rectifiers , *MULTICHANNEL communication , *STREET lighting , *ZERO voltage switching , *LIGHT emitting diodes , *COST control - Abstract
Light-emitting diodes (LEDs) are widely used in street lighting, landscape lighting, liquid crystal display (LCD) backlighting, healthcare, etc. As an important part of LED lighting products, LED driver plays a vital role in maintenance costs reduction, energy saving and lifetime prolongation. In this paper, a single-stage LED driver is proposed, which is integrated by a totem-pole bridgeless power factor correction (PFC) unit and several modular LCL-T resonant rectifiers. The totem-pole bridgeless PFC unit and the LCL-T resonant rectifiers are integrated by sharing switches, which can simplify the circuit and reduce the system cost. The output current can be regulated by applying the variable inductor control. Constant duty cycle and fixed switching frequency operation can be achieved as well. The operating principle and the performance of the proposed converter are analyzed in this paper. In addition, a precise parameter design method is proposed by considering the high-order harmonics. At last, an experimental prototype is established to validate the proposed parameter design and variable inductor control method. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
36. Finite Control Set – Model Predictive Control Based On Sliding Mode For Bidirectional Power Inverter.
- Author
-
Estrada, Leonel, Vazquez, Nimrod, Vaquero, Joaquin, Hernandez, Claudia, Arau, Jaime, and Huerta, Hector
- Subjects
- *
SLIDING mode control , *PREDICTION models , *ENERGY consumption , *COST functions , *ELECTRIC inverters , *FINITE, The - Abstract
This paper presents a different Finite Control Set – Model Predictive Control (FCS-MPC) for grid-connected three-phase bidirectional power inverters. These are typically used in dc or ac renewable-based microgrids (MGs), where bidirectional operation and fast dynamic response is required. The bidirectional grid-connected inverters are an essential part of MG, which inject energy into the ac grid or demand energy from it. The dynamic behavior of the system is a major concern since the current can suddenly change depending on the hierarchical controller. This paper proposes a different cost function using sliding mode theory, which offers a good dynamic response, reduced computational burden, and a parameter-free control model. The operation principle of the proposed controller is given and evaluated using a Hardware-In-the-Loop (HIL) system, but also experimentally with a 1kW laboratory prototype. The final results demonstrate the advantages of using this approach in grid-connected three-phase bidirectional power inverters in terms of dynamic response and reduced computational burden, making this solution technically attractive and viable. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
37. A Hierarchic Capacitor Condition Monitoring Strategy for High-Voltage Modular Multilevel Converters.
- Author
-
Geng, Zhi, Han, Minxiao, Xie, Wenqiang, and Sun, Tiankui
- Subjects
- *
VOLTAGE references , *CAPACITORS , *ELECTRIC capacity , *VOLTAGE control , *ELECTRIC potential measurement - Abstract
The capacitor condition monitoring is an important issue for the reliable operation of modular multilevel converters (MMCs) in high-voltage applications. The numerous capacitors make the monitoring for the capacitor condition complex and computation-consuming. This paper proposes a hierarchic capacitor condition monitoring strategy to assure the reliability of high-voltage MMCs. In the strategy, the switching times of the switching signals are counted to detect the condition of the capacitor in each submodule (SM). Then, the subsequent capacitance calculation method is only conducted to the abnormal capacitors indicated by the above condition detection algorithm. Meanwhile, the variations of the measured and reference capacitor voltages are employed to calculate the capacitance in the proposed method. The condition detection algorithm shrinks the scope where the abnormal capacitors locate, which avoids calculating the total capacitances in MMCs. In the proposed capacitance calculation method, the complex operations are further saved. Both the two measures reduce the computation burden effectively. The implementation of the whole monitoring strategy is simple and fit for high-voltage MMCs. Moreover, the strategy has no adverse influence on the normal operation of MMCs. The effectiveness of the proposed strategy is verified by the simulation studies with the professional tool Matlab/Simulink. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
38. Design of a Decoupled Sliding Mode Control for Four-Leg Distribution Static Compensator.
- Author
-
Lokesh, Nalla and Mishra, Mahesh K.
- Subjects
- *
SLIDING mode control , *VOLTAGE references , *VOLTAGE-frequency converters , *DYNAMICAL systems - Abstract
In the conventional sliding mode control, the four-leg distribution static compensator (DSTATCOM) currents are controlled based on a current error in each phase. However, the four currents in a four-wire system can not be independently controlled variables and hence one of the four controllers is redundant in conventional schemes. Further, the current dynamics of a DSTATCOM converter are coupled through converter pole voltages in the natural reference frame. This leads to cross-coupling in the sliding variable equations with respect to four manipulated input variables. Considering the above points, in this paper, the current due to Thevenin’s equivalent load neutral-point voltage is considered as a fourth independent controlled variable and the corresponding system dynamic equations are presented. To get a decoupled feature, a new sliding surface function is structured. The performance of a DSTATCOM with the proposed control scheme under various operating conditions is validated through a detailed simulation study and experimental results, obtained from a laboratory prototype of four-leg DSTATCOM. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
39. Accurate Modeling of the VHF Resonant Boost Converter Considering Multiple Parasitic Parameters.
- Author
-
Zeng, Libin, Chen, Yanfeng, Zhang, Bo, and Qiu, Dongyuan
- Subjects
- *
NONLINEAR oscillators , *IDEAL sources (Electric circuits) , *ANALYTICAL solutions , *LOGIC circuits , *INTEGRATED circuits , *OSCILLATIONS - Abstract
In recent years, very high frequency (VHF) converter has attracted much attention. However, with rich parasitic parameters and complex resonance links, there are some great difficulties to the modeling of such systems. Taking the on-off controlled VHF resonant boost converter as an example, this paper presents an accurate modeling and analysis method that considers multiple parasitic parameters. First, the closed-loop VHF converter system is divided into a main network and a parasitic oscillation network. Then, based on the operation analysis, an equivalent circuit model characterized by a time-varying input voltage source and two variable duty-cycle controlled switches is proposed. It worth noting that both the time-varying input and the controlled switches take into account the influences of the parameters. Furthermore, the periodic approximate analytical solution of the output voltage in the on stage is obtained by using the equivalent small parameter method to the proposed circuit model. And then combining the solution of the parasitic oscillation network and on-off state switching conditions, the steady-state waveform of output voltage can be obtained quickly. Finally, a prototype with operating frequency of 21.44 MHz is built to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
40. P 3 FA: Unified Unicast/Multicast Forwarding Algorithm for High-Performance Router/Switch.
- Author
-
Jin, Zhu and Jia, Wen-Kang
- Subjects
- *
MULTICASTING (Computer networks) , *ALGORITHMS , *NUMBER systems , *SCALABILITY , *IP networks , *NURSES - Abstract
High-performance multicast packet switching technologies are evolving to meet the growing demand for scalability on the Internet and datacenters, etc. Implementing a high-performance switch/router relies on a polynomial-time group membership query algorithm within the Packet Forwarding Engines (PFEs) to determine whether a packet is forwarded through an egress. Among these, Bloom filter (BF)-based and Residue Number System (RNS)-based are being considered as two representatives of the membership query algorithms. However, both approaches suffer from some fatal weaknesses such as false-positive probability and time inefficiencies, especially for a carrier-grade PFE with high port-density features. According to similar properties of the RNS, we propose a simplified forwarding algorithm in this paper, named Per-Port Prime Filter Array (P3FA). The simulation results indicate that the P3FA can significantly improve space efficiencies under specific lower egress-diversities conditions. Under the same space constraints, P3FA improves multicast and unicast time efficiency by 1 to 4 orders of magnitude in the port-density 16–1024 range compared to previous works. Although it comes at the expense of hardware cost, it is still acceptable compared to recently improved previous work. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
41. Mitigating the Impacts of Uncertain Geomagnetic Disturbances on Electric Grids: A Distributionally Robust Optimization Approach.
- Author
-
Ryu, Minseok, Nagarajan, Harsha, and Bent, Russell
- Subjects
- *
ELECTRIC power distribution grids , *ROBUST optimization , *ELECTRICAL load , *SURFACE of the earth , *ELECTRIC lines , *STOCHASTIC programming - Abstract
Severe geomagnetic disturbances (GMDs) increase the magnitude of the electric field on the Earth’s surface (E-field) and drive geomagnetically-induced currents (GICs) along the transmission lines in electric grids. These additional currents can pose severe risks, such as current distortions, transformer saturation and increased reactive power losses, each of which can lead to system unreliability. Several mitigation actions (e.g., changing grid topology) exist that can reduce the harmful GIC effects on the grids. Making such decisions can be challenging, however, because the magnitude and direction of the E-field are uncertain and non-stationary. In this paper, we model uncertain E-fields using the distributionally robust optimization (DRO) approach that determines optimal transmission grid operations such that the worst-case expectation of the system cost is minimized. We also capture the effect of GICs on the nonlinear AC power flow equations. For solution approaches, we develop an accelerated column-and-constraint generation (CCG) algorithm by exploiting a special structure of the support set of uncertain parameters representing the E-field. Extensive numerical experiments based on “epri-21” and “uiuc-150” systems, designed for GMD studies, demonstrate (i) the computational performance of the accelerated CCG algorithm, (ii) the superior performance of distributionally robust grid operations that satisfy nonlinear, nonconvex AC power flow equations and GIC constraints, in comparison with standard stochastic programming-based methods during the out-of-sample testing. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
42. Vector Control-Based Energy Management System for Switched Reluctance Starter/Generators.
- Author
-
Apostolidou, Nena and Papanikolaou, Nick
- Subjects
- *
ENERGY management , *SWITCHED reluctance motors , *VECTOR control , *MATHEMATICAL analysis , *RELUCTANCE motors , *ENERGY storage - Abstract
This paper presents a novel active power control scheme for SRMs that are used as S/G units at MEAs; the proposed method uses a vector-controlled SAF, facilitating the acceleration of the SRM during starter mode and the efficient power control of the SRG at various operational points during generator mode. Moreover, an energy storage unit is incorporated in the SAF, aiming at enhancing the SRM's starting torque production and taking full advantage of the SRG's energy generation capability, through the appropriate phases’ magnetization regulation that is imposed by the developed adaptive SAF vector control. In addition, the proposed scheme provides enhanced FRTC during both modes of operation. The mathematical analysis is verified through MATLAB/Simulink simulations, while the performance of the S/G concept under study is evaluated via real-time CHIL tests, with the use of the dSPACE 1202 (MicroLabBox) platform and the 16-bit dsPIC30F4011 microcontroller. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
43. SOT-MRAM Digital PIM Architecture With Extended Parallelism in Matrix Multiplication.
- Author
-
Kim, Taehwan, Jang, Yunho, Kang, Min-Gu, Park, Byong-Guk, Lee, Kyung-Jin, and Park, Jongsun
- Subjects
- *
MATRIX multiplications , *ANALOG-to-digital converters , *DIGITAL-to-analog converters , *RANDOM access memory , *COMPUTER logic - Abstract
Emerging device-based digital processing-in-memory (PIM) architectures have been actively studied due to their energy and area efficiency derived from analog to digital converter (ADC)-less PIM hardware. However, digital PIM architectures generally need large extra memories to copy parameters, and they also suffer from low computation per memory-cycle efficiencies. In this paper, we present a novel spin-orbit torque magnetic random access memory (SOT-MRAM) based digital PIM architecture to alleviate the extra memory size burden and computation cycle issues. First, we propose the spintronics-assisted logic-in-memory (SLIM) cells to support efficient digital logic operations inside memories, where the voltage-controlled magnetic anisotropy (VCMA) is exploited to enhance the computation per memory-cycle efficiencies. In addition, crossed input source PIM (CRISP) architecture is proposed to extend the merits of SLIM cells by eliminating the extra memories for parameter copying while significantly improving the degree of parallel processing. An intra-memory pipelining scheme is also considered to further increase the throughput of CRISP. The proposed CRISP architecture has been implemented using 28 nm CMOS process, and it presents 1.10 TOPS/W and 0.95 TOPS/mm2, showing considerable improvements of energy efficiency and throughput per area, compared to the state-of-the-art digital PIM architecture. Finally, to evaluate the impact of computation errors induced from the SOT devices and circuits in CRISP architecture, classification accuracy simulations have been performed while applying computation errors. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
44. Cascaded Predictive Flux Control for a 3-L Active NPC Fed IM Drives Without Weighting Factor.
- Author
-
Xiao, Dan, Akter, Md. Parvez, Alam, Kazi, Dutta, Rukmi, Mekhilef, Saad, and Rahman, Muhammed Fazlur
- Subjects
- *
COST functions , *ALGORITHMS , *STATORS , *PREDICTION models , *VOLTAGE control - Abstract
Conventional model predictive control (MPC) for three-level active neutral point clamped converter (ANPC) utilizes weighting factors to achieve the optimal control of multiple control objectives in a single cost function. However, the selection of these weighting factors has an impact on the performance of the controlled objectives significantly. Tuning of weighting factors is usually tedious and lacks theoretical background. Moreover, the predictive and evaluation process for multiple objectives optimization have to be carried out by enumerating all admissible switching states within one loop. To simplify the complexity of this process and eliminate the effect of weighting factors, this paper proposes a cascaded predictive control scheme for a 3L-ANPC inverter fed induction machine (IM) drive. With the proposed approach, three separate cost functions for three control objectives, stator flux vector, neutral point voltage and device loss distribution are evaluated in a cascaded way, so that the optimization of these control objectives is performed independently. A 3L-ANPC inverter driven IM drive is studied in this paper to verify the effectiveness of the proposed algorithm. Experimental results in different operating conditions confirm that the proposed method achieves satisfactory steady-state and transient performances comparable to the conventional predictive control approach. The weighting factors used in the conventional method are eliminated and the computational effort is reduced by 68% compared to the conventional method without any sacrifice in the drive performance. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
45. Non-Isolated n -Stage High Step-up DC-DC Converter for Low Voltage DC Source Integration.
- Author
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Shanthi, T., Prabha, S. U., and Sundaramoorthy, Kumaravel
- Subjects
- *
DC-to-DC converters , *IDEAL sources (Electric circuits) , *VOLTAGE-frequency converters , *LOW voltage systems , *HIGH voltages , *SEMICONDUCTOR devices , *ELECTRIC current rectifiers - Abstract
The dc-dc converters with high step-up DC-voltage gain play a vital role in integrating low voltage DC sources. Though several converter topologies are reported in the recent past, attempts have been made to reduce the components, especially the switching devices, passive elements, converter losses, etc., of the converter. A novel DC-DC converter topology, viz., single switched impedance network (SSIN)-based converter with n-stage is proposed in this paper. The operation of the SSIN based converter in continuous and discontinuous conduction modes are discussed. The effect of parasitic elements on DC-voltage gain and efficiency of the SSIN is carried out. The small-signal model of the SSIN converter is derived. The performance of the SSIN converter is compared with the similar converter topologies. The 500 W prototypes of the SSIN with n = 1 and n = 2 are fabricated, and the experimental results are presented in this paper. To improve the converter performance, SiC-based semiconductor devices are used. The SSIN converter with two-stage has low switch loss at 500 W load, improved efficiency during high power and high output voltage operation, the switch stress of Vo/2, etc. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
46. BLDC Motor Drives: A Single Hall Sensor Method and a 160° Commutation Strategy.
- Author
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Al-Adsani, Ahmad S., AlSharidah, Michel E., and Beik, Omid
- Subjects
- *
REAL-time control , *BRUSHLESS direct current electric motors , *MOTOR drives (Electric motors) , *VECTOR spaces , *DETECTORS , *PERMANENT magnet motors , *IDEAL sources (Electric circuits) - Abstract
The application of Hall-based BLDC motors ranges from automotive accessory components such as oil and water pumps to high speed compressors. This paper proposes a new twelve-step unsymmetrical 160° commutation strategy using a single Hall-effect sensor method for brushless DC (BLDC) motor drives. The signal from the Hall-effect sensor is used to generate a number of pseudo Hall signals via a proposed speed-position estimator. The pseudo signals are then employed to control switching logic of a voltage source inverter (VSI). The effectiveness of the single Hall sensor method is examined on the unconventional 160° strategy, and on conventional 120°, 150° and 180° strategies with promising results. The paper presents a detailed comparison of the twelve-step unsymmetrical 160° commutation strategy with six-step voltage space vector that is used in conventional 120° and 180° strategies, and twelve-step symmetrical voltage space vector that is used in 150° strategy. Simulation results are validated via experimental measurements on a laboratory set-up using a real time dSPACE control environment, a representative BLDC motor prototype, a VSI and associated control components. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
47. Control of an Ultracapacitor-Based Energy Storage System for Source and Load Support Applications.
- Author
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P, Naresh and Kumar, V. Seshadri Sravan
- Subjects
- *
ENERGY storage , *PULSE width modulation , *MICROGRIDS , *ALGORITHMS , *SUPERCAPACITORS - Abstract
This paper presents a simple pulse width modulation algorithm for control of an ultracapacitor based energy storage system used for source and load support applications. As opposed to dual loop control philosophy that is widely used for backup applications, this paper presents a simple single loop current control that is only useful for controlling the ultracapacitor based DC/DC converters used in source and load support applications. The proposed PWM blocking method necessitates the DC/DC converter to operate in five states and takes into consideration the essential operational limits associated with the ultracapacitors. The performance of the proposed algorithm is verified experimentally using a 24 V laboratory prototype setup. Further, the shortcomings of dual loop control when applied to source and load support applications are demonstrated. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
48. C-AND: Mixed Writing Scheme for Disturb Reduction in 1T Ferroelectric FET Memory.
- Author
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Dahan, Mor M., Breyer, Evelyn T., Slesazeck, Stefan, Mikolajick, Thomas, and Kvatinsky, Shahar
- Subjects
- *
FIELD-effect transistors , *FERROELECTRICITY , *MEMORY - Abstract
Ferroelectric field effect transistor (FeFET) memory has shown the potential to meet the requirements of the growing need for fast, dense, low-power, and non-volatile memories. In this paper, we propose a memory architecture named crossed-AND (C-AND), in which each storage cell consists of a single ferroelectric transistor. The write operation is performed using different write schemes and different absolute voltages, to account for the asymmetric switching voltages of the FeFET. It enables writing an entire wordline in two consecutive cycles and prevents current and power through the channel of the transistor. During the read operation, the current and power are mostly sensed at a single selected device in each column. The read scheme additionally enables reading an entire word without read errors, even along long bitlines. Our Simulations demonstrate that, in comparison to the previously proposed AND architecture, the C-AND architecture diminishes read errors, reduces write disturbs, enables the usage of longer bitlines, and saves up to 2.92X in memory cell area. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
49. Observer-Based Event-Triggered Formation Control of Multi-Agent Systems With Switching Directed Topologies.
- Author
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Zhu, Guoliang, Liu, Kexin, Gu, Haibo, Luo, Weilin, and Lu, Jinhu
- Subjects
- *
MULTIAGENT systems , *TOPOLOGY , *LINEAR systems , *SWITCHING circuits - Abstract
This paper investigates the formation control problem for linear multi-agent systems under switching directed topologies. Based on absolute or relative outputs, we propose two distributed observer-based event-triggered control schemes. Both schemes can guarantee the boundedness of formation errors under sufficient conditions. The schemes can also avoid Zeno behaviors by giving an estimation for the lower bound of sampling intervals. Finally, simulations and experiments validate the proposed approaches. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
50. A 1.01 NEF Low-Noise Amplifier Using Complementary Parametric Amplification.
- Author
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Atzeni, Gabriele, Guichemerre, Jeremy, Novello, Alessandro, and Jang, Taekwang
- Subjects
- *
LOW noise amplifiers , *PREAMPLIFIERS , *LOGIC circuits - Abstract
This paper presents a discrete-time low-noise amplifier for miniaturized sensor nodes. Such amplifier achieves a noise efficiency factor of 1.01 and a power efficiency factor of 1.63, improving the noise efficiency of an analog front-end. The proposed preamplifier employs discrete-time parametric amplification by modulating the capacitance of a MOS varactor. The sampling noise is minimized by adopting a high oversampling ratio of the input voltage, leading to an input-referred noise of 520 nVrms in a 1 kHz bandwidth. Also, the power consumption is reduced by using a 34-phase stepwise charging technique. The multiphase soft-charging technique is implemented using multiple time-interleaved cells and allows to significantly reduce the current consumption without introducing any significant penalty in terms of additional noise or area occupation. A two-stage parametric amplifier is introduced to provide higher gain, and suppress the noise contribution of the following amplifier chain. The proposed two-stage complementary preamplifier is followed by a third continuous-time stage, that employs a current-reuse inverter-based architecture. The contribution to the total noise efficiency factor of such amplifier is attenuated by the gain of the previous two-stage parametric preamplifier. As a result, the third stage provides gain programmability, while degrading the NEF of the entire chain by less than 10%. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
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