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This paper proposes a soft-switched modulation technique with synchronous rectification for an isolated single-stage single-phase matrix-type dc–ac converter. The dc side consists of a full bridge inverter, and the ac side is a 2×2 matrix converter-based cycloconverter. The proposed unipolar modulation strategy provides zero current switching/zero voltage switching (ZVS) for the ac side devices and ZVS-on for the dc side devices. It also allows natural commutation of the current flowing through the secondary side leakage inductor of the isolation transformer and the grid inductor during unity power factor (UPF) condition, thus eliminates the requirement of snubber circuit. An improved soft-switched flyback-based regenerative snubber circuit is also presented for non-UPF operation. Proposed snubber circuit recycles the energy stored in the snubber capacitors in every switching cycle. A guideline to design snubber circuit along with a comparative study is discussed in this paper. Performance of the proposed hybrid modulation technique is evaluated in an SiC mosfet based 1.2-kW dc–ac converter prototype. A detailed analysis of the converter performance has been presented in this paper considering the circuit non-idealities. [ABSTRACT FROM AUTHOR]

This paper presents an isolated single-stage on-board electric vehicle charger without an intermediate DC-link. Based on an isolated current-source topology, the converter features soft-switching in semiconductors regardless of load variation for the full AC line voltage range. Moreover, it requires no external snubber or clamp circuits. The power factor correction and voltage regulation are provided by a relatively simple phase shift modulation, while the amount of circulating energy is kept at minimum. The charger is distinguished by its efficiency characteristic – the maximum is achieved in the constant power charging mode. The control method, component stresses, and design constraints of the topology are analyzed. The concept is verified using a 3 kW experimental SiC-based prototype, which reaches a peak efficiency of 96.4%. Moreover, the charger has demonstrated efficiencies above 95% with the THD of 4.1% when operating in constant power mode at the maximal power. [ABSTRACT FROM AUTHOR]

This paper proposes a capacitor voltage regulation method for the dual converter with a floating bridge for aerospace applications. This topology has previously been reported, but with a constrained voltage utilization factor due to the need for capacitor voltage regulations. In this paper, the effect of switching states on the voltage variation of capacitor is quantitatively modeled and an enhanced space vector modulation scheme with current feedback is proposed to achieve an active control of the floating capacitor voltages. This proposed method also allows further exploitation and utilization of converter voltage. The relationship between the allowed modulation index of dual converter and load power factor is obtained and expressed using a fitted polynomial equation. The advantages of the proposed method include boosted voltage utilization and superior performance in term of capacitor voltage balance. These advantages have been proven through simulation and experimental results on RL loads as well as with an open-end winding induction motor. The proposed modulation scheme can boost the converter voltage utilization by at least 10% while achieving full four-level operation. More importantly, the higher available voltage allows extending the constant torque region of the motor, the further beginning of field weakening operation could be postponed. [ABSTRACT FROM AUTHOR]

This paper presents two capacitor voltage balancing (CVB) strategies for modular multilevel converter (MMC) applications. Both balancing schemes are based on model predictive control and are designed to efficiently solve a constrained optimal control problem, where the predicted capacitor voltage errors are included in the cost function with the demanded output voltage of a cluster being forced through an equality constraint. The first method proposed in this paper computes specific modulation indexes for each module using the explicit solution of a relaxed version of the original optimization problem. The second approach proposed in this paper reduces the complexity of the original problem by linearizing the objective function and using an optimal sorting network based on a greedy algorithm to solve this approximation. Considering the structures of both solution approaches, they are integrated into modulation schemes based on phase-shifted and level-shifted pulsewidth modulation algorithms, respectively. Experimental results obtained from a nine-cell single-phase MMC prototype demonstrate the good performance achieved with the proposed methodologies, as well as the implementation simplicity offered by the proposed CVB algorithms. [ABSTRACT FROM AUTHOR]

Enhancement of dc bus voltage utilization for a five-level inverter with single dc source and capacitor-fed H-bridge (CHB) units is investigated in this paper. A carrier-based modulation technique is used for boosting the dc bus utilization, which is established by providing detailed mathematical analysis. The five-level inverter used here is realized by cascading a CHB unit to each phase of a three-level neutral point clamped inverter. The increase in dc bus voltage utilization owes to the pole voltage redundancies offered by CHB units. The floating capacitors of H-bridge units are balanced within a quarter fundamental cycle using the switching state redundancies of pole voltage levels. The aforementioned modulation technique allows the inverter to enhance the dc bus utilization from 0.577 $\text{V}_{\text{dc}}$ to 0.63 $\text{V}_{\text{dc}}$ under unity power factor. This enhancement is obtained in the linear modulation range without increasing the dc bus voltage, and thus, the inverter can operate without the presence of low-order harmonics in its phase voltages. The strength of this paper lies in its detailed mathematical analysis for finding out the limiting modulation index and power factor condition in the light of floating capacitor voltage balancing issue. Simulation as well as experimental verification of the modulation scheme is carried out on an induction motor drive under various operating conditions. It is shown that this carrier-based modulation technique is suitable for any single source inverter topology with one CHB unit per phase. [ABSTRACT FROM AUTHOR]

This paper presents a novel single-stage soft-switched high-frequency-link three-phase dc–ac converter topology. The topology supports unidirectional dc to ac power flow and is targeted for applications like grid integration of photovoltaic sources, fuel cell, etc. The high frequency magnetic isolation results in reduction of system volume, weight, and cost. Sine-wave pulsewidth modulation is implemented in dc-side converter. Though high-frequency switched, dc-side converter is soft switched for most part of the line cycle. The ac-side converter active switches are line frequency switched incurring negligible switching loss. The line frequency switching of ac-side converter facilitates use of high voltage blocking inherently slow semiconductor devices to generate high voltage ac output. In addition, a cascaded multilevel structure is presented in this paper for direct medium-voltage ac grid integration. A detailed circuit analysis considering nonidealities like transformer leakage and switch capacitances, is presented in this paper. A 6-kW three-phase laboratory prototype is built. The presented simulation and experimental results verify the operation of the proposed topologies. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

This paper proposes a current-fed single-phase inverter without constant intermediate DC link. It eliminates electrolytic capacitor from the DC-link and introduces an intermediate pulsating DC bus. The proposed topology is modular with three full-bridges making it scalable for high-power applications. New pulsating-DC-modulation for back-end pulsating DC-link inverter and secondary modulation (SM) for front-end DC-to-pulsating DC converter is proposed. Soft-switching and device voltage clamping of both primary side and secondary side devices of front-end current-fed full-bridge converter is realized. A rotating partial hybrid pulsewidth modulation has been introduced. One leg of inverter is commutated at a low switching frequency, while the other leg is operated at a high switching frequency for partial period of a line frequency cycle. Thus, switching losses of the back-end inverter are considerably reduced. Rotating mechanism is used to equalize the switching losses of four switches of the inverter. This paper presents detailed operation and analysis of the topology with a proposed modulation scheme. Simulation and experimental results validate the effectiveness and accuracy of the proposed modulation scheme as well as soft-switching and performance of the converter. [ABSTRACT FROM PUBLISHER]

This paper presents the effect of stray capacitances in bipolar (negative and/or positive) pulses generated by the two different topologies of the solid-state Marx modulators. According to the analysis, the stray capacitances influence the energy transfer from the Marx modulator capacitors to the load affecting the bipolar (negative and/or positive) pulse rise time. This paper deals with the structure design to reduce the influence of the stray capacitance and to improve the pulse rise time of these bipolar solid-state Marx modulators. A four-stage laboratory prototype of the two topologies has been assembled using 1200-V insulated gate bipolar transistors and diodes, operating with 1000-V dc input voltage and 1-kHz frequency, producing 4-kV bipolar pulses, with 5- \mu \texts pulse duration and 120-ns rise time, into a resistive load. [ABSTRACT FROM PUBLISHER]

Finite state model predictive control (MPC) has been recently applied to several converter topologies, as it can provide many advantages over other MPC techniques. The advantages of MPC include fast dynamics, multitarget control capability, and relatively easy implementation on digital control platforms. However, its inherent variable switching frequency and lower steady-state waveform quality with respect to standard control, which includes an appropriate modulation technique, represent a limitation to its applicability. Modulated model predictive control (M2 PC) combines all the advantages of MPC with the fixed switching frequency characteristic of pulse-width modulation algorithms. The work presented in this paper focuses on the indirect matrix converter (IMC), where the tight coupling between rectifier stage and inverter stage has to be taken into account in the M2PC design. This paper proposes an M2PC solution, suitable for IMC, with a switching pattern that emulates the desired waveform quality features of space vector modulation for matrix converters. The switching sequences of the rectifier stage and inverter stage are rearranged in order to always achieve zero-current switching on the rectifier stage, thus simplifying the current commutation strategy. [ABSTRACT FROM AUTHOR]

The conventional three-level inverter only has voltage buck capability. The quasi-Z-source three-level T-type inverter (QZS 3LT $^2$ I) has been proposed to realize voltage buck–boost operation. In this paper, we further propose a novel modulation scheme for the QZS 3LT $^2$ I to realize voltage boosting, reduce the common-mode voltage (CMV), and control the neutral-point voltage balance simultaneously. The proposed scheme adopts a large vector, a medium vector, a small vector with low CMV magnitude, a zero vector, and a shoot-through vector to generate the output voltage. According to sector number and neutral-point voltage difference, a p-type or n-type small vector with low CMV magnitude is properly selected to balance the neutral-point voltage. Shoot-through states are inserted within zero vector to boost the dc input voltage without affecting the ac output voltage. Dwell times of basic vectors are calculated through the revised volt–second balance equation. Furthermore, a coordinate control strategy between neutral-point voltage balance and voltage boosting is proposed. Doing so, the CMV magnitude can be restricted within one-sixth of dc-link voltage and neutral-point voltage imbalance can be effectively mitigated. The effectiveness of the proposed scheme is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a new four-quadrant (4Q) boost-type converter with the use of active virtual ground (AVG) technology. The presented topology can step up the ac grid voltage to a regulated dc voltage under a stable bidirectional current flow and support the power transmission in either real power or reactive power delivery. With the use of the proposed modulation method, only two high-frequency switches are required through the 4Q operation. Under a full-bridge converter structure, an efficient system can be guaranteed. Also, benefiting from the AVG technology, an LCL filter is formed at the system input over the 4Q operation. Both magnitude of leakage current and grid current ripple are also minimized to a small value. Thus, a high-efficiency and low-noise 4Q converter is guaranteed. The presented topology is successfully implemented on a 750 VA prototype and the performance is experimentally verified on it, which shows good agreement with the theoretical knowledge. [ABSTRACT FROM AUTHOR]

The three-phase buck rectifier (3ph-BR) is suitable for applications where a voltage step-down function is required. In this paper, an improved 3ph-BR topology is proposed to reduce the voltage stress on the transistors. The freewheeling diode in the conventional topology is split into two diodes in series and the input neutral point is connected to the common point of the two diodes. With the proposed topology and the corresponding modified modulation scheme, the transistors only need to withstand the input phase voltage instead of the line-to-line voltage, bringing about the significant reduction of voltage stress. The proposed topology enables a more cost-efficient and flexible selection of the transistors. Experimental results have verified the validity of the modified topology and associated modulation scheme. [ABSTRACT FROM AUTHOR]

The three-level full-bridge (TLFB) dc−dc converter has been widely used in high-voltage, high-power applications. In the experimental test, the neutral-point voltage deviation appears; moreover, it has also been found out that if the flying capacitors are introduced, the input capacitor voltages could realize self-balance even if no active balancing solutions are adopted. In the previous publications, the role of flying capacitors is generally considered to extend the range of soft switching; however, the self-balance ability has not been mentioned or investigated in any publications thus far. In order to fill this gap, this paper provides the detailed mode operation analysis of the TLFB converter and reveals the cause of the imbalance. In addition, the mechanism of the self-balance ability provided by the flying capacitors is explained in detail, which gives a deep insight into the converter. At last, the influence factor of the voltage error in steady state has been analyzed, and the specific expression of the voltage error is also derived. The feasibility of the theoretical analysis is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new inverter topology based on the active neutral-point-clamped (ANPC) converter with capability to integrate one energy storage system (ESS) per inverter leg with an independent state of charge control, so that each inverter leg has two dc ports and one ac port. The primary dc port is common to all inverter legs and it is connected to the main power source. The secondary dc port is suitable for ESS connection because of its two-quadrant operation, with bidirectional current capability, so that the ESS can be charged and discharged with regulated current. Integration of a secondary dc port with independent control also allows the use of different ESS technologies for each inverter leg to compose a hybrid ESS. Redundant switching states of the proposed structure are used to balance the energy exchanged between the secondary dc port and the dc bus capacitors. Theoretical propositions were experimentally validated through a 1-kW single-phase inverter with a secondary dc port connected to a 230-V ESS and ac port connected to an LC filter feeding a linear load. Low total harmonic distortion (THD) sinusoidal current is generated at the ac port while charging or discharging the ESS with a constant current. [ABSTRACT FROM AUTHOR]

This paper presents the topology and modulation technique of a three-phase three-level modified Z-source neutral-point-clamped (MZS-NPC) inverter, which combines a modified Z-source impedance network and a three-phase three-level NPC inverter. The boost factor of the proposed MZS-NPC inverter is twice as high as the three existing representative topologies combing an impedance network with a three-level NPC inverter. A modulation scheme for the proposed topology, based on a maximum boost control method, is designed to achieve the maximum voltage gain with simple implementation and to balance the dc-link neutral-point voltage. A closed-loop control of the ac load voltage in the fuel-cell or photovoltaic applications based on the proposed inverter is realized, in order to supply a desired voltage to the critical load in islanding mode of a microgrid. The boosting ability and operation validity of the proposed topology and modulation technique are demonstrated with simulation and experimental results. [ABSTRACT FROM AUTHOR]

A pulsewidth-modulation bidirectional ac–dc converter (i.e., active rectifier) with dc-fault-blocking and self-pre-charge capabilities is proposed in this paper for low voltage dc (LVdc) applications. The proposed converter, which is named as “H5 + converter,” consists of an H4 bridge, a bidirectional switch, and a transient-voltage-surge (TVS) diode. The bidirectional switch and the TVS diode enable the dc fault blocking and dc bus self-pre-charge, while preserving the low common-mode voltage noise and low leakage current of the converter. Additionally, the proposed H5+ converter has advanced features under a dc-side short-circuit fault, such as fault diagnosis and fault recovery. Operation principles of the proposed converter are presented and analyzed. A down-scaled prototype is built. Experiment results are shown and analyzed, including steady-state waveforms, common-mode performance, start-up dynamics, as well as dc fault blocking, fault diagnosis, and fault recovery. Moreover, the proposed converter is compared with other two dc-fault-blocking converters for LVdc applications, in terms of converter capabilities, required devices, and power switch losses. [ABSTRACT FROM AUTHOR]

This paper addresses the design of a solid-state bipolar pulsed-power modulator based on a series of stacked power cells that realize a simple and robust structure. Each cell is charged in parallel by an LCC resonant converter independently of the discharging loop. A passive cell-balancing design is implemented. The power cell using insulated gate bipolar transistors (IGBTs) can operate in bypass mode without an additional component, and the circuit operation was analyzed. A simple gate driving method, which provides synchronized gate signals without an extra power source of each gate driver using two control loops and isolation transformers, is implemented for the proposed bipolar pulsed-power modulator based on stacked cells. Moreover, an unexpected gate turn-on problem was solved by an additional off signal. To validate the proposed structure and the gate driving scheme, a three-cell, 1.2-kV, 110-A, 1.5- to 4- $\mu \text{s}$ , 3-kHz laboratory experimental prototype test was conducted. The results proved the reliability of the proposed solid-state bipolar pulsed-power modulator. [ABSTRACT FROM AUTHOR]

This paper presents an approach for dealing with the control of five-level, diode-clamped rectifiers. The control of such converters is challenging, as voltage balancing among capacitors is not a trivial task. Some of the existing approaches that cope with this problem use specific modifications of one of the traditional modulation techniques, such as using redundant vectors in space vector modulation (SVM). The main feature of the proposed technique is that part of the modulation is considered in the system equations and, in this way, the voltage balance can be solved designing a specific controller for this problem. As a result, several levels are used within a switching period. Furthermore, it is shown that the proposed approach hardly affects the control of active and reactive powers and total dc-link voltage in such a way that the well-known direct power control can be applied. As a consequence, the resultant modulation stage is simpler than other techniques based on, e.g., SVM. The effectiveness and good performance of the system under the proposed control approach are validated by both simulation and experimental results. [ABSTRACT FROM AUTHOR]

The three-level Vienna rectifier is an attractive topology for power factor correction applications. However, for practical high-frequency applications, the nonlinearity caused by snubber circuit and parasitic capacitance of Vienna rectifier's switching device will distort input current. This paper proposes a carrier-based discontinuous space-vector modulation (CB-DSVM) method with varying clamped area for Vienna rectifier in high switching frequency applications. The equivalent circuit of Vienna rectifier considering the nonlinear factors is built and the effect of pulse shaping around current zero-crossing point is investigated. The voltage errors caused by the nonlinearity of switching device will distort terminal voltage, which mainly appears at the zero-crossing time. A DSVM method with the fixed clamped area around the zero-crossing point is proposed to reduce the voltage errors and then the simplified CB-DSVM method with varying clamped area by adding a clamped factor to the judging conditions is further studied, which will reduce low-order harmonics of the CB-DSVM method. Simulations and experiments are carried out in a 600 W Vienna rectifier platform, which demonstrates the validity of the proposed method. Compared with the CB-SVM method, the proposed CB-DSVM method with varying clamped area has comparative neutral-point voltage balancing ability and better input current quality. [ABSTRACT FROM AUTHOR]

A novel single-stage high-frequency link three-phase ($3\phi$) inverter along with a modulation strategy is presented in this paper. The topology is targeted for grid integration of utility scale renewable and alternative energy sources like solar, fuel cell, and wind, where the power flow is unidirectional (from dc to ac). The primary side converter has a $3\phi$ voltage source inverter (VSI) structure along with an additional half-bridge leg. Sinusoidal pulsewidth modulation is implemented in the primary side converter. The three legs of the primary side VSI are zero voltage switched (ZVS) for most part of the line cycle. The additional half bridge leg is ZVS over the complete line cycle. The active switches in secondary side converter are line frequency switched and thus results in negligible switching loss. The converter switching process is described in detail to show the soft-switching of the primary side converter using the device capacitances and leakage inductances of the high-frequency transformers (HFTs). The HFT galvanic isolation results in high power density. A 4-kW laboratory scale hardware prototype is built and tested with the proposed modulation strategy. The experimental results are presented to verify the converter operation. [ABSTRACT FROM AUTHOR]

Modules with series and parallel connectivity add new features and operation modes to modular multilevel converters (MMCs). Compared to full- and half-bridges, the series/parallel modules allow sensorless module balancing and reduce conduction loss with the same semiconductor area. However, in high-voltage applications with limited switching rates, the sensorless operation of the series/parallel modules suffers from large charge-balancing currents. This paper introduces a series/parallel module variant with a small port inductor. The port inductor suppresses the charge-balancing current despite low switching rates. We also propose a carrier-based modulation framework and show the importance of the carrier assignment in terms of efficiency and balancing. The proposed module and the modulation method are verified on a lab setup with module switching rates down to 200 Hz. The module voltages are kept within a narrow band with the charge-balancing currents below 5% of the arm current. The experimental results show practicality and advantages of the new series/parallel modules in high-voltage MMC applications. [ABSTRACT FROM AUTHOR]

In this paper, a highly efficient isolated resonant converter with a novel modulation method is proposed for delivering power from photovoltaic (PV) modules to the dc microgrid. The proposed modulation method allows the converter to boost low input voltages and regulate a wide input voltage range. The converter design is based on a series resonant converter (SRC) that operates at the resonant frequency to achieve highest efficiency under nominal input voltage condition. Under shadowed or low irradiance conditions of PV panels, the converter will operate with the proposed “double-pulse duty cycle” modulation method to step up the voltage for the dc microgrid connection. With the proposed modulation method, the output switches serve for both synchronous rectification and voltage boost function. This method enables a higher voltage boost ratio than the SRC without adding additional switches while operating at the resonant frequency. A 300-W hardware prototype with gallium-nitride devices is built to verify the performance of the proposed converter and modulation method. The converter achieved a peak efficiency of 98.9% and a California Energy Commission weighted efficiency of 98.7% under nominal input voltage condition. [ABSTRACT FROM AUTHOR]

The hybrid modular multilevel converter with cascaded full bridges (HMMC-CFB) is a recently proposed dc fault tolerant converter topology for high-power applications. It has a director part (DP) consisting of a series of connected half-bridge submodules, and a wave-shaping part (WSP) composed of a series of connected full-bridge submodules (FBSMs). The submodules in DP avoid high voltage stresses and improve synchronization between DP and WSP by slowing down the change rate of DP output voltage. This slowdown is achieved by using a trapezoidal reference signal for DP. The WSP attenuates the voltage harmonics produced by DP. However, the energy exchanged by WSP changes with modulation index, which may cause improper voltage regulation of the submodule capacitors. This paper proposes a new control technique to regulate the energy exchanged by WSP, which uses a variable slope trapezoidal reference signal of DP. To obtain this slope, the feedforward and feedback controllers are used. The feedforward controller gives the value of slope depending on the modulation index (mv) to keep the energy exchanged by WSP nearly equal to zero, whereas the losses and nonideality of the converter are taken care of by the feedback controller. This technique guarantees proper voltage regulation of the submodule capacitors for all modulation indices. The efficacy of the proposed technique is confirmed using simulations and experimentations. This paper also presents a circulating current suppressing controller for HMMC-CFB. The proposed control schemes and dc fault tolerant capability of HMMC-CFB are tested on a grid-connected model built in PSCAD. [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

Increasing demands for power supplies have contributed to the population of high-frequency ac (HFAC) power distribution system (PDS), and in order to increase the power capacity, multilevel inverters (MLIs) frequently serving as the high-frequency (HF) source-stage have obtained a prominent development. Existing MLIs commonly use more than one voltage source or a great number of power devices to enlarge the level numbers, and HF modulation (HFM) methods are usually adopted to decrease the total harmonic distortion (THD). All of these have increased the complexity and decreased the efficiency for the conversion from dc to HF ac. In this paper, a nine-level inverter employing only one input source and fewer components is proposed for HFAC PDS. It makes full use of the conversion of series and parallel connections of one voltage source and two capacitors to realize nine output levels, thus lower THD can be obtained without HFM methods. The voltage stress on power devices is relatively relieved, which has broadened its range of applications as well. Moreover, the proposed nine-level inverter is equipped with the inherent self-voltage balancing ability, thus the modulation algorithm gets simplified. The circuit structure, modulation method, capacitor calculation, loss analysis, and performance comparisons are presented in this paper, and all the superior performances of the proposed nine-level inverter are verified by simulation and experimental prototypes with rated output power of 200 W. The accordance of theoretical analysis, simulation, and experimental results confirms the feasibility of proposed nine-level inverter. [ABSTRACT FROM AUTHOR]

The matrix converter (MC) is a direct ac–ac power converter without an intermediate dc link. It has several attractive features, such as high power density, four-quadrant operation, and bidirectional power flow. However, the application of MCs in high-voltage and high-power systems is still limited by the device voltage levels. It is well known that the multilevel power converter technology can be a solution to enhance the voltage rating and improve harmonic performance in many applications. Therefore, an application of a multilevel topology based on a direct ac–ac power converter is proposed in this paper. This paper first introduce the topology structure, the switching pattern grouping method, and the proposed output voltage modulation method for a five-level capacitor clamped multilevel matrix converter (5LMC). Amplitude coefficient adjustment is also introduced as a part of modulation procedure to simplify the duty cycles calculation. Simulation from MATLAB/Simulink is given to demonstrate the theoretical work. Experimental results from a five-level matrix converter prototype are presented to validate the theoretical findings. [ABSTRACT FROM AUTHOR]

This paper proposes a multilevel high-frequency-link dc transformer (MDCT) based on dual active phase-shift principle for medium-voltage dc (MVDC) power distribution application. The proposed MDCT employs multilevel and multiplex conversion principle, which brings many advantages and makes the operation of MDCT quite different with the traditional dc transformer (TDCT) and modular multilevel converter. Compared to the TDCT scheme, the proposed MDCT has smaller circulating current and higher power factor; it can operate as a dc breaker to cutoff the connection with the MVDC distribution grid absolutely when a short fault occurs in the distribution grid; the redundant design can be achieved when some submodules failure to improve the reliability. In the paper, the topology, operation principle, modulation method, switching characterization, voltage, and power characterization, and control strategy of MDCT are presented and analyzed comprehensively. At last, a MDCT prototype is built and the experimental results verify the correctness and effectively of the proposed solution. [ABSTRACT FROM PUBLISHER]

This paper presents a method for generating a multilevel dodecagonal voltage space vector structure using a single dc source for induction motor drives. Multilevel dodecagonal structure combines the advantages of both multilevel and dodecagonal structures, and hence, generates low dv/dt phase voltage along with the elimination of fifth- and seventh-order harmonics over the entire modulation range. This eliminates low-order harmonic currents and prevents the generation of sixth-order torque ripple in the motor. The topology used requires only one dc source making four-quadrant operation of the drive system simpler compared to previously proposed multilevel topologies generating dodecagonal space vector structures. The topology used consists of a three-level flying capacitor (FC) inverter cascaded with a capacitor fed H-bridge. The FC inverter operates at a lower switching frequency and the low-order harmonics are eliminated by the switching action of the cascaded H-bridge inverter. The capacitors in the cascaded H-bridge modules are maintained at a substantially smaller voltage compared to the dc-link voltage and are inherently balanced during the pulsewidth modulation operation. This results in low switching loss, in the FC inverter as well as in the cascaded H-bridge inverter. Experimental results are included to validate the operation of the topology and modulation scheme presented in this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a new fault-tolerant strategy for a multilevel converter with an integrated impedance-source network. The proposed fault-tolerant strategy leverages the flexibility provided by the impedance-source network to implement the fundamental phase-shift compensation (FPSC) method in order to restore operation of a multilevel converter with one or more faulty switches to the prefault conditions. In case of a fault occurrence, the proposed fault-tolerant strategy makes the most use of the remaining converter capacity and generates balanced line-to-line voltages, while evenly distributing an inevitable voltage stress increase, over all converter switches. In this paper, first, a brief background about an impedance-source based cascaded H-bridge converter and a suitable modulation method for it is provided. Then, the FPSC method is explained and the proposed fault-tolerant strategy based on this method is introduced. Finally, several experimental results from a prototype converter are provided to validate the operation of the proposed strategy. [ABSTRACT FROM PUBLISHER]

This paper proposes a new topological configuration for a unified power quality conditioner (UPQC). Generally, the power structure of the three-phase three-wire UPQC consists of two back-to-back connected six-switch inverters. For this configuration, out of 12 switches, six of the series inverter switches will be underutilized most of the time. To improve the semiconductor utilization and consequently to reduce the total switch count, this paper proposes a new reduced switch topology for the UPQC. The proposed topology is realized using only ten switches and retains all the performance merits of the 12-switch UPQC while minimizing its underutilization without increasing the switch VA rating. The paper provides a detailed analytical study and evaluation by comparing the proposed topology with the twelve- and nine-switch-based UPQC system configurations. The feasibility of the proposed topology is validated through experimental investigation. [ABSTRACT FROM AUTHOR]

This paper proposes a new fault-tolerant strategy for the purpose of revamping the performance of three-phase multilevel (ML) converters with faulty switches. The proposed fault-tolerant strategy is based on an adaptation of the modified space vector modulation (SVM) technique to the fundamental phase-shift compensation method. The proposed fault-tolerant strategy generates balanced line-to-line voltages with increased voltage levels in the faulty condition. In this paper, first a brief background about cascaded H-bridge (CHB) ML converters and SVM technique is provided. Then the proposed fault-tolerant strategy and the modified SVM technique are presented. Finally, several experimental results are provided to validate operation of the proposed strategy. [ABSTRACT FROM AUTHOR]

Paralleled inverters have the merits of high power rating, improved reliability, and convenient maintenance. However, zero-sequence circulating current (ZSCC) will occur and lead to current distortion and system loss. The ZSCC control is more complicated when three-level topology is utilized and paralleled number is increased. Therefore, this paper proposes a simplified ZSCC suppression scheme for multi-paralleled three-level T-type inverters (3LT2Is). A novel equivalent model is developed and the ZSCC controller based on the new model is easier to implement. Thus, the number of paralleled inverters can be increased without complicating the control scheme and the inverters could be switched on or off optionally. Besides, Feed-Forward (FF) strategy is adopted to eliminate the ZSCC spikes caused by symmetrical three-level space vector modulation. The effectiveness of the proposed control scheme is verified by both simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper explores the issue of the neutral-point oscillation in the four-leg neutral-point clamped inverter. Such an issue is closely associated with the neutral-point current, so this study models the inverter on the dc side to clarify its relationship and presents a three-dimension pulsewidth modulation to eliminate the neutral-point oscillation. In addition, an offset-injection approach to reducing the neutral-point oscillation is also investigated and discussed. The laboratory test results will validate the analysis of the proposed approach, and a discussion will be presented to evaluate the effectiveness of eliminating the neutral-point oscillation. [ABSTRACT FROM AUTHOR]

This paper presents an improved H8 power converter for common-mode voltage (CMV) reduction and electromagnetic interference suppression. The proposed H8 converter can realize zero CMV variation when entering and leaving the zero state, which is mainly achieved by both the improvement of the structure and the control strategy. For the system structure, two switches are added on the dc bus to float the ac part of the three-phase converter in the zero state. Besides, additional capacitors are used to realize controllable CMV. For the control strategy, a simple control strategy is proposed for the H8 converter. It can automatically adapt to the flowing orientation of the load current to realize synchronous switching of the power switches, which effectively eliminates the impact of the dead time. Through analysis, simulations, and experiment, a comparison between the proposed H8 converter and the conventional H6 converter is performed. Results validate the effectiveness of the H8 topology. [ABSTRACT FROM AUTHOR]

In this paper, a new zero-sequence current suppression control strategy for the five-phase open-winding fault-tolerant fractional-slot concentrated-winding interior-permanent-magnet (FTFSCW-IPM) motor drive system with a common dc bus is proposed. By unequal distribution of the zero voltage vector, the proposed method can well suppress the zero-sequence current caused by the dead-time effect that the conventional eliminating method cannot be achieved. First, the dead-time effect to the zero-sequence current is discussed. Then the zero-axis controller is designed to obtain the reference common-mode voltage. Last, according to the principle of the unequal zero voltage vector distribution, the switching sequence of the two inverters can be calculated, and the maximum modulation index is also first deduced in detail. The proposed method is proved by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Three three-phase unidirectional open-end topologies with reduced active switch count are investigated in this paper. These configurations arise from the replacement of controlled switches by diodes, in order to reduce the system complexity. Furthermore, the costs are also reduced once less driver circuitry is needed. The proposed topologies make the ac–dc conversion of the power delivered by a permanent magnet synchronous machine operating at unity power factor. Each configuration is made out of two converters in which at least one is derived from the substitution of active switches in two-level legs or three-level neutral-point clamped legs. The proposed configurations have less switches, making it possible to obtain the same number of voltage levels (in relation with the conventional configurations) with half or quarter of the number of active switches. Also, the topologies are compared in terms of semiconductor power losses and harmonic distortion. The control strategy of the systems as well as a detailed model, simulation, and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper presents a modular multilevel series/parallel converter (MMSPC) with intermodule switched-inductor power transfer. The switched-inductor voltage conversion feature allows controllable and efficient transfer of energy between modules with nonnegligible voltage difference, providing both step-down and step-up functionalities. Thus, this converter can accurately control and rapidly adjust the voltage of each module to generate an ac output voltage waveform with a controllable number of levels, increasing the quality of the output. Moreover, the intrinsic dc–dc conversion feature can generate a dc controllable output voltage and enable new applications. In this text, we specifically demonstrate how the flexibility of obtaining both ac and dc output with the same setup renders the topology promising for battery energy storage systems and dc microgrid applications. Experimental results validate the topology and concept of an MMSPC with intrinsic switched-inductor conversion. [ABSTRACT FROM AUTHOR]

This paper presents new space vector pulsewidth modulation (PWM) strategies for a single-phase three-level buck-boost neutral point clamped inverter coupled with impedance-source (IS) network. These strategies can be implemented for systems with any IS network with neutral point. The case study system is based on the quasi-Z-source inverter with continuous input current. To demonstrate an improved performance, the strategies are compared with a traditional PWM strategy. The advantages lie in reduced switching number, without output voltage quality distortion. The simulation and experimental results confirm the theoretical predictions. [ABSTRACT FROM AUTHOR]

This paper proposes a novel unified expandable low switch power electronic converter architecture for grid integration of direct drive variable speed wind turbine (VSWT) system using permanent magnet synchronous generator (PMSG). The proposed unified expandable power converter can interface two or more bidirectional output ports, such as wind generators, energy storages, and grid. The size of the power converter is compact because of fewer number of power electronic switches and protection devices, and its architecture is easily expandable to accommodate more outputs, i.e., in this case, the wind turbines. A generalized sequential space-vector modulation technique is developed based on the operational principle of the proposed converter to control the outputs autonomously in order to track the maximum power point for individual VSWTs-driven PMSGs. It is expected that the proposed approach will reduce the cost of power electronic converters in a wind farm, compared to both ac- and dc-link-based topologies, which are available for the moment. [ABSTRACT FROM AUTHOR]

Multileg Class-D amplifiers (CDAs) with phase-shifted carrier modulation can increase the equivalent switching frequency and reduce the output current ripples, which further reduces the size of the output filter. However, these benefits are degraded by the tolerances in the phase inductance values. The phase inductance mismatches impact the ripple cancelation effects (the harmonic contents at switching frequency and its harmonics appearing in the output current ripple). Therefore, the quality of the output waveform can further be impacted. Current research works dealing with this issue mainly focused on the interleaved dc–dc converters, which does not cover the analysis in multileg CDAs or inverters, especially for the full-bridge configuration. This paper proposes a general analytical method to characterize the steady-state phase and the total current ripple in the multileg CDAs with full-bridge configuration under inductance mismatches. Monte Carlo simulation is used to study the impact of inductance mismatches on the harmonic contents of the total current ripple, and the distribution law of the inductances at the worst case is revealed. The analytical method is verified by simulation and experimental results of a four-leg full-bridge CDA. A design guideline is given to optimize the filter design based on the analytical method. [ABSTRACT FROM AUTHOR]

An isolated single sourced multi-output dc/dc converter with a high-frequency link was proposed before to feed different cells of the Asymmetrical Cascaded H-bridge (ACHB) inverter. One of the fundamental advantages of the ACHB is that the main H-bridge is commutated with fundamental frequency, passing the majority of the inverter power. However, the isolated dc/dc converter needs to be connected to the main voltage source with high-voltage/high-frequency switches, which limits the power capability and the efficiency of the converter. In this paper, a switching pattern based on nearest level modulation method is proposed to command all the power to be transferred through the main H-bridge. Therefore, the power circulates between the auxiliary H-bridges with no need for high-voltage switches. As a result, a single-input single-output auxiliary converter is needed with only 5% of the power rating. This solution reduces cost and size while it improves the efficiency of the converter. Furthermore, the architecture makes the inverter more suitable for high power and high-voltage applications. The inverter switching strategy is based on programmable firing angles. The main dc-link of the grid connected inverter is controlled to achieve maximum power point tracking, while the dc/dc isolated converter is controlled to regulate the auxiliary dc-links. The proposed topology is verified by simulation and experimental results using a 1.5 kW hardware prototype. [ABSTRACT FROM AUTHOR]

Conventional two-level as well as multilevel voltage-source-inverter topologies with a hexagonal voltage-space vector structure generate low-order harmonics in the machine terminal voltages when operated beyond the linear modulation range in variable speed drive application. Progressing from hexagonal to a higher sided polygonal voltage-space-vector structure (VSVS) suppresses significant low-order harmonics throughout the modulation range. In addition, the linear modulation range will also be enhanced very near to the base speed. In this paper, for the first time, the generation of a multilevel 24-sided VSVS using a single dc source for induction-motor drives is proposed. A cascaded topology with a dc-source-fed flying-capacitor inverter and two low-voltage capacitor-fed H-bridge cells forms the power circuit. The features and advantages of the proposed scheme are validated through experimental results and discussions. [ABSTRACT FROM AUTHOR]

Nonisolated dc/dc converters are widely used in practice because of their low losses and high power density. To accommodate some high-power scenarios and modular applications, these nonisolated converters are usually connected in the input-parallel output-parallel (IPOP) structure. Because there is no galvanic isolation, the ac side and dc side are coupled together, which causes complicated circulating currents in the system. The great circulating currents will endanger the stable and reliable operation of the IPOP nonisolated dc/dc converters system. Focusing on this problem, this paper proposes a novel decentralized circulating currents suppression strategy for IPOP nonisolated dc/dc converters based on the modified topologies, which can still hold the main advantages of nonisolated solutions. First, the complicated circulating currents among the IPOP nonisolated dc/dc converters are analyzed in detail. It is found that various circulating currents exist in the system including the circulating currents within the single converter and the circulating currents among the multiple converters. Then, the limitations of the conventional dc/dc converter topologies are presented and it is proved that these topologies cannot eliminate all the circulating currents. Second, being inspired by the drawbacks of the conventional topologies, the modified topologies with two degrees of freedom modulation are designed. Based on the modified topologies, a corresponding suppression method consisting of two degrees of freedom control is proposed, which can eliminate the different types of circulating currents in a decoupling way. The first degree of freedom control mainly suppresses the circulating currents within the single converter, whereas the droop-based second degree of freedom control mainly suppresses the circulating currents among the multiple converters. Through the proposed solution, the IPOP nonisolated dc/dc converters can operate well with high reliability and scalability. The effectiveness of the proposed solution is validated by the real-time hardware-in-loop tests. [ABSTRACT FROM AUTHOR]

This paper proposes a novel 11-level improved active-neutral-point-clamped (11L-IANPC) converter for ground power unit (GPU) application. This hybrid topology consists of the 5L-ANPC and the proposed low-voltage submodule. The proposed 11L-IANPC converter possesses only one flying capacitor (FC) and reduced number of high-frequency switches. Hence, voltage diversity and ratings, stored energy, and the number of costly and bulky FCs are significantly decreased. Moreover, operating the augmented submodule at the low voltage and power leads to doubling the number of output voltage levels, whereas the low extra cost and size are imposed on the proposed converter. In addition, suggested sensorless switching method leads to self-balancing of FC and significantly amends the output voltage frequency spectrum. These improvements cause significant reduction in control complexity of the proposed 11L-IANPC converter, remarkable decrease in size of the bulky and costly output LC filter, and improving the dynamic and steady-state performance of the proposed static GPU. The simulation and experimental results validate the feasibility of the proposed converter as well as its suggested modulation and control method. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

The current source converter (CSC) has been popular in high-power medium-voltage applications. To increase the system power capacity and reduce the output harmonics, parallel connection of CSCs with multilevel current output is a practical approach. There are mainly two types of parallel based configurations. The structure with an independent dc link for each paralleled CSC can be regarded as the first configuration, where the dc current flowing into each CSC can be controlled from the rectifier side independently. The second type is constructed with only one current source rectifier (CSR) on the grid side and paralleled current source inverters (CSIs) on the load side, which could potentially reduce the cost and size of the system. However, with a common dc source, the dc current for each CSC should be carefully controlled with proper modulation design. At the same time, the common-mode voltage (CMV), which increases the motor line-to-ground voltage and causes additional stress to the insulation system, should also be suppressed. In this paper, with a focus on the shared dc-link structure, we thoroughly analyze the dc-link current flow and common-mode loop circuit. We propose a multilevel modulation strategy of the parallel CSI system considering the requirement of dc current balancing and CMV reduction to improve the overall system performance. The effectiveness of the proposed method is verified by both simulation and experiment in a transformerless parallel CSC system. [ABSTRACT FROM AUTHOR]

Owing to low cost, small size, and low weight, transformerless inverters became prominent in single-phase grid connected photovoltaic (PV) systems. Key issues pertaining to these inverters include suppression of common mode (CM) leakage current and improvement of conversion efficiency. Achieving higher efficiency in single-phase grid-connected photovoltaic systems depends on the number of stages involved in feeding power to the grid, predominantly, if the PV array voltage is less than the peak value of the grid voltage. In this paper, an integrated dc–dc converter based grid-connected transformerless PV inverter is proposed which is aimed at maintaining high efficiency, even if the PV array voltage falls below the peak value of grid voltage (efficient operation at an extended input voltage range). A modulation strategy is discussed in order to minimize the flow of CM leakage current. Further, the efficiencies of certain transformerless inverter topologies are analyzed and compared with that of the proposed topology. Detailed simulation studies are carried out in MATLAB/Simulink environment to verify the analysis. Experimental results for a scaled down laboratory prototype are included as a proof-of-concept to validate the claims. [ABSTRACT FROM AUTHOR]

In a direct current (dc) distribution network, the modular multilevel high-frequency dc converter (MDCC) can achieve electrical isolation, voltage conversion and power transmission between the low- and medium-voltage dc buses. In this paper, quasi-square-wave (QSW) modulation, which avoids the $dv/ dt$ stress problem and maintains a high dc voltage utilization, is applied in MDCC, and the mathematical model of QSW modulation with a dual-phase-shift (DPS) scheme is established. Based on the model, the influences of staircase rising and falling process in QSW modulation on MDCC performance, including the power characteristic, current stress, switching characteristic, and efficiency characteristic, are analyzed. The influences of QSW modulation under DPS scheme on MDCC performance are also investigated. Moreover, to achieve a comprehensive optimization of MDCC performance, a multiobjective optimized control strategy based on QSW modulation under DPS scheme is proposed. Finally, a MDCC prototype is set up and the experimental results verify the correctness and effectiveness of the analysis and proposed strategy. [ABSTRACT FROM AUTHOR]