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This paper reports the application of silicon bipolar junction transistor (BJT) modeling techniques to the modeling of dynamic behavior of high-voltage 4H-SiC BJTs, and the experimental validation thereof. High-voltage silicon BJTs are impractical due to their low current gain that requires a bulky base driver. Emergence of high-voltage 4H-SiC vertical NPN BJTs with a tenfold higher gain enables the application of efficient drivers, with ratings close to those of IGBTs. This paper demonstrates the advantages offered by 4H-SiC BJTs by means of wide-scale measurements at 800 V and 10 A in a range of temperatures up to 175 °C and adjusted base driver switching rates. This paper shows that the turn-off storage delay in the SiC BJT is two orders of magnitude lower than that of the silicon device. It also shows that the turn-on switching transients of SiC device are by an order of magnitude and the turn-off transients are by two orders of magnitude faster than that of its silicon counterpart, resulting in a tenfold reduction of the switching energy. It also demonstrates the temperature dependence of switching transients of the silicon BJT, and the relative temperature-invariance of the SiC device's performance. This paper concludes with validation of the transient models for the 4H-SiC NPN BJT, showing that the model is sufficiently accurate for transient switching and loss calculations. [ABSTRACT FROM AUTHOR]

Partial discharge (PD) detection is a fundamental tool for the design and diagnosis of insulation systems, particularly organic materials that must operate throughout their life without PD. While the methods for PD measurements under sinusoidal supply voltage are well-established, the same does not hold under repetitive-pulse voltage waveforms, such as those provided by inverters. Electromagnetic noise generated by electronic switch commutation in inverters can overlap with PD pulses, making it difficult to measure, separate from noise, and identify PD. This is particularly more cumbersome when fast rise-time switches are employed. To address these issues, this paper investigates methods to detect PD pulses on enameled wires under repetitive impulsive voltages with different rise times of 60, 500, and 1000 ns, proposing techniques which allow separation of PD from noise even when they overlap in time and frequency domains. This paper employs a time-domain approach using standard deviation curve acquired from a set of measurements to discriminate PD from repetitive commutation disturbance. These techniques can be implemented to achieve unsupervised noise rejection, which would be an important goal for both offline and online PD testing. The proposed approach is validated successfully through tests carried out on a low-voltage motor. [ABSTRACT FROM AUTHOR]

DC shipboard power systems have been considered as a promising solution for stricter environmental regulations on ships due to their main benefits in fuel savings with variable speed engines and easy integration of energy storage systems. In order to employ the dc solution in the shipboard power systems, the dc power systems have to be protected from a system fault with protection selectivity to minimize impacts of the fault or to avoid other undesirable situations in the system. For low-voltage dc shipboard power systems, a three-level protection has been proposed: 1) fast action (first)—bus separation by solid-state dc bus-tie switch; 2) medium action (second)—feeder protection by high-speed fuse; and 3) slow action (third)—generator–rectifier fault controls. This paper proposes a new method by means of additional bus capacitance added in main dc buses to help reliable operation of the three-level protection. The principle of the proposed method is introduced and the sizing of the additional bus capacitance is addressed in this paper. With the modeling of the dc shipboard power systems, the analyses of voltage drops for the bus separation failure and fault clearing time for the feeder protection are carried out to verify the proposed method. The results show that the proposed method not only mitigates the voltage drop for the bus separation failure, but also achieves the selectivity and the sensitivity for the feeder protection. [ABSTRACT FROM AUTHOR]

This paper presents a robust event-triggered model predictive control (MPC) strategy for multiple high-speed trains (MHSTs) with random switching topologies. Due to the complicated operation environment of high-speed railways, the communication topology of MHSTs system is time-varying and changes among a set of directed graphs, which can be characterized as a Markov chain. By adopting the concept of MPC, this paper studies the distributed cooperative leader-following consensus control for MHSTs, in which a novel event-triggered strategy is introduced to determine when information exchange among neighboring trains and control update are executed. Firstly, the leader-following consensus problem of MHSTs system is transformed to the stabilization of a Markov jump system and a sufficient condition for leader-following consensus is derived with stability analysis of the Markov jump system based on the robust event-triggered MPC scheme. Then, the robust event-triggered MPC algorithm which minimizes the objective function is proposed. By optimizing the objective function, the deviation of states and amplitude of the control force are optimized. The effectiveness of the proposed robust event-triggered MPC method on cooperative cruise control of MHSTs is illustrated by numerical examples. [ABSTRACT FROM AUTHOR]

This paper presents a memristive device model capable of accurately matching a wide range of characterization data collected from a tantalum oxide memristor. Memristor models commonly use a set of equations and fitting parameters to match the complex dynamic conductivity pattern observed in these devices. Along with the proposed model, a procedure is also described that can be used to optimize each fitting parameter in the model relative to an I–V curve. Therefore, model parameters are self-updated based on this procedure when a new cyclic I–V sweep is provided for model optimization. This model will automatically provide the best possible match to the characterization data without any additional optimization from the user. In this paper, multiple cyclic I–V characterizations are modeled from ten different tantalum oxide devices (on the same wafer). Additionally, studies were completed to demonstrate the amount of variation present between devices on a wafer, as well as the amount of variation present within a single device. Methods for modeling this variation are then proposed, resulting in an accurate and complete, automated, memristor modeling approach. [ABSTRACT FROM AUTHOR]

In the system and control community, the sliding mode control technology has been known as a tool which is able to handle system uncertainties and external disturbances. Simplicity in implementation and good stability performance are the other interesting features of the sliding modes. However, traditional sliding mode controllers exhibit two weaknesses, as follows: 1) generally, they have asymptotic stability in sliding mode dynamics which results in a slow speed system and 2) the so-called chattering phenomenon exists, which produces undesirable high frequency oscillations in the control signal. In this paper, the former problem is solved using a twofold terminal sliding manifold displaying desired transient and steady state behavior. The latter issue is responded to by a twofold sliding mode technology which leads to a continuous sliding control rule instead of a discontinuous switching control. The effects of uncertain terms as well as external perturbations with unknown bounds are fully compensated using updated parameters. The values of the updated parameters approach fixed values as the system trajectories converge to the equilibrium states. The analytical results of this paper are theoretically proved using the Lyapunov technique and the finite-time control strategy. Comparative computer simulations on a robotic manipulator confirm the fast convergence attribute and robust performance of the introduced adaptive robust nonsingular terminal sliding control algorithm. [ABSTRACT FROM AUTHOR]

The randomly switching communication topologies are of particular interest for researchers in the field of consensus control since the communication connection among multiple agents can randomly change with time and space. Following this pattern, this paper models the communication topology with the Markovian randomly switching graphs, since the Markovian chain process is usually used to model the network with Rayleigh fading channel. In this stochastic framework, this paper focuses on the consensus control and performance improvement problems of grouped agents with linear or linearized nominal dynamics. To solve this problem, a class of state-feedback controllers is proposed under the assumption that all the state measurements are available. These controllers are intrinsically distributed since they solely require the relative information between neighboring agents. Moreover, the notion of $\mathcal {H}_{\infty }$ ($\mathcal {H}_2$) stochastic consensus region integrated with transient performance is defined to measure the robustness of the proposed controllers with respect to the communication topologies. This paper theoretically shows that these controllers yield unbounded consensus region, which implies that they are well-designed. Furthermore, these controllers can improve the $\mathcal {H}_{\infty }$ , $\mathcal {H}_2$ consensus, and transient performances of agents subject to external and initial-state disturbances. At the end of this paper, numerical simulations and experiments are performed to verify the theoretical results. [ABSTRACT FROM AUTHOR]

The possibility of operating distributed generation (DG) in islanded mode brings several benefits but still faces some problems, especially related to the transition from a grid-connected to an islanded operating condition. When connected to the main grid, DG units operate in PQ mode. During this transition, their controls must be changed to regulate frequency and voltage. The delay for islanding detection, associated with abrupt changes in the control references, may result in large and detrimental transients. This paper proposes a new control structure for a distributed synchronous generator (DSG) to allow a smooth transition from the grid-connected to the islanded operation mode. The proposed control structure uses a compensation loop that was conceived based on the main ideas of the anti-windup bumpless transfer (AWBT) theory (although it is not, strictly speaking, an AWBT controller). The results show that the proposed structure ensures smaller excursions of the DSG variables during the transition and, therefore, the possibility of a successful formation of the islanded system is extended to a wider range of operating conditions. Moreover, with the proposed control, the success of this transition does not depend on the islanding detection time, which is the main contribution of this paper. [ABSTRACT FROM AUTHOR]

Excessive switching activity in the fault-free circuit can cause a fault-free circuit to fail because of increased delays. For the same reason, excessive switching activity in a faulty circuit can cause a delay fault to escape detection. This paper observes that the switching activity is higher in the presence of multiple delay faults with higher multiplicities (larger numbers of single faults that are present in the circuit together). The challenge in addressing multiple faults is related to their large number. This paper addresses this challenge by an iterative procedure that is applied to transition faults under a low-power broadside test set, and has two subprocedures: 1) the first subprocedure finds multiple transition faults with excessive faulty switching activity and 2) the second subprocedure modifies the test set so as to avoid excessive faulty switching activity for the faults found by the first subprocedure. With every additional iteration there are fewer multiple transition faults that exhibit excessive faulty switching activity. The experimental results for benchmark circuits demonstrate the levels of excessive faulty switching activity in the presence of multiple transition faults, and the possibility of reducing or even eliminating it after a small number of iterations. [ABSTRACT FROM AUTHOR]

This paper defines a new type of a low-power broadside test, called a reverse low-power broadside test, whose application requires design-for-testability logic. The unique feature of a reverse low-power broadside test is that it duplicates the switching activity during the second functional capture cycle of a given low-power broadside test, except that signal-transitions are reversed. Thus, the switching activity of a reverse low-power broadside test duplicates that of a low-power broadside test in every subcircuit and on every line individually. In addition, the reversed test detects different faults, and can thus increase the fault coverage of a low-power broadside test set. This paper studies the ability of reverse low-power broadside tests to increase the transition fault coverage in benchmark circuits considering functional broadside tests as well as low-power broadside tests that are not functional. [ABSTRACT FROM AUTHOR]

The analysis of wind turbine output power measurements from the offshore wind farm Horns Rev 1 demonstrates a significant likelihood of wind turbine output powers to be very similar at a given time within offshore wind farms. This paper exploits this observation by proposing a new offshore wind farm configuration with DC collection system and series-connected wind turbines based on partial power processing converters (PPPCs) and diode-bridge rectifiers. In the proposed wind farm configuration, PPPCs are only required to process output power differences among wind turbines in a wind farm to achieve maximum power point (MPP) operation, yielding a potential for efficiency and sizing improvements. This paper addresses major design considerations at wind farm, wind turbine, and PPPC levels. System operation of the wind turbine design is derived, alongside with a matching control system and HVDC-link current scheduling algorithm. The proposed wind farm is successfully tested for low voltage ride through, power curtailment, inertia response, and communication system outage scenarios. Time-transient simulations of a 30-turbine series string using measured and artificial wind speed profiles demonstrate that wind turbines can achieve MPP operation while only a fraction of power needs to be processed by the PPPCs. [ABSTRACT FROM AUTHOR]

This paper proposes a novel polygonal voltage space vector structure (SVS) having 30 sides, for a star-connected induction motor drive. The SVS eliminates the presence of harmonics up to 25th order from motor phase voltage throughout the entire modulation range, providing a torque profile devoid of lower order pulsations. Linear modulation is extended till 99.63% of base speed without exceeding the motor phase voltage rating. Topology consists of a dc-link fed primary inverter and two equal low voltage modular capacitor fed secondary inverters. Here the harmonics generated by the primary inverter is canceled by the secondary inverter which acts as a switched capacitive filter. Detailed description of the SVS generation and timing calculations are provided in this paper. Effectiveness of the proposed scheme is validated using experimental results, inverter loss calculations, and harmonic analysis. [ABSTRACT FROM AUTHOR]

Four-level hybrid-clamped inverter is a newly proposed topology that can operate under a wide voltage range without switches connected in series. However, when it is applied in medium voltage high power conversions, the flying capacitors in each phase will occupy a huge volume and a high switching frequency is required to restrain the voltage ripples. In order to overcome this drawback, a four-level active neutral-point clamped inverter is discussed in this paper, which consists of only six switches and no diodes or flying capacitors are required. In order to balance the neutral-point voltages under the full power factor and modulation index range, a capacitor voltage balance method based on carrier-overlapped pulsewidth modulation is proposed in this paper. The upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection and the central dc-link capacitor voltage is balanced by adjusting the duty cycles of switching signals slightly. Simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

The development of wide band-gap semiconductor devices is rapidly promoting the development of power electronics technology, especially in high frequency (HF) power converter region. A category of HF power converter is switch-mode power amplifier (PA). This paper focuses on the implementation of a multiphase dc–dc PA with high bandwidth and high power rate. When naturally sampled phase-shifted carrier modulation is implemented in the practical digital control system to control this HF power converter, the pulsewidth error problem caused by limited domain frequency of control chip becomes much severer. As a result, dc voltage component of each phase becomes different under several conditions, leading to current imbalance among phase inductors. This paper analyzes this problem and proposes a sensorless control method to solve it, based on the injection of random sequence in reference wave. A four-phase prototype employing GaN devices is fabricated, switching at 1 MHz. Current imbalance and effectiveness of the proposed control method are verified by experimental results. The prototype is capable of uniformly amplifying sine signal within 200 kHz and a 350 kHz bandwidth random signal, with peak output power up to 810 W. [ABSTRACT FROM AUTHOR]

This paper presents an optimization method for selective harmonic elimination in a cascaded multilevel inverter using teaching–learning-based optimization (TLBO). The main objective in selective harmonic elimination (SHE) strategy is to eliminate low-order harmonics by solving nonlinear equations and reaching optimal solution, while the fundamental component is satisfied. In this paper, in one side, the influence of optimal dc sources is investigated to reach the SHE goal, and in another side, comparing optimization methods is considered. In this paper, the TLBO as a recently emerged nature-inspired algorithm is presented to provide better results for the SHE in comparison with genetic algorithm, artificial bee colony, imperialistic competitive algorithm, harmony search, ant colony optimization, particle swarm optimization, and differential evolution. For better comparison of those methods and influence of optimal dc sources, 5-, 9-, and 15-level inverters are chosen and MATLAB software is used for optimization. Simulation results show the superiority of TLBO, higher precision and probability of convergence than other mentioned algorithms. Finally, to validate the influence of optimal dc sources and the accuracy of TLBO results, the experimental setup is conducted for a 5-level cascaded H-bridge inverter with optimal dc sources. [ABSTRACT FROM AUTHOR]

Satellite dc–dc power converters are required to have electromagnetic interference (EMI) compatibility as well as high reliability. The requirement of high reliability limits the complexity of the structure as well as the number of low-reliability components. In this paper, a conventional active-clamp-forward (ACF) topology is examined for a satellite converter owing to its relatively simple structure, small number of components, and good clamping capability regarding its switch voltage stress. However, it has a pulsating input current shape, a high di/dt level, and high switch voltage stress, which are disadvantageous with regard to the EMI filter size and high-input-voltage converter applications. To overcome these drawbacks, a new ACF topology with a continuous input current waveform is proposed. In the proposed waveform, the voltage stresses on the main switches are relieved, which is crucial to ensure the reliability of satellite FET switches, by utilizing a two-series connected structure. These features allow the proposed converter to serve as a high-input-voltage, high power-density satellite converter. In this paper, 100 W prototype converters with 50 V inputs operating at 300 kHz are built with a high power density of 47.9 W/in3. Experiments on these prototype converters are carried out to verify the features. [ABSTRACT FROM AUTHOR]

This paper presents a 5-level inverter topology for open-end induction motor drives by using a single dc source. The open stator windings of the drive are supplied with a 3-level flying capacitor inverter from one end and capacitor-fed 2-level inverter from another end. The voltage ratio of the dc link to the capacitor in 2-level inverter is maintained at 4:1 ratio to generate five-level voltage output. The capacitor in 2-level inverter is balanced by the switching redundant vector combinations from both the inverters while the floating capacitors in the 3-level inverter are balanced by using redundant switching states. The proposed topology gives 5-level operation with less number of floating capacitors and power semiconductor switches compared to other existing topologies. Also, the balancing of the capacitors is independent of load power factor and modulation index. Further, the generalization of the proposed dual inverter scheme for any n-level inverter is also included in this paper. The experimental results and required analysis are also presented to validate the inverter scheme. [ABSTRACT FROM AUTHOR]

Active magnetic bearing is a core technology for high-speed rotational machines. Power electronics converter as the active magnetic bearing drive is the actuation unit and its topology highly impacts the performance of the bearing system. This paper introduces the progress of topology of active magnetic bearing drive. The initial topology of an H-bridge does not sufficiently utilize the power electronics devices. The topology with half-bridge and shared phase-leg has been proposed as the fundamental topology. In this paper, two approaches of novel magnetic bearing drive topology modification have been developed on the basis of the fundamental topology. In the first approach, central phase-leg for multiaxis magnetic bearing drive can be further shared and the power electronic devices can be globally optimized in the whole system. Further, a topology with current in the reverse direction can reduce the central phase-leg current rating and power losses. In the second approach, fault-tolerant magnetic bearing drive topology has been developed on the basis of the fundamental topology, too. It can ride-through the open-circuit fault of power electronics switch-in operation and keep levitation for the magnetic bearing. The series work of novel topologies can improve the performance of an active magnetic bearing system in application. [ABSTRACT FROM AUTHOR]

This paper presents the development of a Class-D full-bridge zero-voltage switching (ZVS) inverter, applicable to wireless power transfer (WPT) systems, operating at 13.56 MHz switching frequency with dynamic dead-time control (DDTC). Resonant-coupled WPT systems are being designed at ultrahigh switching frequencies to reduce the size of the wireless link and the passive components. Maintaining ZVS while controlling the output power delivered to a fixed or variable load is one of the major challenges of designing inverters at multi-MHz switching frequencies. DDTC is the approach deployed in this paper to sustain soft switching of a Class-D full-bridge inverter over the full range of output power while regulating the input dc bus voltage. Simulation results are presented to show that dynamically controlling the dead-time during input dc bus voltage variations reduces switch-node voltage overshoot, prevents large current spikes in the switching devices, and reduces associated high switching loss. Practical results obtained show that DDTC reduces switch-node voltage overshoot, increases the inverter efficiency, and reduces the steady-state temperature of the inverter during output power regulation. [ABSTRACT FROM AUTHOR]

This two-part paper presents a method to mitigate half-cycle saturation of transformers caused by monopolar operation of neighboring HVDC transmission lines while keeping the ability to detect the zero-sequence fault currents (ZSFC) when ground faults occur. Part I of this paper has presented the mitigation principles and device design of the proposed neutral current blocking switch. In Part II, the performance of the proposed method to permit the circulation of zero-sequence current is investigated. An operation strategy is proposed that simultaneously allows the mitigation of half-cycle saturation and the detection of ZSFC. Simulations on a widely-used 500 kV system show that the proposed mitigation technique, using a sub-synchronous switching frequency (no higher than 30 Hz), can effectively mitigate the half-cycle saturation while allowing the circulation of ZSFC. The novel mitigation method exploits the characteristic differences between half-cycle saturation (dc) and asymmetric faults (ac). The method provides an implementable solution to the dc-bias phenomenon because it delivers concurrently dc-bias mitigation, minimal impact on ground fault detection, and no switching stresses on the power electronic switches. The proposed technique can also be applied to the mitigation of geomagnetically induced currents. [ABSTRACT FROM AUTHOR]

First harmonic analysis (FHA) is arguably the most widely used analytical technique for wireless power transfer (WPT) circuits due to its simplicity. Although FHA can provide closed-form solutions, the existence of rectifier diode forward voltage drop and higher order harmonics, especially the second and third harmonics at variable duty cycle operation, can significantly deteriorate its accuracy. This paper presents an accurate and efficient method called enhanced multiple harmonic analysis (eMHA) for the optimal design and optimal control of WPT systems. The eMHA method considers the nature of nonlinear rectification networks under nonsinusoidal current and reexamines the concept of the equivalent load. As a result, the rectified WPT system is transformed into a series of linear systems with complex load impedances. The steady-state electric quantities can be then explicitly calculated. This enables eMHA to seamlessly work with numerical optimization algorithms to facilitate the automated design and optimization of WPT systems. An example of optimal design and optimal control of a 10 W WPT system is demonstrated. The results obtained by eMHA and FHA are also compared. A prototype of the designed circuit was constructed. The accuracy and effectiveness of eMHA are verified by experimental measurements. This paper is accompanied by a MATLAB-based analytical tool with a graphical user interface demonstrating the effects of circuit variables on electrical quantities and waveforms. [ABSTRACT FROM AUTHOR]

A new single stage three-phase ac–dc converter with four switches and galvanic isolation is proposed in this paper. The new converter is simple and uses fewer switches than previously proposed ac–dc converters of the same type. It is a bridgeless converter that can operate with continuous input current and with any pulsewidth modulated method suitable for a standard three-phase six-switch voltage source rectifier. In this paper, the operation, control, analysis, and design of the proposed converter are explained and its features are discussed. Experimental results obtained from a prototype that confirm the feasibility of the converter are presented as well. [ABSTRACT FROM AUTHOR]

Compared with the conventional two-level dual-active-bridge (DAB) dc–dc converter, the three-level DAB converter could operate with lower voltage rated switching devices and provide more control degrees of freedom, which enhances the control flexibility. This paper proposes a modulation strategy with five control degrees of freedom. In the previous work with multiple control degrees, the optimization strategies for efficiency or inductor current minimization are investigated; however, these strategies all need detailed mode analysis and complex mathematical optimization tools to obtain the optimal duty cycles. In this paper, an optimization strategy for the root-mean-square value of the inductor current is proposed. This method extracts the fundamental and third-harmonic components from the high-frequency voltages on both sides and adjusts the amplitude of the bridge voltages by the vector diagram to obtain the optimal duty cycles. The inductor current can be reduced significantly at light loads with the proposed strategy, so the efficiency of the converter can be improved. Moreover, the optimization process does not need the detailed operation analysis of the converter, nor does it require the complex mathematical optimization tools. Finally, the performance of the three-level DAB and the optimization strategy are verified by the experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a new modular and active snubber cell, easily applicable, and attractive for converters, especially have many switches proposed. This snubber cell is implemented on the single phase of a grid-connected three-phase T-type three-level inverter (T-3LI). In this new converter, the main switches turn-on under zero-voltage transition and turn-off under zero-voltage switching (ZVS). Also, auxiliary switches turn-on under zero-current switching and turn-off under ZVS. All snubber diodes operate under soft switching (SS). There are no additional current and voltage stresses on the main switches. During an SS operation, the switching energies are transferred to a dc voltage source. Then, these energies are processed to input with an independent dc–dc converter. Thus, all switching energies are recycled. In this paper, the principle operation and steady-state analysis of the modular and active snubber cell for a single-phase T-3LI are presented and experimental results, rated 1 kW and 100 kHz, are provided to verify theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, we propose adaptive algorithms of gain tuning for Kalman filters and switching Kalman and $\mathcal {H}_{\infty }$ filters for discrete systems. Both of the gain tuning and switching rely on square means of innovations. This paper also provides stability analyses on time-varying Kalman filters and derives a sufficient condition for their asymptotic stability, on which our gain-tuning algorithm is based. It should be noted that the stability condition is available for even nonstabilizable systems having their uncontrollable poles on the unit circle. To illustrate those algorithms, we perform simulations using a harmonic oscillator model that is nonstabilizable and has its poles on the unit circle. Furthermore, we apply the algorithms to estimation of a ship's oscillation, particularly, with time-varying frequencies by simulations and model experiments. Consequently, all the results of stability analyses, simulations, and experiments have convinced that the algorithms are solid and effective. [ABSTRACT FROM AUTHOR]

This paper presents a unified second-stage LC filter applied in the three-state switching cell buck–boost converter, which provides current and voltage with low ripple and low noise. The unified second-stage filter promotes a reduction in the number of devices while maintaining the filtering performance of the converter, with second-stage LC filters at the input and at the output. Moreover, the unified filter, when associated with a three-state switching cell buck–boost converter, allows a size reduction of filter devices, especially for designs with duty cycle range around 1/2. Furthermore, the unified filter arrangement provides nondissipative clamping of switching devices and reduce the system order when compared to the converter with second-stage LC filters. In this paper, the static and dynamic characteristics of the proposed converter in continuous conduction mode (CCM) are reported. Experimental data were obtained from a laboratory prototype with an input range of 32 $\sim$ 72 V, constant output of 48 V, a load of 150 W, and switching frequency of 45 kHz. The measured efficiency for the rated load was 97% for maximum input voltage. A comparison of the size and performance of the proposed filter with the topology that uses second-stage LC filters at the input and at the output is also presented. [ABSTRACT FROM AUTHOR]

In this paper, a new bidirectional dc-dc converter that is based on the quadratic and switched-capacitor structures is proposed for Electric Vehicle applications. The proposed converter has high voltage conversion ratios, low voltage stress on the semiconductor devices, constant potential difference between the grounds of its low voltage and high voltage ports, and continuous current at its low voltage port. Synchronous rectification is utilized to enhance the efficiency of the converter. In addition, an extended version of the proposed converter is discussed in this paper. Finally, the experimental results obtained from a 2-kW/800-V scaled-down prototype validate the feasibility of the proposed topology and the correctness of its theoretical analysis. [ABSTRACT FROM AUTHOR]

The paper confirms that removing antiparallel silicon carbide (SiC) Schottky barrier diodes (SBDs) from SiC-based inverters offers positive effects without critical impact on inverter loss and electromagnetic interference (EMI) issues, moreover, the removal of SBDs reduces the inverter losses in many cases and noise emissions. This conclusion leads to the possibility to improve the power densities by removing SBDs. However, the removal of SBDs may cause some disadvantages such as an increase of the reverse conduction loss and influence of the body diode recovery phenomenon. Therefore, a comprehensive investigation of these advantages and disadvantages is necessary. In this paper, design criteria are proposed to clarify the conditions in which SiC-based inverters without SBDs have advantages over those with SBDs from the viewpoint of losses. On the other hand, to achieve the removal of SBDs, it is also necessary to confirm that removing SBDs does not cause severe EMI issues. The paper confirms that switching noises are reduced by the removal of SBDs; this is due to the larger damping effect of the SiC mosfets without SBDs than that of SiC mosfets with SBDs. The validity of the theoretical analyses and design criteria is confirmed with comprehensive experimental results. [ABSTRACT FROM AUTHOR]

In order to increase the efficiency of modern microprocessor power supplies used in data centers, 380-V dc power distribution systems have been attracting attention due to their high efficiency and high reliability. This paper presents an innovative single-stage approach for 380-V voltage regulator modules (VRMs) based on a quasi-resonant multilevel topology constant on-time operation. The proposed topology inherently integrates the multiphase approach, providing fast phase shedding and flat high-efficiency curves even at light-load conditions. This is a unique advantage, which is not possible to establish in the two-stage approach, which is very important in server architectures, and where high efficiency is required even at light-load conditions. This paper analyzes the circuit topology and proposes a control architecture for fast transient response, including current-sharing capabilities. The digital controller has been implemented in 0.16- $\mu$ m lithography together with a digital pulsewidth modulation with a 195-ps resolution and a 40-MS/s 7-bit analog-to-digital converter. Experimental results show an efficiency of 93% for a 120-A 380–1.8-V VRM power supply. [ABSTRACT FROM AUTHOR]

This paper proposes a fifth-order resonant immittance network based dual-active-bridge (DAB) converter and an optimal modulation method that will ensure high-efficiency operation of the converter under wide-range variations in voltage ratio and output power level. The proposed modulation method is based on the concept of total power loss minimization, where a loss model is developed and an optimization algorithm is formulated to compute the optimal set of internal and external phase shift parameters that will lead to the maximum efficiency for a given set of operating parameters including voltage ratio and output power level. It is found that to maintain high-efficiency operation under wide-range variations in voltage ratio and output power level, the DAB converter is required to switch between different operation modes and neither soft-switching operation nor unity-power-factor operation is able to achieve wide-range high efficiency performance when used alone. The importance of $reconfigurability$ of operation mode for achieving wide-range high efficiency performance is clearly illustrated in this paper. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

A space vector modulation (SVM) technique of a dual-inverter system for an open-end winding motor drive is described in this paper, where one inverter has a battery power source and the other has an only capacitor across the dc bus. The SVM must be achieved to operate the motor with field-oriented control and simultaneously to control the capacitor voltage at a constant value by using redundant switching states of the dual-inverter system. The control of the capacitor voltage is carried out by selecting a charging or a discharging mode in each redundant switching state, taking the instantaneous motor power factor into account. In addition, it is also required to reduce the error voltage pulses, which are generated in output multilevel voltage waveforms during the dead time. The compensation method of the existing dead-time scheme and the improved SVM sequence to reduce the error voltage vectors are proposed in this paper. The proposed methods are examined through several experimental tests and are confirmed to generate superior output voltage waveforms from the viewpoint of the measured total harmonic distortion and dv/dt. [ABSTRACT FROM AUTHOR]

This paper presents an FPGA-based Digital Real-Time Simulation (DRTS) environment for the analysis of Electromagnetic Transients (EMTs) of power systems that include multiple Power Electronic Converters (PECs). The main features of the proposed DRTS platform are that it i) employs two-value resistor switch model for PECs and thus avoids inaccuracies of Associate Discrete Circuit (ADC) model and ii) does not require separation of PECs by transmission lines (stub lines) and thus accurately represents PECs in close electrical proximity of each other. These features respectively result in a time-variant and large system admittance matrix which significantly increases the computation burden in each simulation time-step and can render it infeasible for real-time applications. To overcome this problem this paper introduces i) Switching-Network Partitioning (SNP) method which is tailored for PECs representation in FPGA and ii) Reformulated Modified Nodal Analysis (RMNA) method to enable computational parallelism between the solution of network and component models in FPGA. SNP enables solution-level partitioning of the PECs and the rest of the system. The developed DRTS platform enables sub-microsecond simulation time-step and provides a fixed hardware irrespective of the system configuration. Performance of the platform is evaluated for a study system and verified versus off-line simulation studies. [ABSTRACT FROM AUTHOR]

The main drawbacks of conventional direct torque control (DTC) drives are erratic switching frequency and high torque ripples. The multilevel inverter fed DTC drives are proved to be an alternative for eliminating these drawbacks. Apart from the commonly used three-level inverter fed drives, this paper presents an even-level inverter fed DTC drive. In this paper, a space vector modulated DTC algorithm for a four-level DTC drive is proposed and is implemented by feeding both ends of an open-end-winding induction motor with two-level inverters. The space vector modulation (SVM) algorithm uses a fractal based design for switching voltage vector generation and allied computations are performed in 60 degree co-ordinate system. Representation of vectors as integer values in 60 degree co-ordinate planes avoids fractional arithmetic, which simplifies the algorithmic computations. Detailed analyses of the drive performance under dissimilar operating modes are presented. The loading performance of the drive is experimentally verified on a 5-HP induction motor with a strain gauge type mechanical loading system. No-load experimental results were obtained from a laboratory model 2-HP induction motor drive operated in closed loop mode. [ABSTRACT FROM AUTHOR]

Partial shading condition drastically reduces the maximum power output of photovoltaic array. Partial shading occurs due to several factors, such as flying birds, trees, and passing clouds. Many ways can be mitigated partial shading problems in photovoltaic (PV) array. One among the way is reconfiguration techniques, namely reconfigure the location of PV modules in PV array based on irradiance levels in order to distribute shading effects and increasing maximum power. This paper proposed an optimal SuDoKu reconfiguration pattern for $9\times 9$ total-cross-tied (TCT) PV array to improve maximum power under partial shading conditions. In this approach, the physical location of PV modules in TCT array are rearranged based on optimal SuDoKu style without altering the electrical connections, so that the shading effects can distribute over the array. Further, the performance of proposed pattern investigated with existing SuDoKu pattern under different shading conditions by comparing the global maximum power point, mismatch losses, fill-factor, and efficiency using MATLAB-Simulink. Based on the results of this paper, it concluded that the proposed optimal SuDoKu reconfiguration arrangement is reducing the wiring arrangement and increasing the shading distribution over the array as compared to SuDoKu arrangement. [ABSTRACT FROM AUTHOR]

In this paper, two simple control methods are proposed for improving direct torque control (DTC) with a constant frequency torque controller (CFTC-DTC) in induction machines. The CFTC-DTC was initially introduced to reduce torque ripple and achieve constant switching frequency in inverters. However, when compared to the original DTC, the CFTC-DTC algorithm suffers from slow torque dynamic response owing to the selection of zero-voltage vectors during torque transient. In addition, when the motor operates at low speed, flux droop occurs at sector transitions, which leads to undesirable current distortions. The problem of flux droop occurs because of short-duty voltage cycles and small radial voltage components at low speeds. This paper has two main contributions—to eliminate zero-voltage vectors during torque dynamics in order to establish a fast torque response in the transient state, and to minimize the flux droop at the sector transitions by applying another triangular carrier and modifying the torque output in order to increase the duty voltage cycles at low motor speeds. A detailed analysis of the problems and proposed methods is presented. Experimental results are provided to validate the effectiveness of both proposed methods. [ABSTRACT FROM AUTHOR]

Various methods have been presented in the past to emulate the electrical behavior of modular multilevel converters (MMCs). To meet the demands for the reliability aspect study of MMCs, this paper proposes a viable setup to emulate the thermal behavior and to investigate its feasibility for reliability testing and thermal model validation of the power modules in the MMC. The proposed mission profile emulator has three distinctive features: 1) capable of emulating and measuring the thermal stresses of power modules; 2) capable of implementing practical switching profile as a full-scale MMC; and 3) having significantly reduced requirement for dc power supply compared to existing setups used for electrical studies. Theoretical discussions, and simulations as well as the experimental results are presented to demonstrate the capability of the mission profile emulator both electrically and thermally. Moreover, this paper is accompanied by a video demonstrating how to measure the junction temperature of the power devices using the optical fiber and the thermal camera. [ABSTRACT FROM AUTHOR]

The emergence of applications which require high-voltage switches has created a tendency to use semiconductor device series stacks. These series stacks permit operation at blocking voltages above semiconductor elements’ nominal voltage. Insulated-gate bipolar transistors (IGBT) are currently utilized for controllability and switching speed, when these topologies are employed. The main challenge therewith is guaranteeing voltage balance between IGBTs, both when blocked and when switching transistors. Most of the methods which have been proposed to mitigate static and dynamic voltage unbalances increase transistor losses. The series stack loss-less high voltage switch (LHVS) which mitigates voltage unbalances, thus reducing switching losses, is presented in this paper. LHVS consists of a circuit, which ensures soft IGBT switching, an energy recovery circuit, and a gate delay compensation circuit. Additionally, the insulation voltage level is guaranteed to be equal between control circuit and high-voltage side of each IGBT. The operating principle of the LHVS is detailed in this paper, as is experimental validation which has been performed for three series stack modules. Static unbalances are reduced to 1%, while the differences between collector–emitter voltage curves in switching “on” do not surpass 8 ns, and switching losses are reduced by 41%, as compared to the hard-switching topology. [ABSTRACT FROM AUTHOR]

This paper proposes a resonant switching cell model to analyze and design the single-ended resonant dc–dc converters. The single-ended zero-voltage switching (ZVS) converters such as the Class E converter are efficient for megahertz switching because they feature low turn-on and turn-off switching losses. Also, they use only a ground-referenced switch, allowing a simple gate drive circuit. In this paper, we investigate the single-ended resonant converter with the small input inductance, whereas the conventional Class E converter has a large input inductance. The main contribution of this paper is to propose the resonant switching cell as an analytic model that simplifies the analysis and the design of the resonant dc–dc converters. Furthermore, this paper presents the design method of the resonant switching cell model for minimizing the resonant current magnitude and conduction loss while the converter maintains ZVS property. The experimental results from a 10-MHz GaN-based prototype demonstrate the feasibility and effectiveness of the analysis and design based on the proposed resonant switching cell model. [ABSTRACT FROM AUTHOR]

This paper presents a novel procedure for energy management system (EMS) that can utilize the flexibility in transmission networks in a practical way. With the proposed enhanced EMS procedure, the reliability benefits that are provided by corrective transmission switching (CTS) in real-time contingency analysis can be translated into significant cost savings in real-time security-constrained economic dispatch. Simulation results show that the congestion cost with consideration of CTS is largely reduced as CTS can relieve potential post-contingency network violations. The effects of integrating CTS in existing EMS procedure on markets are also analyzed. In conclusion, this two-part paper shows that CTS can achieve substantial reliability benefits, as well as significant cost savings. [ABSTRACT FROM AUTHOR]

The flexibility in transmission networks is not fully utilized in existing energy management systems (EMSs). Corrective transmission switching (CTS) is proposed in this two-part paper to enable EMS to take advantage of the flexibility in transmission systems in a practical way. This paper proposes the following two EMS procedures: first, Procedure-A connects real-time security-constrained economic dispatch (RT SCED) with real-time contingency analysis (RTCA), which is consistent with industrial practice; and second, Procedure-B, an enhanced version of Procedure-A, includes CTS in EMS with the proposed concept of branch pseudo limit used in RT SCED. Part-I of this paper presents the methodology, whereas Part-II includes detailed results analysis. It is demonstrated that Procedure-A can effectively eliminate the base case overloads and the potential post-contingency overloads identified by RTCA, and Procedure-B can achieve significant congestion cost reduction with consideration of CTS in RT SCED. Numerical simulations also illustrate that integrating CTS into RT SCED would improve social welfare. [ABSTRACT FROM AUTHOR]

This paper proposes a two-stage energy management scheme (EMS) for AC–DC hybrid smart distribution systems (DSs). The proposed EMS is formulated as a multi-objective optimization problem to minimize the DS operation costs and energy losses. The proposed EMS is achieved in two stages. In the first stage, a network reconfiguration algorithm determines the optimal day-ahead reconfiguration schedule for a hybrid DS. In the second stage, a real-time optimal power flow algorithm determines the real-time operational schedule of the energy resources. This paper also introduces a new linearized power flow model for AC–DC hybrid DSs. This new model facilitates the formulation of the first-stage algorithm as a mixed-integer linear programming problem and the formulation of the second-stage algorithm as a linear programming problem. The proposed two-stage EMS was tested on a case study of a hybrid DS that included different types of loads and distributed generators. The results demonstrate the efficacy of the proposed EMS: the optimal day-ahead reconfiguration schedule was successfully obtained in the first stage, and the proper and optimal real-time operation was achieved in the second stage. [ABSTRACT FROM AUTHOR]

Multilevel inverters (MLIs) are playing a pivotal role in the power sector with potential applications, such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost, and higher efficiency compared with their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level voltage-source inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the dc-link capacitors and FCs. The generation of various output voltage levels and the limitation of the sinusoidal pulsewidth modulation control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared with the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. [ABSTRACT FROM AUTHOR]

This paper presents a novel control strategy to significantly reduce the high-frequency transformer loss in a modular solid-state transformer (SST) based converter system. The modular SST design is based on an ac–dc power-electronic building block comprised of an H-bridge at the ac input and a bidirectional soft-switching isolated dc–dc converter with a medium-voltage insulated high-frequency transformer. The ac terminals of input H-bridges are connected in series and directly coupled to the medium-voltage ac line, while the output dc terminals are all connected in parallel at a low voltage. The key innovation described in this paper, without sacrificing the output performance, is the control scheme that reduces core and winding losses associated with the dc–dc resonant stage by turning off the selected dc–dc converters in synchronism with the line voltage. The prototype for the test described in this paper is based on a modular SST where each module is rated at 50 kVA, with a 200 kHz transformer using 1.7 kV silicon carbide discrete mosfets, but the described control concepts are more broadly applicable to similar topologies. [ABSTRACT FROM AUTHOR]

This paper deals with a multilevel ac–ac double conversion system that uses the intercell transformer (ICT) for applications which include generating systems and the interfacing of renewable energy sources with the utility grids. Each phase of the proposed configuration is formed through the ICT interleaving operation of two multilevel 5-level E-type legs to achieve the 3-phase 5-level back-to-back E-type converter (3Φ5L BTB E-type converter). The analytical procedure to select the inductance and capacitance values of both the input and output filters is described in the paper. Furthermore, the design and implementation of the input/output ICTs and inductors is discussed. The simulation and the experimental results on the 20-kVA interleaved 3Φ5L BTB E-type converter prototype are presented to validate the proposed analysis. [ABSTRACT FROM AUTHOR]

SiC-based diodes and mosfets switch extremely quickly with low conduction losses. Thus, from the perspective of efficiency, such devices are ideal for a continuous conduction mode (CCM) boost power factor correction (PFC) converter. However, the circuit parasitic becomes alive while switching with high $dv/dt$ and $di/dt$ values, which necessitates the need for electromagnetic compatibility (EMC) compliance measurements. Employing the best available low-loss SiC mosfet and SiC diode, in this paper, a 1-kW PFC boost converter prototype was designed, developed, and evaluated with the objective of quantifying the efficiency and EMC signature. The efficiency is evaluated through two approaches, namely, a circuit simulation and a laboratory measurement. With the first approach, the switching losses are obtained using a widely accepted double-pulse test methodology, and the conduction losses are taken from the data sheet, whereas with the second approach, the current and voltage are recorded at the input and output of the PFC converter using power analyzer. The electromagnetic interference (EMI) is monitored using line impedance stabilizing network and EMC analyzer. To maximize the efficiency, a fast, clean switching of the silicon carbide (SiC) is necessary. Utilizing a low-parasitic printed circuit board design approach and switching the selected low-loss SiC devices with a 0  $\Omega$ external gate drive resistance, this PFC boost yields a peak efficiency of 97.2% at full-rated power when switched at 250 kHz. Furthermore, the EMI noise was measured at 66 and 250 kHz. It was found that the same EMI filter size satisfies the CISPR 11 Class B conducted EMI limit at both switching frequencies with a noise of approximately 10 dB higher at 250 kHz. As the main contribution of this paper, the best case efficiency and worst case EMI are evaluated in this paper. [ABSTRACT FROM AUTHOR]

With the rapid development of photovoltaic and fuel cell stacks, high voltage gain converters are urgently demanded. Conventional boost is limited by the exaggerated duty cycle, it is impossible to obtain a high voltage gain while ensuring efficiency. Therefore, a zero-voltage switching (ZVS)-modified SEPIC converter that combines a voltage multiplier cell with traditional SEPIC is proposed in this paper. With detailed parameters design process, this presented converter works at zero voltage switching (ZVS), while obtaining high voltage gain without extremely high duty cycle. Besides, voltage stress is also reduced and low-voltage component with lower parasitic parameters can be used, thus efficiency is maintained. In order to further improve the power density, an integrated inductor scheme is adopted in this paper without changing intrinsic working states of the two inductors. A 36-W prototype is built, and experiments are conducted to verify the advantages of the proposed converter. The efficiency is up to 91.5% at full load. [ABSTRACT FROM AUTHOR]

This paper proposes a soft-switched modulation technique with synchronous rectification for an isolated single-stage single-phase matrix-type dc–ac converter. The dc side consists of a full bridge inverter, and the ac side is a 2×2 matrix converter-based cycloconverter. The proposed unipolar modulation strategy provides zero current switching/zero voltage switching (ZVS) for the ac side devices and ZVS-on for the dc side devices. It also allows natural commutation of the current flowing through the secondary side leakage inductor of the isolation transformer and the grid inductor during unity power factor (UPF) condition, thus eliminates the requirement of snubber circuit. An improved soft-switched flyback-based regenerative snubber circuit is also presented for non-UPF operation. Proposed snubber circuit recycles the energy stored in the snubber capacitors in every switching cycle. A guideline to design snubber circuit along with a comparative study is discussed in this paper. Performance of the proposed hybrid modulation technique is evaluated in an SiC mosfet based 1.2-kW dc–ac converter prototype. A detailed analysis of the converter performance has been presented in this paper considering the circuit non-idealities. [ABSTRACT FROM AUTHOR]

Solid state transformer (SST) integrated hybrid dc–ac microgrid (HMG) has wide operating capabilities in presence of dc–ac loads, renewable energy resources, and energy storage. This paper proposes control strategies for localized control of zonal hybrid microgrid, enabled by the SST and centralized energy storage devices (ESD) integrated using dual active bridge (DAB) converter. The control of DAB dc–dc converter is modified for zero circulating power flow (ZCPF) operation in both SST and ESD. Power management and coordination control used in this paper ensures the power supply reliability of the zonal HMG integrated through the SST. Microgrid system, along with its proposed controllers, provides a stabilized low-voltage dc and ac network ports, in both grid feeding and forming modes. The performance of the configured HMG system is evaluated under various power management scenarios using the MATLAB software platform. Further, the SST architecture, with its proposed controller, is tested on FPGA-based hardware platform. [ABSTRACT FROM AUTHOR]

This paper presents a novel integrated-stage light-emitting diode (LED) driver based on Flyback and resonant converters. The Flyback converter realizes power factor correction in the discontinuous conduction mode. The resonant converter is operated as a dc–dc converter to support the LED loads. Moreover, the resonant converter can clearly decrease the drain–source voltage of the active switch and exhibits zero-voltage-switch characteristics. Therefore, a cost-effective MOSFET can be chosen as the main control component that can decrease the cost of the whole system. Compared to a single-active-switch converter (such as Class-E converter), the number of passive components in the resonant converter can be limited to four. Therefore, the power density of the system can be improved drastically. In this paper, a 100-W prototype is presented under the experimental condition to validate the proposed integrated-stage LED driver. [ABSTRACT FROM AUTHOR]