1. Normally-Off LPCVD-SiNx/GaN MIS-FET With Crystalline Oxidation Interlayer.
- Author
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Hua, Mengyuan, Wei, Jin, Tang, Gaofei, Zhang, Zhaofu, Qian, Qingkai, Cai, Xiangbin, Wang, Ning, and Chen, Kevin J.
- Subjects
MISFET (Transistors) ,CHEMICAL vapor deposition ,OXIDATION - Abstract
Developing effective technique to protect the etched- GaN surface from the degradation in a high-temperature (i.e., at ~ 780°C) process, such as low-pressure chemical vapor deposition (LPCVD), is essential for fabricating normally-off GaN MIS-FETs with high-quality dielectric/GaN interface and highly reliable gate dielectric. In this letter, we developed an approach of obtaining such a protection layer using oxygen-plasma treatment followed by in situ annealing prior to the LPCVD-SiNx deposition. A sharp and stable crystalline oxidation interlayer (COIL) between the LPCVD-SiNx and etched-GaN was successfully formed. The LPCVD-SiNx/GaN MIS-FETs with COIL deliver normally-off operation with a VTH of 1.15 V, small on-resistance, small hysteresis, and thermally stable VTH . [ABSTRACT FROM AUTHOR]
- Published
- 2017
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