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The radio frequency (RF) noise performance of graded-channel metal-oxide-semiconductor (MOS) transistors (GCMOS) has displayed impressive reduction in minimum noise figure (N [F.sub.min]) as compared to classical MOSFET transistors. The studies have shown that the use of gate-length GCMOS has given a competitive RF noise performance when compared to gate-length classical nMOS transistors.

The radio frequency (RF) experimental and simulation study of a 3-dimensional (3-D) multichannel silicon-on-insulator (SOI) MOSFET (MCFET) is presented. The studies have shown that optimized MCFETs are a serious contender to the mainstream MOSFETs including FinFETs for realizing future low-power analog applications.

Measurement and modeling procedures to accurately extract a small-signal equivalent circuit of advanced MOSFETs up to 220 GHz are proposed. The methodology carried out goes from the vector network analyzer calibration to the simulation results using complex deembedding. Good comparisons between the measurement and the simulation data obtained using this procedure are shown up to 220 GHz. Index Terms--Calibration, circuit modeling, deembedding, millimeter-wave measurement, MOSFET, S-parameters, small-signal model.

The radio-frequency noise performance of FinFETs from a 60-nm gate length is investigated. It is observed that the fringing capacitance of the 3-D and multifin structure of the FinFETS is responsible for the degradation of its noise performance.

The physical reason behind the very high correlation between the drain and induced gate noise in a lateral asymmetric channel MOSFET (LAC-MOSFET) is discussed. The high correlation between the drain and gate noise is due to the strong localization of the drain and gate impedance fields (IFs).

The article discusses the results obtained from the RF small-signal study of the source/drain Schottky-barrier (SB) p-MOSFETs. The SB MOSFETs are shown to exhibit much better properties than the conventional MOSFETs.

This paper presents designs and measurements of distributed amplifiers (DAs) processed on a 130-nm silicon-on-insulator CMOS technology on either standard-resistivity (10 [ohm] * cm) or high-resistivity (>1 k[ohm] * cm) substrates, and with either body-contacted (BC) or floating-body (FB) MOSFETs. Investigations have been carried out to assess the impact of active device performance and transmission line losses on circuit design by means of simulations, analytical calculations, and comparisons of the small-signal equivalent-circuit parameters. On standard-resistivity substrates, DAs with FB devices and lossy microstrip lines on thin film exhibit a measured gain of 7.1 dB and a unity-gain bandwidth (UGB) of 27 GHz for a dc power consumption of 57 mW. With the introduction of high-resistivity substrates, other DAs, with the same architecture and using lower loss coplanar waveguide lines, show a UGB of 51 GHz with FB devices and 47 GHz with BC devices. To the authors' knowledge, the designs presented in this paper achieve the best tradeoffs in terms of gain, bandwidth, and power consumption for CMOS-based circuits with comparable architecture. Index Terms--CMOS, coplanar waveguides (CPWs), distributed amplifier (DA), microstrip (MS), monolithic microwave integrated circuit (MMIC), silicon-on-insulator (SOI).

Developments in compact-modeling principles and solutions for nanoscale double-gate (DG) and gate-all-around (GAA) MOSFETs are presented and reviewed. Techniques are presented to extend these compact models to the high-frequency regime and to study the main high-frequency parameters and characteristics such as noise.

Developments in compact-modeling principles and solutions for nanoscale double-gate (DG) and gate-all-around (GAA) MOSFETs are presented and reviewed. Techniques are presented to extend these compact models to the high-frequency regime and to study the main high-frequency parameters and characteristics such as noise.

The high-frequency properties of very deep sub-micron MOSFETs are investigated at liquid nitrogen temperature and at room temperature. The improvement of the noise performances shown by the device at 78 K is explained by the decrease of the operating temperature, extrinsic resistance values and an improvement of the dynamic performances at 78 K.

A detailed research of the high-frequency noise sources and figures of merit (FOMs) of fabricated deep-submicrometer n-channel fully depleted silicon-on-insulator MOSFETs is presented, Together with the calculation of intrinsic noise source, the Monte Carlo simulator is able to reproduce the measurement for the main noise FOMs in the RF and microwave frequency ranges.

The proposal of a new method for modeling the kink effect in partially depleted (PD) silicon-on-insulator (SOI) MOSFETs is discussed. When the load impedance is high and the frequency spacing is within the kink frequency domain, the kink effect degrades the intermodulation.

Parameters limiting the improvement of high-frequency noise characteristics for deep-submicrometer MOSFETs with the downscaling process of the channel gate length are analyzed experimentally and analytically. It is observed that the intrinsic Pucel's noise P, R, and C parameters are not strongly modified by the device scaling. .

A comprehensive study was conducted to investigate the high-frequency noise properties of metal oxide semiconductor field effect transistor in silicon-on-insulator (SOI) technology. Various gate topologies were used to determine the influence of effective channel length, gate finger width and gate sheet resistivity on the four noise parameters. It was proved that the fully-depleted SOI complementary metal oxide semiconductor process is capable of realizing low-noise amplifiers for multigigahertz portable communications systems.

Noise analysis is important in modern general-purpose microwave circuit simulators. A microscopic noise model for a FET driven by a periodic large signal is presented. The well-known linear case is used as a guide, and a generalized form of Shockley impedance field method is proposed. The use of a uniform line model avoids the use of complex physical FET models.

In this paper, we propose a reliable extrinsic equivalent circuit of a high-performance high electron-mobility transistor (HEMT) to determine both the [S]-parameters and noise parameters in the millimeter-wave range from characterizations performed below 40 GHz. In the case of the conventional equivalent circuits, only three extrinsic elements have to be determined instead of (at least) eight. We show the validity of the proposed extrinsic equivalent circuit by [S]-parameters and noise figure measurements up to the W-band (75-110 GHz). The proposed equivalent circuit is reliable and is very well suited for the design of low-noise integrated circuits for millimeter waves.

Research was conducted to examine the noise and frequency behavior of ungated high electron mobility transistors (u-HEMT) with respect to gallium arsenide ungated metal oxide semiconductor field-effect transistor. The Monte-Carlo simulation was utilized to compare static characteristics and noise temperature. Results indicated that the transit time and velocity distributions of ungated metallized semiconductor field-effect transistors spread much more in u-HEMT.

High frequency noise performance of field effect transistors (FETs) is calculated by an active line concept approach which calculates the FET small signal equivalent circuit and the microscopic noise sources for different two-port terminations. The results are correlated to each other by an analytical theory. The analytical noise model is compared with a numerical model. The results agree with the Pospieszalski model and Pucel models.

A new method for measuring the noise parameters of MESFET's and HEMT's is presented. This new method is based on the fact that only three independent noise parameters are sufficient to fully describe the device noise performance. It is shown that two noise parameters (R(sub n) and absolute value of Y(sub opt)) can be directly obtained from the frequency variation of the noise figure F(sub 50) corresponding to a 50 ohms generator impedance. By using a theoretical relation between the intrinsic noise sources as additional data, the F(sub 50) measurement only can provide the four noise parameters. A good agreement with more conventional techniques is obtained.

The decline of the energy barrier at the heterojunction as the Al mole fraction is reduced causes the noise associated to this electrode to increase, thus, affecting the noise performance of GaAs/AlGaAs high electron mobility transistors. This was found in a study of the influence of the Al mole fraction on the intrinsic noise properties of GaAs/AlGaAs high electron mobility transistors, wherein P, R and C noise parameters and the minimum intrinsic noise figure are calculated.

A simulation method for high frequency noise performance of MOSFETs is presented.