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Al-alloys and their anodic oxides were used as the gate and the gate dielectric, respectively, for the indium-zinc-oxide (IZO) thin-film transistors (TFTs). The influence of the Al-alloys on the performances of the IZO-TFTs was investigated. It was found that the hillock formation could be completely suppressed by doping neodymium (Nd) or cerium (Ce) into Al. However, the mobility of the IZO-TFT with Al-Ce gate was only 2 × 10-4 cm2 V-1 s-1, about five orders lower than that of the IZO-TFT with Al-Nd gate (11.6 cm2 V-1 s-1). Further analysis showed that Ce3+ and Ce4+ ions were existence in the oxide film obtained by anodizing Al-Ce alloy, and they would diffuse into IZO film. The Ce4+ ion could act as an electron trap due to its strong oxidizability, so the IZO-TFTs with Al-Ce gate would experience seriously degradation. In the case of the oxide film obtain by anodizing Al-Nd alloy, only Nd3+ were found, which was stable and would not produce electron traps. Moreover, the existence of Nd would suppress undesirable free electron formation in the channel, resulting in low off-current, low subthreshold swing, little hysteresis, and high electrical stability under gate bias stress. [ABSTRACT FROM AUTHOR]

The conventional D flip flop (DFF) consists of six pseudo-CMOS NOR gates integrated by monotype transistors. By analyzing the six logic states of the conventional DFF, it is found that the three-input NOR gate can be replaced by a new three-input NOR gate with a pull-up control signal and the pull-up control signal is connected to an output of another NOR gate. As a result, a new DFF is developed by using such an internal feedback control method. The static power consumption can be reduced by cutting off the dc path properly in the proposed DFF. For comparison, the conventional DFF and the proposed DFF are both fabricated by metal oxide thin film transistors with an etch stop layer structure on the basis of the same design parameters. Both the conventional DFF and the proposed DFF have the same function and both work using the negative edge triggered method. The measured power consumption of the proposed DFF is at least 13% less than that of the conventional DFF under the condition of a 20 kHz clock signal. [ABSTRACT FROM AUTHOR]

This paper proposes a new gate driver employing only a single negative power source, which is integrated by In-Zn-O TFTs with an etch stop layer (ESL) structure. A negative voltage generating module (NVGM) is developed to generate a lower voltage level than that of the negative power source, in order to completely shut down the pull-down transistors of the output module. 30 stages of the proposed gate driver are fabricated on glass substrate. It is shown that the gate driver successfully achieves full swing output signals at different clock frequencies (6.67 kHz, 66.7 kHz) and negative power sources (−4 V, −5 V, −6 V) with resistive load RL = 3 kΩ and capacitive load CL = 30 pF. The measured power consumption per stage of the proposed gate driver is 101 μW at the clock frequency of 66.7 kHz. [ABSTRACT FROM AUTHOR]

In this study, high performance amorphous In–Ga–Zn–O (a-IGZO) TFTs were successfully fabricated with inkjet-printed silver source-drain electrodes. The results showed that increased channel thickness has an improving trend in the properties of TFTs due to the decreased contact resistance. Compared with sputtered silver TFTs, devices with printed silver electrodes were more sensitive to the thickness of active layer. Furthermore, the devices with optimized active layer showed high performances with a maximum saturation mobility of 8.73 cm2 · V−1 · S−1 and an average saturation mobility of 6.97 cm2 · V−1 · S−1, Ion/Ioff ratio more than 107 and subthreshold swing of 0.28 V/decade, which were comparable with the analogous devices with sputtered electrodes. [ABSTRACT FROM AUTHOR]

Thin-film transistors (TFTs) with solution-processed scandium (Sc) substituted indium oxide (ScxIn1−xO3, ScInO) thin films based on environmental friendly water-induced precursor were fabricated. As the Sc concentration increases from 0% to 10%, the mobility decreases from 23.7 cm2 V−1 s−1 to 6.4 cm2 V−1 s−1, which is attributed to the non-overlapping of the Sc3+ electron orbit. However, the off current decreases and the turn-ON voltage (VON) shifts towards the positive direction as the Sc content increases, which indicates lower carrier density after incorporation of Sc into In2O3. More interestingly, the incorporation of Sc into In2O3 can effectively improve the electrical stability of the TFT devices under gate bias stress, which is attributed to the reduction of the number of oxygen vacancies due to the relatively low standard electrode potential (−2.36) of Sc and strong bonding strength of Sc–O (680 kJ mol−1). The reduction of oxygen vacancies is confirmed by the x-ray photoelectron spectroscopy (XPS) experiments. [ABSTRACT FROM AUTHOR]

Thin-film transistors (TFTs) using indium zinc oxide as the active layer and anodic aluminium oxide (Al2O3) as the gate dielectric layer were fabricated. The device showed an electron mobility of as high as 10.1 cm2 V[?]1 s[?]1, an on/off current ratio of as high as [?]108, and a turn-on voltage (Von) of only [?]0.5 V. Furthermore, this kind of TFTs was very stable under positive bias illumination stress. However, when the device experienced negative bias illumination stress, the threshold voltage shifted to the positive direction. It was found that the instability under negative bias illumination stress (NBIS) was due to the electrons from the Al gate trapping into the Al2O3 dielectric when exposed to the illuminated light. Using a stacked structure of Al2O3/SiO2 dielectrics, the device became more stable under NBIS. [ABSTRACT FROM AUTHOR]