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We report for the first time, an improvement in post-cycling low resistance state retention of oxide-based resistive RAM devices by injecting copper into the oxygen vacancy conducting filament. Through first principle simulations, we find that copper encounters a larger population of high kinetic diffusion barriers than oxygen vacancies resulting in an improved low resistance state retention.

Nonvolatile memory devices based on filamentary resistance switching (RS) areamong the frontrunners to fuel future devices and sensors of the internet of things (IoT) era. The capability of many metal-insulator-metal cells to switch between two distinctive resistive states in response to an external electrical stimulus has been demonstrated. Through years of selection, cells based on the drift of metal ions, namely conductive-bridge memory devices, have shown a wide range of applications with nanosecond switching speeds, nanometer scalability, high-density, and low power-consumption. However, for low (sub-10-μA) current operation, a critical challenge is still represented by programming variability and by the stability of the conductive filament over time. Here, by introducing the concept of reverse filament growth (RFG), we managed to control the structural reconfiguration of the conductive filament inside a memory cell with significant enhancements of each of the aforementioned properties. A first-in-class Cu-based switching device is demonstrated, with a dedicated stack that enabled us to systematically trigger RFG, thus tuning the device’s properties. Along with nanosecond switching speeds, we achieved an endurance of up to 106 cycles with a 102 read window, with outstanding disturb immunity and optimal stability of the filament over time. Furthermore, by tuning the filament’s shape, an excellent control of multi-level bit operations was achieved. Thus, this device offers high flexibility in memory applications.

We analyze the switching and retention properties of 65-nm integrated Cu(-Ge-Te)/(Ta)/GeSe conductive bridge random access memory devices operated at $50~\mu \text{A}$ . We evidence the crucial role played by a Ta buffer layer inserted between the Cu alloy and GeSe layers in decreasing the preforming current and in significantly improving the low-resistance state retention. Cu alloys of different compositions are tested to reveal lower device variability and longer retention with Cu2GeTe3 active electrode.

This study is focused on Conductive Bridging Random Access Memory (CBRAM) devices based on chalcogenide electrolyte and Cu-supply materials, and aims at identifying the key material parameters controlling memory properties. The CBRAM devices investigated are integrated on CMOS select transistors, and are constituted by either Ge-Se or Ge-Te electrolyte layers of various compositions combined with a Cu2GeTe3 active chalcogenide electrode. By means of extensive physical and electrical characterization, we show for a given electrolyte system that slower write is obtained for a denser electrolyte layer, which is directly correlated with a lower atomic percentage of the chalcogen element in the layer. We also evidence that the use of Ge-Se electrolyte results in larger write energy (voltage and time), however with improved state retention properties than for Ge-Te electrolyte materials. We associate these results with the stronger chemical bonding of Cu with Se, resulting both in a stabilized Cu filament and a slower Cu cation motion. More robust processing thermal stability is also observed for Ge-Se compared to Ge-Te compounds, allowing more flexibility in the integration flow design. ispartof: FARADAY DISCUSSIONS vol:213 issue:0 pages:67-85 ispartof: location:England status: published

© 2015 Elsevier B.V. All rights reserved. The impact of different Ru precursors and/or deposition methods on the electrical characteristics of Ru/SrTiOx/Ru capacitors has been investigated. The observed increase of the leakage current density (Jg) and the equivalent oxide thickness (EOT) for ALD (atomic layer deposition) deposited Ru layers compared to PVD (physical vapor deposition) deposited ones was found to be caused by a SrRuTiOx layer formation at the SrTiOx/Ru interface aided by the presence of the oxygen co-reactant used during the ALD, regardless of the precursor used. publisher: Elsevier articletitle: Understanding the EOT–Jg degradation in Ru/SrTiOx/Ru metal–insulator–metal capacitors formed with Ru atomic layer deposition journaltitle: Microelectronic Engineering articlelink: http://dx.doi.org/10.1016/j.mee.2015.04.076 content_type: article copyright: Copyright © 2015 Elsevier B.V. All rights reserved. ispartof: Microelectronic Engineering vol:147 pages:108-112 ispartof: location:ITALY, Udine status: published

Display Omitted Metal-Insulator-Metal capacitors with strontium titanate and ruthenium electrodes.EOT=0.38nm @ 0V and current density 10-7Acm-2 @ ?1V and 25?C.J-V and C-V behavior modeled with defects and multi-phonon trap-assisted-tunneling.Relaxation measurement indicate charge loss of 6.5% @ 1s and 25?C. The electrical properties of Ru/SrTiOx/Ru capacitors have been investigated. Equivalent Oxide Thickness (EOT) of 0.38nm at 0V and current density of 10-7Acm-2 at ?1V and 25?C meet the sub-20nm DRAM requirements. Relaxation measurements were performed, indicating acceptable charge loss. Modeling of charge trapping at defect sites based on multi-phonon trap-assisted-tunneling quantitatively well describes leakage and capacitance behavior.

The resistive random-access memory (RRAM) device concept is close to enabling the development of a new generation of non-volatile memories, provided that their reliability issues are properly understood. The design of a RRAM operating with extrinsic defects based on metallic inclusions, also called conductive bridge RAM, allows the use of a large spectrum of solid electrolytes. However, when scaled to device dimensions that meet the requirements of the latest technological nodes, the discrete nature of the atomic structure of the materials impacts the device operation. Using density functional theory simulations, we evaluated the migration kinetics of Cu conducting species in amorphous $$\hbox {AlO}_{\mathrm{x}}$$ and $$\hbox {WO}_{\mathrm{x}}$$ solid electrolyte materials, and established that atomic disorder leads to a large variability in terms of defect stability and kinetic barriers. This variability has a significant impact on the filament resistance and its dynamics, as evidenced during the formation step of the resistive filament. Also, the atomic configuration of the formed filament can age/relax to another metastable atomic configuration, and lead to a modulation of the resistivity of the filament. All these observations are qualitatively explained on the basis of the computed statistical distributions of the defect stability and on the kinetic barriers encountered in RRAM materials.

In this letter we optimize Ta2O5-based resistive-switching memory cells for improved retention properties. We show that the electrode material used as oxygen-scavenging element directly controls the state stability. As compared to TiN\Ta2O5\Ti cells the conductive filament retention is improved for TiN\Ta2O5\Ta cells due to the lower oxygen affinity of Ta. The oxygen chemical potential profile along the filament is also modulated by the Ta thickness, allowing reaching excellent retention of both low- and high-resistance states for several weeks at 250°C.

In this paper, we optimize a WO3\Al2O3 bilayer serving as the electrolyte of a conductive bridge RAM device using a Cu-based supply layer. By introducing a WO3 layer formed by thermal oxidation of a W plug, the hourglass shape of the conductive filament is desirably controlled, enabling excellent switching behavior. We demonstrate a clear improvement of the microstructure and density of the WO3 layer by increasing the oxidation time and temperature, resulting in a strong increase of the high-resistance-state breakdown voltage. The high quality WO3 microstructure allows thus the use of a larger reset pulse amplitude resulting both in larger memory window and failure-free write cycling.

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