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Anxiety disorders are a major public health concern in China. Previous studies have provided evidence for associations between ambient temperature and anxiety outpatient visits, but no studies have examined short-term effects of other meteorological factors such as sunshine duration, wind speed and precipitation on increased anxiety outpatient visits. We aimed to assess the association between climatic factors and outpatient visits for anxiety in Suzhou, a city with a temperate climate in Anhui Province, China. Daily anxiety outpatient visits, meteorological factors, and air pollutants from 2017 to 2019 were collected. A quasi-Poisson generalized linear regression model combined with distributed lag non-linear model (DLNM) was used to quantify the effects of extreme meteorological factors (sunshine duration, wind speed and precipitation) on anxiety outpatient visits. All effects were presented as relative risk (RR), with the 90th and 10th percentiles of meteorological factors compared to the median. Subgroup analyses by age and gender were performed to identify susceptible subgroups. A total of 11 323 anxiety outpatient visits were reported. Extremely low sunshine duration, low and high speed speed increased the risk of anxiety outpatient visits. The strongest cumulative effects occurred at lag 0–14 days, and the corresponding RRs of extremely low sunshine duration, low and high wind speed were 1.417 (95% CI: 1.056–1.901), 1.529 (95% CI: 1.028–2.275) and 1.396 (95% CI: 1.007–1.935), respectively. Subgroup analyses showed that males and people aged ≥ 45 years appeared to be more susceptible to the cumulative effects of extremely low sunshine duration. In addition, the adverse effects of extreme wind speed were more pronounced in the cold season. This study provides evidence that extreme climatic factors have a lagged effect on anxious outpatient visits. In the context of climate change, these findings may help develop weather-based early warning systems to minimize the effects of extreme meteorological factors on anxiety.

Background Left-behind children in China, who live without one or both parents due to migration, are highly susceptible to various physical and mental health issues, including injuries. The promotion of their well-being and the reduction of harm incidences depend on crucial factors such as social support, self-esteem, and resilience. However, the underlying mechanisms for achieving these goals remain unclear. Objective The purpose of this study is to investigate the chain-mediating effects of self-esteem and psychological resilience between perceived social support and the number of injuries experienced in the last year among left-behind children in order to establish a foundation for the development of effective injury prevention strategies. Methods The survey data for this study was collected from 1005 left-behind children in the Chaoshan region, China, between September 2019 and September 2020. The survey included the Juvenile Victimization Questionnaire Revised 2 (JVQ R2), as well as the Rosenberg Self-Esteem Scale, Perceived Social Support Scale, and Psychological Resilience Scale. Chain-Mediating effect was worked out by using AMOS structural equation model (SEM), and the significance of mediation was examined by bootstrap. Results (1) A linear regression analysis showed that perceived social support was positively correlated with self-esteem (r=0.25, PConclusions The findings of this study suggest that social support can reduce the risk of injury of left-behind children in the Chaoshan region, and indirectly reduce the risk of injury of left-behind children through the chain-mediating effect of self-esteem and psychological resilience. Thus, enhancing the perceived social support, self-esteem, and psychological resilience of left-behind children may promote their physical and mental well-being and lower their vulnerability to injuries.

This paper presents an algorithmic approach to design reliable deep neural networks (DNN) in the presence of stochastic variations in the network parameters induced by process variations in the bit-cells in a processing-in-memory (PIM) architecture. We propose and derive a Hessian based sensitivity metric that can be computed without computing or storing the full Hessian to identify and protect the “important" network parameters while allowing large variations in unprotected parameters. We also show that this metric can be used to aggressively quantize unprotected network parameters in the PIM for improved inference efficiency and compute density. Experiments on modern DNNs like ResNet, MobileNetv2, DenseNet on CIFAR10 using measured RRAM device data shows the effectiveness of our approach.

As AI applications become pervasive on edge device, incrementally learning new tasks is demanded for deep neural network (DNN) models. In this article, we proposed AILC, a compute-in-memory (CIM)-based accelerator for on-chip incremental learning using STT-MRAM technology. On the software side, a network-expansion-based low-precision training algorithm is proposed for incremental learning, where the loss function is modified to handle the unbalanced training dataset. On the hardware side, the detailed CIM accelerator design for incremental learning is illustrated. A workload-aware hardware resources assignment protocol is proposed to improve the throughput when the workload of weight gradient calculation is low. The software simulation results on CIFAR-100 dataset show that the proposed algorithm can effectively support incremental learning despite the device conductance variation exists. System-level benchmark shows that AILC could achieve 147×, 3.7×∼28.7×, 2.05×∼2.9× higher energy efficiency than Nvidia Titan-V GPU, RRAM-based CIM accelerators and edge TPU/GPU, respectively. Compared to the baselines, the throughput of AILC is improved by 2.0×∼2.2× on average with the hardware resources assignment protocol, which results in 4.1×∼21.4× higher throughput than edge TPU/GPU.

To efficiently deploy machine learning applications to the edge, compute-in-memory (CIM) based hardware accelerator is a promising solution with improved throughput and energy efficiency. Instant-on inference is further enabled by emerging non-volatile memory technologies such as resistive random access memory (RRAM). This paper reviews the recent progresses of the RRAM based CIM accelerator design. First, the multilevel states RRAM characteristics are measured from a test vehicle to examine the key device properties for inference. Second, a benchmark is performed to study the scalability of the RRAM CIM inference engine and the feasibility towards monolithic 3D integration that stacks RRAM arrays on top of advanced logic process node. Third, grand challenges associated with in-situ training are presented. To support accurate and fast in-situ training and enable subsequent inference in an integrated platform, a hybrid precision synapse that combines RRAM with volatile memory (e.g. capacitor) is designed and evaluated at system-level. Prospects and future research needs are discussed.

Physarum polycephalum, a unicellular and multiheaded slime mould, can form highly efficient networks connecting separated food sources during the process of foraging. These adaptive networks exhibit a unique characteristic in that they are optimized without the control of a central consciousness. Inspired by this phenomenon, we present an efficient exploration and navigation strategy for a swarm of robots, which exploits cooperation and self-organisation to overcome the limited abilities of the individual robots. The task faced by the robots consists in the exploration of an unknown environment in order to find a path between two distant target areas. For the proposed algorithm (EAIPP), we experimentally present robustness tests and obstacle tests conducted to analyse the performance of our algorithm and compare the proposed algorithm with other swarm robot foraging algorithms that also focus on the path formation task. This work has certain significance for the research of swarm robots and Physarum polycephalum. For the research of swarm robotics, our algorithm not only can lead multirobot as a whole to overcome the limitations of very simple individual agents but also can offer better performance in terms of search efficiency and success rate. For the research of Physarum polycephalum, this work is the first one combining swarm robots and Physarum polycephalum. It also reveals the potential of the Physarum polycephalum foraging principle in multirobot systems.

The requirement of multilevel cell (MLC) resistive random access memory (RRAM) for computing is different than that for MLC storage. It generally requires a linearly spaced conductance median and an ultratight conductance distribution, as the column current are summed up for analog computation. In this article, 3-bit per cell RRAM that is suitable for accurate inference of a deep neural network (DNN) is demonstrated, with ultratight conductance distribution ( $5.3 \times $ and $4.4 \times $ , respectively, compared to the 3-bit per cell RRAM used as MLC storage.

Compute-in-memory (CIM) with emerging non-volatile memories (eNVMs) is time and energy efficient for deep neural network (DNN) inference. However, challenges still remain for DNN in-situ training with eNVMs due to the asymmetric weight update behavior, high programming latency and energy consumption. To overcome these challenges, a hybrid precision synapse combining eNVMs with capacitor has been proposed. It leverages the symmetric and fast weight update in the volatile capacitor, as well as the non-volatility and large dynamic range of the eNVMs. In this article, DNN in-situ training architecture with hybrid precision synapses is proposed and system level benchmarked is conducted. First, the circuit modules required for in-situ training with hybrid precision synapses are designed and the system architecture is proposed. Then, the impact of different weight precision configurations, weight transfer interval and limited capacitor retention time on training accuracy is investigated by incorporating hardware properties into Tensorflow simulation. Finally, the system-level benchmark is conducted at 32nm technology node in the modified NeuroSim simulator for hybrid precision synapse, in comparison with the baseline designs that are solely based on eNVMs or SRAM technology. The benchmark results show that CIM accelerator based on hybrid precision synapse achieves at least 3.07x and 2.89x better energy efficiency for training compared with its eNVM counterparts and SRAM technology at 32nm node, respectively. 227x and 33.8x better energy efficiency are obtained when compared to GPU and TPU. The scaling trend of hybrid precision synapse is projected towards 7nm node and comparison with state-of-the-art 7nm SRAM technology is made.

The multilevel resistive random access memory (RRAM)-based synaptic array can enable parallel computations of vector–matrix multiplication for machine learning inference acceleration; however, any conductance drift of the cell may induce an inference accuracy drop because the analog current is summed up along the column. In this article, the read disturb-induced conductance drift characteristic is statistically measured on a test vehicle based on 2-bit HfO2 RRAM array. The drift behavior of four states is empirically modeled by a vertical and lateral filament growth mechanism. Furthermore, a bipolar read scheme is proposed and tested to enhance the resilience against the read disturb. The modeled read disturb and proposed compensation scheme are incorporated into a VGG-like convolutional neural network for CIFAR-10 data set inference.

One of the main issues of EUV lithography is Line Edge Roughness (LER) on photo-resists, which significantly impacts yield at sub-30 nm pitches. In this work, an analytical model of LER is presented and analyzed for yield loss induced by open/short failures, cut mask defects, enhanced time dependent dielectrics breakdown (TDDB) failures for metal wires with different geometries, electro-migration (EM) impacts from the presence of LER on SRAM bitlines, and finally, LER impacts on functional errors. The model will be evaluated on single and double patterned designs with metal pitches of 24 and 28 nanometers. We show experimental results and give specific criteria in which LER thresholds can be relaxed without negatively impacting yield and path delay. This is a critical issue as higher LER tolerance allows exponential increase in throughput and thus reduces cost of fabrication.

Resistive RAM (RRAM) has been presented as a promising memory technology toward deep neural network (DNN) hardware design, with nonvolatility, high density, high ON/OFF ratio, and compatibility with logic process. However, prior RRAM works for DNNs have shown limitations on parallelism for in-memory computing, array efficiency with large peripheral circuits, multilevel analog operation, and demonstration of monolithic integration. In this article, we propose circuit-/device-level optimizations to improve the energy and density of RRAM-based in-memory computing architectures. We report experimental results based on prototype chip design of 128 × 64 RRAM arrays and CMOS peripheral circuits, where RRAM devices are monolithically integrated in a commercial 90-nm CMOS technology. We demonstrate the CMOS peripheral circuit optimization using input-splitting scheme and investigate the implication of higher low resistance state on energy efficiency and robustness. Employing the proposed techniques, we demonstrate RRAM-based in-memory computing with up to 116.0 TOPS/W energy efficiency and 84.2% CIFAR-10 accuracy. Furthermore, we investigate four-level programming with single RRAM device, and report the system-level performance and DNN accuracy results using circuit-level benchmark simulator NeuroSim.

Fault diagnosis is of great significance to improve the production efficiency and accuracy of industrial robots. Compared with the traditional gradient descent algorithm, the extreme learning machine (ELM) has the advantage of fast computing speed, but the input weights and the hidden node biases that are obtained at random affects the accuracy and generalization performance of ELM. However, the level-based learning swarm optimizer algorithm (LLSO) can quickly and effectively find the global optimal solution of large-scale problems, and can be used to solve the optimal combination of large-scale input weights and hidden biases in ELM. This paper proposes an extreme learning machine with a level-based learning swarm optimizer (LLSO-ELM) for fault diagnosis of industrial robot RV reducer. The model is tested by combining the attitude data of reducer gear under different fault modes. Compared with ELM, the experimental results show that this method has good stability and generalization performance.

In-memory computing with analog nonvolatile memories can accelerate the in situ training of deep neural networks. Recently, we proposed a synaptic cell of a ferroelectric transistor (FeFET) with two CMOS transistors (2T1F) that exploit the hybrid precision for training and inference, which overcomes the challenges of nonlinear and asymmetric weight update and achieves nearly software comparable training accuracy at the algorithm level. In this paper, we further present the circuit-level benchmark results of this hybrid precision synapse in terms of area, latency, and energy. The corresponding array architecture is presented and the array-level operations are illustrated. The benchmark is conducted by multilayer-perceptron (MLP) + NeuroSim framework with comparison to other capacitor-assisted (e.g., 3T1C + 2PCM) hybrid precision cell. The design tradeoffs and scalability are discussed between different implementations.

A versatile multiphysics simulation packet for investigating different resistive random acces memories (RRAMs) is developed in this paper. Heat transfer, electrical conduction, and ion migration in such heterogeneous structure are all taken into consideration. Three fully coupled partial differential equations are solved using our self-developed finite-difference algorithm, where Scharfetter–Gummel method is adopted to simulate ion migration with fast convergence achieved. This packet is validated in comparison with the commercial software based on the finite-element method. With its implementation, complete and clear pictures for crosstalk effect in vertically integrated RRAM are captured and compared, where the effects of key physical and geometrical factors are characterized and understood. Some useful suggestions to mitigate its unfavorable influences are given.

Resistive random access memory (RRAM) is a promising candidate for next generation nonvolatile memory technology. In this paper, electrothermal simulation in 3-D RRAM arrays is performed by using our in-house developed finite difference algorithm, which is validated by comparing the simulated temperature distribution with its counterpart obtained by commercial software. Both crossbar RRAM array and vertical RRAM array are studied comprehensively with careful consideration of the temperature-dependent constitute parameters. Simulations show that the temperature and thermal crosstalk are sensitive to the size and shape of conductive filament, which can further limit the scaling potential of RRAM array through affecting its reliability, such as retention time, current leakage, and so on. Scaling behavior of 3-D RRAM array is studied, and optimization guidance for reducing thermal crosstalk is proposed. The fabrication inaccuracy resulted cell offset has also been examined for investigation of thermal crosstalk.

On-chip learning with compute-in-memory (CIM) paradigm has become popular in machine learning hardware design in the recent years. However, it is hard to achieve high on-chip learning accuracy due to the high nonlinearity in the weight update curve of emerging nonvolatile memory (eNVM) based analog synapse devices. Although digital synapse devices offer good learning accuracy, the row-by-row partial sum accumulation leads to high latency. In this paper, the methods to solve the aforementioned issues are presented with a device-to-algorithm level optimization. For analog synapses, novel hybrid precision synapses with good linearity and more advanced training algorithms are introduced to increase the on-chip learning accuracy. The latency issue for digital synapses can be solved by using parallel partial sum read-out scheme. All these features are included into the recently released MLP + NeuroSimV3.0, which is an in-house developed device-to-system evaluation framework for neuro-inspired accelerators based on CIM paradigm.

At UCLA Center for Heterogeneous Integration and Performance Scaling (CHIPS), we have been developing a fine pitch heterogeneous wafer-scale platform with a single level of hierarchy called the silicon interconnect fabric (Si-IF). The Si-IF is a platform for heterogeneous integration of different bare dies at fine pitch (2 to 10 µm) and close proximity (

In this paper, a dual-mode buffer memory based on the CMOS compatible HfZrO2 ferroelectric material is proposed for DNN accelerators. It can operate in both volatile eDRAM mode and non-volatile ferroelectric RAM (FeRAM) mode. The functionality of the proposed dual-mode memory bit-cell design is verified using SPICE simulation with the multi-domain Preisach physical model. A data-lifetime-aware memory mode configuration protocol is proposed to optimize the buffer access energy for both DNN inference and training. Detailed circuitry and architectural support for the dual-mode memory are discussed. For DNN training with ferroelectric-field-effect-transistor (FeFET) and SRAM-based compute-in-memory (CIM) accelerator, the proposed dual-mode buffer design improves the overall energy efficiency by 92.2%~98.7%, 44.1%~47.6%, 12.6%~13.0% compared to baseline designs using SRAM buffer with the same buffer area, eDRAM and FeRAM with the same buffer capacity, respectively. For DNN inference with tensor-processing-unit (TPU)-like systolic array, the energy efficiency during computing is improved by 40.7%~45.6%, 18.4%~29.6% compared to the designs with eDRAM and FeRAM buffer, respectively. By storing the persistent data using the non-volatile mode, the energy efficiency of systolic array is improved by 2.3~5.5 over SRAM-based design when standby is frequent.

Swarm robotics refers to artificial swarm systems composed of a large number of autonomous mobile robots with relatively simple structures and functions. One of the basic problems of swarm robotics involves the target search process, which entails a cooperative search using limited perception and local interaction of robots under a self-organizing mechanism. When communication is limited, the connectivity of swarm robotics may decrease, leading to the failure of the target search task. This article describes a new target search method based on the robot chain model and the elimination mechanism. The proposed method allows the target search task to be completed efficiently and reliably while maintaining the connectivity of the robots. Experimental results show that the proposed algorithm offers better performance than conventional techniques in terms of search speed and success rate, and provides an effective method for solving the target search problem using swarm robotics in limited-communication environments.