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A new type of high-voltage termination, namely the “deep p-ring trench” termination design for high-voltage, high-power devices, is presented and extensively simulated. Termination of such devices consumes a large proportion of the chip size; the proposed design concept not only reduces the termination silicon area required but also removes the need for an additional mask as is the case of the traditional p+ ring-type termination. Furthermore, the presence of the p-ring under and around the bottom of the trench structure reduces the electric field peaks at the corners of the oxide, which results in reduced hot carrier injection and improved device reliability.

The planar Integrated Gate Commutated Thyristor (IGCT) concept is proposed to simplify the fabrication process of the device and improve the ruggedness as well as electrothermal performance of the device. The planar IGCT concept has been verified experimentally with 4.5kV devices fabricated on 4-inch Si wafers. Afterwards, the electrical characteristics of the planar IGCT were compared with that of the conventional (with trench or mesa gate) IGCT. Both the planar and the conventional IGCTs are fabricated with corrugated p-base referred to as High Power Technology (HPT) design. In addition, mixed-mode TCAD device simulations have been performed to verify the turn-off failure mechanism and to analyze the electro-thermal performance of the planar IGCT in reference to that of the conventional IGCT.

An antiparallel thyristor concept is introduced, where each thyristor occupies the whole silicon wafer This is achieved by full interdigitation of anode and cathode lateral and vertical structures of the antiparallel thyristors. The p-type cathode shorts on one wafer side serve as anode regions on the opposite side. This concept provides AC switch with turn-ON by any of the two gates and turn-off only after the load current ceased. Using an optimized irradiation procedure, we obtain device with turn-off capability called BiPCT. There the antiparallel thyristors show the recovery charge $\textbf{Q}_{rr} \lt 3000 {\mu}$As and commutation turn-off time $\textbf{t}_{\mathbf{q}}\lt 100 \mu \text{s}$ as experimentally demonstrated at four-inch 8.5 kV silicon devices. The concept is suitable for both Si and SiC.

In this letter, we present the “anode-side” SuperJunction trench field stop+ IGBT concept with drift region SuperJunction pillars placed at the anode side of the structure rather than the cathode side. The extent of the pillars toward the cathode side is shown to pose a tradeoff between fabrication technology capabilities (and cost) versus the device performance, by extensive TCAD simulations. The proposed device structure simplifies the fabrication requirements by steering clear from the need to align the cathode side features with the SuperJunction pillars. It also provides an extra degree of freedom by decoupling the cathode design from the SuperJunction structure. Additionally, the presence of SuperJunction technology in the drift region of the “anode-side” SJ Trench FS+ IGBT results in 20% reduction of ON-state losses for the same switching energy losses or, up to 30% switching losses reduction for the same ON-state voltage drop, compared with a 1.2-kV breakdown rated conventional FS+ Trench IGBT device. The proposed structure also finds applications in reverse conducting IGBTs, where a reduced snapback can be achieved, and in MOS-controlled thyristor devices.

A new design approach for bi-mode gate-commutated thyristors (BGCTs) is proposed for high-current controllability and low ON-state voltage drop. Using a complex multi-cell mixed-mode simulation model which can capture the maximum controllable current (MCC) of large area devices, a failure analysis was performed to demonstrate that the new design concept can increase the MCC by about 27% at room temperature and by about 17% at 400 K while minimizing the ON-state voltage drop. The simulations depict that the improvement comes from the new approach to terminate the GCT part in the BGCT way of intertwining GCT and diode regions for reverse conducting operation.

In this paper, we present and discuss simulation and experimental results obtained from investigating the impact of local alterations of the electric field profile in the power device planar junction termination region. Such local modifications are due to possible various extrinsic causes (manufacturing, operational or environmental) and are shown to have a critical influence on the device voltage blocking capability and reliability. The results point towards junction termination sensitivity to locally modified fields especially under voltage switching conditions due to higher leakage current densities in the modified area compared to the rest of the JT region.

The Bi-mode Gate Commutated Thyristor (BGCT) is an advanced reverse conducting device aiming high power applications. Due to the high degree of interdigitation of diode parts and Gate Commutated Thyristor (GCT) parts, it is necessary to investigate how to best separate the two and at the same time, how to maximise the individual power handling capability. This work underpins the latter, for the GCT part. In achieving that, this letter details the optimisation direction, identifies the design parameters that influence the Maximum Controllable Current (MCC) and thereafter introduces a new design attribute, the “p-zone”. This new design not only improves the MCC at high temperature, but also at low temperature, yielding temperature independent current handling capability and at least 1000 A, or 23.5 % of improvement compared to the state-of-the-art. As a result, the proposed design constitutes an enabler for optimally designed bi-mode devices rated at least 5000 A for applications with the highest power requirement.

The cross hybrid (XS) concept has been demonstrated experimentally with 3.3-kV Si Insulated Gate Bipolar Transistor (IGBTs) and SiC MOSFETs in parallel, and used to calibrate 2D Technology Computer Aided Design simulations. The XS hybrid offers lower switching losses compared with full Si IGBTs and reduced oscillations compared with full SiC MOSFETs. The current sharing mechanism between the IGBT and the MOSFET in the XS hybrid has been elucidated, showing that under typical switching conditions, the IGBT dissipate 98% of the XS hybrid turn-OFF losses compared with the SiC MOSFET. Since the current density of the IGBT in the XS hybrid is twice of that of the full IGBT solution, it exhibits higher dynamic avalanche. These features results in stress at device and package level, thereby compromising robustness and reliability. In order to overcome such issues, we show that increasing the turn-OFF gate resistance improves current sharing in the XS hybrid by delaying the turn-OFF of the MOSFET, and thereby suppressing dynamic avalanche in the IGBT.

A large area (150mm) high voltage (6.5kV) Reverse Conducting-Integrated Gate Commutated Thyristor (RC-IGCT) has been developed for low frequency high power electronics applications. The devices were fabricated with GCT to diode active area ratio of 1.4. The RC-IGCT wafers were designed with an outer ring gate structure to minimize the stray impedance for the gate signal and also to improve the thermal behavior of the device. In addition, the HPT+ (High Power Technology) platform has been employed in the GCT part to increase the safe operation area of the device (to achieve high controllable turn-off current capability). In this paper we present the measurement results of the 150mm, 6.5kV RC-IGCT during conduction and turn-off in both GCT (switch)- and diode-modes of operation. In addition, we have compared the technology trade-off curve of the 150mm, 6.5kV RC-IGCT with the state-of-the-art 6.5kV HiPak IGBT modules in switch-mode.

An approach to implement electrically robust MOSFETs in a functioning half-bridge will be investigated. For the first time, reverse conducting 3.3kV SiC MOSFETs have been fabricated with dilferent cell pitches from 14μm (p1.0) to 26μm (pl.8) that are able to withstand short circuit pulse of up to 10μs and a 9ms surge current event up to 15x the nominal current. LinPak half-bridge modules have been fabricated showing reduction of the switching loss by more than 90% compared to a silicon IGBT/diode half bridge.

This paper presents an experimental investigation of the dynamic performance of SiC 6.5kV JBS diodes. Using a hybrid Si SPT IGBT/SiC JBS diodes combination, we have analyzed the turn-off behavior limits of SiC JBS diodes and compared the result against a state-of-the-art Si PiN diode. The experimental results show that the JBS diodes can handle about 40A/chip at 125°C before going into thermal runaway. This maximum turn-off current value increases by about 50% when the diodes are operated at room temperature. The diodes dI/dt behaviour appear to be virtually independent of the DC-link voltage (at R G =18Ω). The comparison between turn-off curves for 6.5kV SiC and Si diodes shows that the use of SiC JBS diodes reduces the reverse recovery losses by more than 98%.

In this paper, we present for the first time, the experimental results of a “Bimode Cross Switch (BXS)-Hybrid” built with 3.3kV Silicon Enhanced Trench Bi-mode IGBTs (Si-ET-BIGT) and Silicon Carbide MOSFETs (SiC-MOSFET). Also, we have compared the static (on-state) and dynamic (switching) characteristics of the 3.3kV BXS-Hybrid (1 × Si-ET-BIGT + 2 × SiC-MOSFET) with the full SiC-MOSFET (4 × SiC-MOSFET) and full Si-ET-BIGT (2 × Si-ET-BIGT) reference samples. In addition, we have investigated the MOS gate control (blanking time tbl) influence in diode-mode during reverse recovery of the BXS-Hybrid and compared the results to those of the full Si-ET-BIGT. The experimental results show that BXS-Hybrid offers 45% and 75% reduction in the turn-off losses (in switch-mode) compared to full Si-ET-BIGT at nominal current (125A) and half-nominal current, respectively for nearly the same on-state voltage drop (at nominal current) or even much lower (at half nominal current). Also, the results show that the BXS-Hybrid offers 46% and 49% reduction in the reverse recovery losses (in diode-mode) compared to full Si-ET-BIGT at nominal current and half-nominal current, respectively. Furthermore, the results show that the reverse recovery losses can be reduced as much as 55% with the BXS-Hybrid compared to that of the full Si-ET-BIGT if the MOS gate control technique is used (for the tbl of 2μs). In addition, the BXS-Hybrid eliminates or reduces the oscillations compared to full SiC-MOSFET solution. In this study, the MOS gates of the devices in the BXS-Hybrid were connected together and controlled by the same single gate unit (with one common gate resistor).

The Bi-mode Gate Commutated Thyristor (BGCT) is a reverse conducting Gate Commutated Thyristor (GCT) where the diode regions are intertwined with GCT parts. In this work we examine the impact of shallow diode-anodes on the operation of the GCT and propose the introduction of optimised High Power Technology (HPT+) in the GCT part. In order to assess and compare the new designs with the conventional, a multi-cell mixed mode model for large area device modelling was used. The analysis of the simulation results show that the shallow diode does not affect the MCC whereas the introduction of the HPT+ allows for a step improvement.