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In this letter, a reconfigured switched-capacitor converter (SCC) is proposed that is capable of achieving seven negative voltage conversion ratios (VCRs) using only three flying capacitors and min...

This paper focuses on the operation of hybrid modular multilevel converter and proposes an effective approach that guarantees the full performance of the converter even in post-fault condition. The main novelty of this paper is utilizing negative arm voltage levels in a way to compensate the missed voltage. After the fault occurrence, the DC component of the arm voltages as well as the DC-link voltage are adjusted based on the fault states to restore the nominal balanced line-to-line voltage in the post-fault condition. In comparison with the previous methods, the proposed method does not add any hardware to the circuit to restore the nominal output voltage. The capacitor voltage of submodules, also, does not increase after fault occurrence. Therefore, the converter can maintain its nominal line-to-line voltage in post-fault condition without extra implementation costs or overdesign requirements. To validate the effectiveness of the proposed method, detailed simulation and experimental results are provided.

A magnetically isolated MOSFET driving circuit based on a driving transformer has been widely used in aerospace secondary power supplies. Based on the analysis of two typical magnetically isolated driving circuits, a new type of driving circuit is proposed. This circuit has the characteristics of zero negative voltage, high reliability, and wide duty cycle operating range. It is very suitable for a new generation of aerospace high-efficiency high-power-density power supply topology, and it has important significance for improving the efficiency of space borne secondary power supplies.

The present work investigates the OFF-state lateral band-to-band-tunneling (L-BTBT) phenomena in a buried-metal-layer (BML) based junctionless (JL) FET (BML-JL-FET). The impact of BML-workfunction and BML-voltage on the L-BTBT component of the gate-induced-drain leakage (GIDL) is studied via the 2-D TCAD simulations. The nature of Schottky junction formed at the bottom of the semiconductor device layer has also been investigated. We observe that the sufficiently high BML-workfunction, or high BML-workfunction with negative voltage, allows for excessive band bending at the bottom Si/BML interface, resulting in the accumulation of the opposite charge carriers (holes). If BML is not optimized, this accumulated holes contribute adversely to the L-BTBT current component of the device. In addition, the impact of BML acting as a secondary gate on the device characteristics has also been studied.

In the previous chapters we saw that both BTI and EM recovery can be activated and accelerated; these unique recovery behaviors can benefit future resilient digital systems if they are instrumented on chip. In this chapter, we discuss a set of circuit blocks that implement the required functionality for achieving accelerated and active self-healing on chip. Examples of such portable circuit IP blocks are negative voltage generators, reconfigurable heaters, wearout-aware power gating, bidirectional-current PDNs, and novel types of BTI and EM sensors. We present design details, functionality, and potential costs of each type of circuit. By implementing all or a subset of these circuit IPs, recovery can be enabled on chip with acceptable hardware costs.

The influence of electrodes on unipolar switching characteristics of a Pt/HfO2/Pt resistor with symmetric electrodes is investigated by comparing the reset voltage ( $V_{R})$ , set voltage ( $V_{S})$ , current at low resistance state ( $I_{\mathrm{ LRS}}$ ) and high resistance state ( $I_{\mathrm{ HRS}})$ , and $I_{\mathrm{ LRS}}/I_{\mathrm{ HRS}}$ with positive and negative voltage polarities. The values of $\pm V_{R}$ and $\pm V_{S}$ of the Pt/HfO2/Pt resistor for respective positive and negative polarities are very similarly distributed. Concerning current levels at two resistance states ( $I_{\mathrm{ LRS}}$ and $I_{\mathrm{ HRS}}$ ), however, unexpected asymmetric current characteristics of the Pt/HfO2/Pt symmetric resistor are observed. The asymmetric current behavior at the symmetric Pt/HfO2/Pt resistor indicates the role of different environments at top and bottom interfaces, although they are formed with the same electrode material using the same deposition method. Two types of interfaces, Pt/HfO2 and HfO2/Pt, are analyzed using X-ray photoelectron spectroscopy. The bottom interface of HfO2/Pt, postprocessed with insulating HfO2 film deposition, is probed nonstoichiometric HfO x and weak oxidation of Pt electrode and is influenced by the variation of the current levels and the current ratio at both high and low resistance states.

Devices that form low-temperature diffuse nanosecond-discharge plasma in a flow of various gases at the atmospheric pressure are described. To form diffuse plasma, negative voltage pulses with an amplitude of several tens of kilovolts and a duration of 5 ns were fed to a point–plane gap in the pulse–periodic mode. By varying the geometry of the discharge gap, the shape of the cathode, and the composition of the working gas, it is possible to obtain plasma with a wide range of parameters and modify the surfaces of various materials with areas of up to several tens of square centimeters.

Based on the space charge polarization theory, the reduced and bamboo-like layered TiO2 nanotube arrays were designed and prepared by the voltage pulse anodization technique including reduction process of negative voltage. The reduction process synchronously introduces amount of oxygen vacancies, and the bamboo-like layered structure provides a plenty of interfaces to accumulate large amounts of free charges in the TiO2 nanotube arrays, which greatly enhance the space charge polarization in the TiO2 nanotube arrays. Thus, the capacitances of the reduced and layered TiO2 nanotube arrays are clearly increased, which further lead to the obvious enhancement of the electrowetting-on-dielectric (EWOD) responses. Furthermore, the reduced TiO2 nanotube arrays with bamboo-like layered structure were successfully used as the visual sensor to detect the NaCl and glucose concentration. Especially, it has higher sensitivity for the detection of the NaCl and glucose solution with low concentration.

The reason of the near-surface layer formation in the Surface Dielectric Barrier Discharge driven by negative voltage pulse has been analysed numerically. According to calculations, the thickness of this layer is around 4μm in atmospheric pressure air; it is inversely proportional to gas density and does not depend on applied voltage value and dielectric parameters. The electric field value inside a layer depends on applied voltage and changes from 60 to 600kV/cm for negative voltage pulse amplitudes from 4.5 to 24kV.

SiC MOSFETs are well known for possessing lower losses compared with silicon MOSFETS or IGBTs. In order to drive them efficiently, suitable drivers must be designed. However, most commercially available drivers and drivers in literature are suitable for only a limited range of SiC MOSFETs due to limitations on the MOSFET's gate voltage ratings. Hence, the drivers do not allow the designer to easily experiment with different SiC MOSFET models. In this paper, a generic SiC gate driver with adjustable positive and negative voltage rail is presented. The performance of the proposed driver is compared with a commercially available driver through experiment and it is shown that the proposed gate driver is able to drive the chosen SiC MOSFET more efficiently. Accepted version

DC-DC converters are commonly used in power-conserving applications, like battery-operated equipment to regulate to a lower voltage, boost an input voltage or invert it to create a negative voltage. Efficiency is an important DC-DC converter characteristic as it may achieve efficiencies greater than 95% under optimum conditions. However, this efficiency is limited by dissipative losses in the components.

Neuro-stimulators have been widely used in neural disorder control. This work presents a four-channel stimulator with adjustable positive and negative stimulus voltage from ±0.5V to ±8V. In the proposed stimulator, circuit operation with negative voltage has been successfully realized in a 0.25-$\mu$ m 2.5V/5-V/12-V CMOS process with the grounded p-type substrate, and without suffering the p-n junction breakdown or electrical overstress issues. The proposed stimulator has been also practically verified with in-vivo animal test. By integrating the stimulator circuit with other circuit blocks together, the close-loop neuromodulation treatment can be implemented by an implantable system-on-chip (SoC) with low-power consumption.

We report on the morphological investigation of nanoscale thick patterns obtained by the scanning probe assisted local oxidation technique on graphene layers grown directly on Ge (100) substrates using CVD technique. Protruding mounds and lines are produced by applying a negative voltage to the atomic force microscope probe while translating the probe tip across the sample surface. The main features of the local oxide produced and the differences with respect to similar experiments conducted on Ge or Si samples are presented.

We studied the effect of bias voltage between slider and disk surfaces to reduce lubricant pickup by the slider. A perfluoropolyether (PFPE) lubricant film, which is coated on the disk surface, has been considered to be charged to a negative voltage by the airflow on the rotational disk surface. Because the PFPE lubricant film is negatively charged, the lubricant pickup should be reduced by a bias voltage with a negative voltage on the slider surface. We confirmed changes in the lubricant pickup in a lubricant pickup test conducted at different bias voltages. A positive voltage of the slider accelerated the lubricant pickup, whereas a negative voltage reduced it.

Frequency (100 ${\rm Hz}\le f \le 1$ MHz) and temperature ( $- 50 \le T \le 20^{\circ }\text{C}$ ) characteristics of low interface state density $D_{\rm {it}}$ high- $\kappa $ gate-stacks on n-InAs have been investigated. Capacitance–voltage ( $C$ – $V$ ) curves exhibit typical accumulation/depletion/inversion behavior with midgap $D_{\rm {it}}$ of $2\times 10^{11}$ and $4\times 10^{11}$ cm $^{-2}$ eV $^{-1}$ at −50 °C and 20 °C, respectively. Asymmetry of low-frequency s $C$ – $V$ curves and $C$ – $T$ dependence for negative voltage showing a sharp transition of $\cong -20$ dB/decade between low- and high-frequency behavior indicate surface inversion. An inversion carrier activation energy and an InAs hole lifetime of 0.32 eV and 2 ns have been extracted, respectively. Surface channel nMOSFETs with gate length $L_{g} =$ 1 $\mu \text{m}$ , channel thickness = 10 nm, and equivalent oxide thickness (EOT) $1 \le {\rm EOT} \le 1.6$ nm have been fabricated. For ${\rm EOT} = 1$ nm, a subthreshold swing $S = 65$ mV/decade, transconductance $g_{m} =1.6$ mS/ $\mu \text{m}$ , and ON-current $I_{{\mathrm{{\scriptscriptstyle ON}}}} =$ 426 $\mu \text{A}/\mu \text{m}$ at an OFF-current $I_{{\mathrm{{\scriptscriptstyle OFF}}}} =100$ nA/ $\mu \text{m}$ (supply voltage $V_{\rm {dd}} =$ 0.5 V) have been measured. Peak electron field-effect mobilities of 6000–7000 cm $^{2}$ /Vs at sheet electron densities of 2– $3\times 10^{12}$ cm $^{-2}$ were obtained for EOT as small as 1 nm.

In this paper, a novel coordinated control method is proposed to handle the negative voltage impacts on weak sub-transmission systems, which are caused by wind power fluctuations. Firstly, wind variations are divided into large and small fluctuations. Then, according to the different control characteristics of on-load tap changers (OLTCs) and static compensators (STATCOMs), the OLTCs are used to minimize the impacts caused by large fluctuations, while the STATCOMs are used to eliminate the impacts introduced by small fluctuations. The model predictive control (MPC) and a consensus based distributed control techniques are adopted to design the control schedules of OLTCs and STATCOMs, respectively. It is shown that by the coordination of OLTCs and STATCOMs, voltage violations of points of interconnection (POIs) are eliminated, and voltage fluctuations at unregulated load buses are mitigated. The effectiveness of our proposed control scheme is presented through a case study on the modified IEEE 14-bus test system with a real wind power profile. According to the simulation results, it turns out that the proposed approach can reduce the operation number of OLTCs significantly, and decrease the required capacity of STATCOMs dramatically by comparison with the existing control scheme.

Endocardial Unipolar Peak-Negative Voltage Predicts Abnormal Epicardial Substrates Introduction The characteristics of endocardial electrograms needed to detect the overlying abnormal epicardial substrates in arrhythmogenic right ventricular cardiomyopathy with epicardial ventricular tachycardia (VT) remain unclear. This study investigated which of the endocardial electrogram characteristics could predict the overlying abnormal epicardial substrates. Methods and Results In 20 consecutive patients (median age: 46 years, 11 men) undergoing epicardial VT ablation, detailed endocardial and epicardial mappings were obtained by using the CARTO 3 system. The endocardial electrographic characteristics (unipolar peak-to-peak voltage, unipolar peak-negative-voltage, bipolar voltage, and bipolar electrogram duration) of the opposite endocardium and epicardium in RV were retrospectively investigated (N = 1,697 paired points, 84 ± 60 pairs/patient). Endocardial predictors of the presence of epicardial dense scar (

Due to the electrical and physical analyses, the robust negative voltage unipolar resistive switching behaviors in Ti/ZrO2/Ti/ZrO2/Pt device have been investigated. The Ti diffusion in ZrO2 film can generate more amounts of oxygen vacancies in it, which leads the lower value and narrower variation in forming voltage. Moreover, the good performances with more than 1000 switching cycles and long retention test can be achieved in the present device.

This paper presents a two-stage synchronous rectifier interface circuit for piezoelectric energy harvesting (PEH) system. The proposed rectifier includes a first-stage negative voltage converter, a second-stage adaptive on-resistance active diode, and combines a precise switch-on-time controlled P-SSHI circuit. The traditional active two-stage synchronous rectifier has lower current detection accuracy and hardly achieves high efficiency rectification over a wide input current range. An adaptive on-resistance active diode (AOR active diode) is proposed to replace the traditional active diode to achieve higher current zero-crossing detection accuracy, improve the input current range and the output power of the rectifier. The proposed diode allows the rectifier to maintain high rectification efficiency over a wider input current range. Further, a parallel synchronized switch harvesting on inductor (P-SSHI) with precise switch-on-time controlled circuit is proposed to achieve higher voltage flipping efficiency and improve the power extraction capability of the rectifier. By using the AOR active diode and the P-SSHI with precise switch-on-time controlled circuit, a good performance improvement has been achieved for the proposed interface circuit. The design is fabricated in an SMIC 0.35[Formula: see text][Formula: see text]m standard CMOS technology with a die size of [Formula: see text][Formula: see text]mm2. The simulation results indicate that the proposed circuit achieves more than 80% power converting efficiency and its peak efficiency is 85%. The current zero-crossing detection accuracy of the proposed AOR active diode is less than 10[Formula: see text][Formula: see text]A. The proposed PEH interface circuit extracts up to 2.81 times more output power compared with a traditional rectifier. The voltage flipping efficiency of the P-SSHI circuit is up to 90%, which can effectively improve the power extraction capability of the rectifier. Moreover, the proposed circuit can be self-powered and cold started up.

Radio interference (RI) of DC transmission lines due to the corona discharge has become a restraining factor of power grids design and operation, so the suppression of RI is very important. In this paper, a new idea for suppressing RI by mounting ferrite cores on the conductor is proposed. By measuring and comparing RI values of the test stranded wire with and without ferrite cores, test results show this approach to suppress RI is effective. Further research results also show inhibitory effects at negative voltage are better than positive voltage and the material of ferrite cores affects the inhibition effects.

High resistivity (3 × 109 Ω cm) polycrystalline CdZnTe thick films with thickness of 25 μm–150 μm were grown on SnO2: F-coated glass substrates by close-spaced sublimation method. The properties of polycrystalline CdZnTe films were studied by XRD, SEM and EDS, respectively. A CdZnTe film Schottky diode detector was also fabricated and investigated using current–voltage and capacitance–voltage methods. The photo-current density of the device was about 1508.69 nA/mm2 under light illumination (λ = 260 nm), at an applied negative voltage of 15 V. The results showed that polycrystalline CdZnTe thick film was suitable for application in ultraviolet detectors.

In this paper, a memristor with structure of Ag/ PEDOT:PSS/ Ta was fabricated and measured at room temperature. The conductance of the device decreased continuously as the consecutive negative voltage scanning. But for positive voltage sweeping, the conductance value reduced initially then increased, which was quite different from previous reported experimental results. The relaxation phenomenon was observed under the consecutive voltage pulses, which can be used to achieve a synaptic learning behavior. It is found that the PEDOT:PSS layer was critical for the special characteristics.

The tunable properties of Pt/PMN-PT/LSCO/Ir capacitor have been studied under different applied voltages and frequencies. The PMN-PT thin film exhibited good dielectric tunability. A tunability of 70.3% at 12 V and 100 kHz is obtained for the film under negative voltage bias. For the positive voltage bias, the tunability is 68.7% which is smaller than the value under negative voltage bias. The asymmetric distribution of charged defects is suggested as possible causes of the asymmetric capacitance–voltage (C–V) behaviors of ferroelectric capacitors. On the other hand, the frequency dependency of the capacitance's tunability indicated that the interface has strong influence on the frequency stable of tunability.

New a-Si:H TFT gate driver circuit (ASG) for low power consumption is proposed and fabricated. For the first time, the proposed ASG can set TFT turn off voltage to the negative voltage rather than zero voltage that the conventional one uses, therefore, TFT leakage current can dramatically be reduced by 1/100. The size of TFT in new ASG, which discharges the leakage current, can be reduced so that the power consumption of new ASG is 43% of the conventional one.

The 50W Quasi-resonant mode SMPS which adopted a normally-on-type SiC JFET as a switch has been designed and characterized. A simple decision circuit and an auxiliary power supply was utilized to safely protect the JFET from an in-rush current at initial operation stage and to provide sufficient negative voltage for a complete JFET drive. Even without a refine engineering, the SMPS showed 96% efficiency at a full load state.

The effects of a transient external voltage application on the bioanode performance of microbial fuel cells (MFCs) inoculated with mixed cultures were investigated. Different positive and negative external voltages were applied to a set of bioanodes. The MFCs under +1, −1, and −5 V voltage applications achieved higher current densities than the control during the start-up period. The MFC exposed to a voltage of +1 V had the highest maximum power density of 73.5 mW m−2 after a 96-h operation. However, the +5 and +10 V voltage applications delayed or even deteriorated the MFC start-up. The −10 V voltage application initially induced a higher power output, but later had a detrimental effect on the MFC performance. The negative voltage application was proven to enhance the catalytic activity of the bioanode, and found to be partially responsible for the improved MFC bioanode performance.

Background— Substrate-based ablation is useful for nonhemodynamically tolerated postinfarct ventricular tachycardia. We assessed the accuracy of the CARTO contact and EnSite noncontact systems at identifying scar in a chronic ovine model with intramural plunge needle electrode recording and histological validation. Methods and Results— Scar mapping was performed on 8 male sheep with previous percutaneous-induced myocardial infarction. Up to 20 plunge needles were inserted into the left ventricle of each animal in areas of dense scar, scar border, and normal myocardium. A simultaneous CARTO map and EnSite geometry were acquired using a single catheter, and needle electrode locations were registered. A dynamic substrate map was constructed using ratiometric 50% peak negative voltage. The scar percentage around each needle location was quantified histologically. Analysis was performed on 152 plunge needles and corresponding histological blocks. Spearman correlation with histology was 0.690 ( P P P P Conclusions— Both the CARTO contact and EnSite noncontact systems were moderately accurate in identifying postinfarct scar when compared with intramural electrodes and confirmed with histology. The EnSite dynamic substrate map was comparable to the CARTO contact bipolar PPV when points >40 mm from the array were excluded.

The reduction of the conductance of GaAs FETs by a negative voltage applied to the substrate, termed backgating or sidegating, is numerically modelled to clarify which type of traps is responsible. Modelling is carried out for several sets of deep levels in the substrate. It is observed that deep acceptors are mainly responsible for backgating independently of the shallow level type in the substrate. In this case there is no threshold. When deep donors are present in the substrate, it is observed that backgating is reduced and there is a threshold. The presence of a buffer layer between the channel and the semi-insulating substrate also helps in reducing backgating.

The wall-charge behaviors of the conventional and two types of single-sustain waveforms during address and sustain periods are investigated based on a simulated result and a Vt close-curve analysis. The single-sustain waveform means that the sustain pulse having both positive and negative voltage levels is applied only to the single-side electrode, i.e., the scan (Y) electrode in this paper, where the common (X) electrode remains grounded. In the single-sustain waveform, the address discharge characteristics were observed to be improved by applying a higher voltage level without causing a misfiring discharge during an address period. An asymmetric IR emission was observed for both positive and negative sustain pulses during a sustain period, which was caused by the simultaneous discharge, including the plate gap discharge between the scan (Y) and the address (A) electrodes only when applying the negative sustain pulse to the scan (Y) electrode.

Resistive switching (RS) behavior of Bi25FeO40:PCBM nanocomposite thin films have been studied by using a FTO/Bi25FeO40:PCBM/Ag device structure. The device switches from high resistance state (HRS, “0”) to low resistance state (LRS, “1”) and from LRS to HRS at small applied voltages in the positive and negative voltage sweeps respectively which confirms the RS behavior of the fabricated device. The fabricated device shows good retention characteristics for long time (> 103 sec) at read voltage ± 0.5V. The forming free bipolar RS have been observed with ratio of resistance in HRS and LRS i.e. RHRS/RLRS is higher (∼ 87) at read voltage − 0.5V compared to that of at read voltage + 0.5V (RHRS/RLRS ∼10). Resistance ratio and good retention performance confirms the non-volatile RS behavior of the device and makes the device a suitable candidate for next generation resistive random access memory (ReRAM) devices.

A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. In this study, we aimed to systematically investigate surface morphologies and electrical properties of SiC epitaxial layers grown with varying a SiC/Al ratio in a SiC source powder during the sublimation growth using the CST method. The surface morphology was dramatically changed with varying the SiC/Al ratio. When the SiC/Al ratio of 90/1 was used, the step bunching was not observed in this magnification and the ratio of SiC/Al is an optimized range to grow of p-type SiC epitaxial layer. It was confirmed that the acceptor concentration of epitaxial layer was continuously decreased with increasing the SiC/Al ratio. 4H-SiC MESFETs haying a micron-gate length were fabricated using a lithography process and their current-voltage performances were characterized. It was confirmed that the increase of the negative voltage applied on the gate reduced the drain current, showing normal operation of FET device.

The reentry blackout phenomenon has plagued reentering spacecraft since the beginning of human spaceflight. Spacecraft entering a planetary atmosphere from the vacuum of space are surrounded by a layer of plasma due to shock-induced and viscous heating. For capsuleshaped spacecraft this problem is particularly severe, leading to a communications blackout period during reentry. This period may last for several minutes and is a serious safety hazard, especially for human missions. Several methods have been suggested in literature but none have been found fit for integration on a reentry vehicle thus far. This paper discusses a new method that employs pulses of high negative voltage to create temporary “windows” in the plasma layer through which communication may be possible. We discuss this method in detail. The interaction of the electrodes with the plasma is simulated using a newly created electrostatic Particle In Cell (PIC) code. The verification of this code is discussed, including a new test case based on Langmuir oscillations. Preliminary results from a simulation of plasma-electrode interaction show encouraging results that will be verified experimentally in the near future.

We introduce a suppressor electrode into a micro-sized field emitter to control the emission angle, as an alternative to using an aperture. The suppressor electrode is fabricated between the emission tip and the extractor by using an etch-back technique. The suppressor height is determined to be 100 nm below the tip. This structure is expected to control the emission angle to be narrower when applying a low voltage at the suppressor electrode. The emission characteristics of the fabricated device closely follow the behavior of the simulated results. It is shown that the emission angle is narrowed by applying a negative voltage at the suppressor electrode.

In this work, we report on the ability to write features less than 15 nm in size on nanocrystalline SnO 2 by applying negative voltage pulses onto an STM tip. The fact that these features can be erased by scanning with a positive tip bias, and the strong dependence of the apparent height of the features with scanning bias after writing seems to indicate that a degree of charge confinement within the 8 nm nano-crystals is involved.

A transition from a negative regime to positive streamers in a guiding field has been studied. The apparatus is a simple parallel plane electrode arrangement that provides the uniform guiding field. Negative streamers were generated by a pulsed negative voltage of magnitude ≈5 kV and duration ≈270 ns applied to a trigger pin electrode placed in an aperture at the centre of the grounded electrode and insulated from it by air. It has been shown that the velocities of streamers was between 4×104 and 1.5×105 m s−1 over an external guiding field range of 5.5–6.3 kV cm−1. Results have been presented showing the variation of field in the mid-gap region and the characteristics of streamers. Optical observations have shown the light emission from the developing discharge to be non-linear.

A negative buck converter, an easier way to generate an additional negative rail in systems that already have a larger negative voltage supply, is described.

The use of the LTC3863 to produce a negative voltage from a positive voltage source is described. The LTC3863 is elegant in its simplicity, has superior efficiency at light loads and reduces parts count compared to alternative solutions.

The LTC4354, negative voltage diode-OR controller that realizes near-ideal diode behavior, is described.

We describe three approaches to increase the beta detection efficiency of microchannel plate detectors for biological beta autoradiography: (a) reversing the microchannel plate (MCP) bias polarity, changing the conventional high negative voltage on the input MCP to a grounded input, (b) a reduction in MCP pore size from 12.5 to 6 μm , (c) using a CsI coating as an efficient secondary electron emitter. We also present our first measurements of double-tracer (3H and 14C) imaging using pulse height analysis to distinguish between isotopes.

Flexible, large-area, and distributed sensor and/or actuator array closely contacted with the human skin are human- friendly and sophisticated tools for biomedical and healthcare applications. In this paper, new applications and design solutions in organic electronics are shown. In an insole pedometer with piezoelectric energy harvesters, an all-pMOS negative voltage generator for a pseudo-CMOS inverter is shown. In a surface electromyogram measurement sheet for the prosthetic hand control, a post-fabrication select-and-connect method to reduce the transistor mismatch is shown. In a flexible wet sensor sheet to detect the urination in diapers, ESD protection with organic schottky diodes is shown.

Inner-structural changes of a Cu/MoOx ReRAM was observed by in-situ TEM during the resistive switching. We succeeded for the first time to observe the structure changes in the continuous multiple resistive switching cycles. Cu-rich filament was formed in the MoOx layer during the SET process with positive voltage to the Cu electrode, and disappeared by negative voltage in the RESET process. It was also confirmed that thick filaments were generated when the current compliance for the SET process was increased. The most meaningful phenomenon is that the position of the filament changed at each SET process.

A new architecture has been designed and demonstrated for a low-power SP10T-RF-Switch-IC using 0.18μm SOI-CMOS, implementing an RF-Switch, negative voltage generator, and MIPI in a chip. Clock frequency of the negative voltage generator is controlled to increase only in a switch transition and drop at other times in order to reduce power consumption. Results of an evaluation of a trial chip confirmed a 33% reduction in power consumption compared with conventional architecture while RF performance is maintained.

Oxide-based resistive memory (RRAM) is under scrutiny for possible use for non-volatile storage and storage-class memory (SCM) complementing DRAM and SRAM. For SCM applications, set/reset times, variability and endurance are key concerns, which must be carefully understood to explore potential applications of RRAM. To that purpose we studied pulsed operation and endurance of oxide RRAM. We show that (i) resistance window (RW) is controlled by the negative voltage V stop applied during reset, (ii) failure at high V stop is due to negative set, causing filament overgrowth and RW collapse and (iii) endurance is independent of the pulse-width, which supports an Arrhenius model for endurance failure.

In this work, an analytical model for a dielectric modulated (DM) double gate (DG) Tunnel Field Effect Transistor (TFET) working as a biosensor for label free electrical detection of biomolecules has been proposed. It has been analyzed that the ambipolar behaviour of tunnel field effect transistor can also be used for sensing of the biomolecules when the negative voltage is applied to n-TFET. In this paper, the ON current (for both negative and positive gate voltage) of the TFET has been used as the sensing parameter. The characteristics trends are verified via ATLAS (SILVACO) device simulation results.

We observed a step formation on Au (111) surface with a scanning tunneling microscope (STM) after the disappearance of the \sscriptsize(22 \atop-1 0 \atop2) reconstruction. Upon exposure to air, the spacing of the reconstructed pattern increased, and finally the pattern disappears. By applying negative voltage pulses to the STM tip, we made depressions of 1–6 atomic layers deep on this surface. Then suddenly a monoatomic step appeared, running almost straight, but detouring around one of the depressions. Since the depth of each depression remained the same as that before the step formation, the step was generated by a dislocation and not by a movement of a top surface layer. The relative position of the step to the detoured depression suggests that the dislocation was created on the surface and then penetrated into the bulk.