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Graphene and carbon nanotubes (CNTs) are both carbon-based materials with remarkable optical and electronic properties which, among others, may find applications as transparent electrodes or as interconnects in microchips, respectively. This work reports on the formation of a hybrid structure composed of a graphitic carbon layer on top of vertical CNT in a single deposition process. The mechanism of deposition is explained according to the thickness of catalyst used and the atypical growth conditions. Key factors dictating the hybrid growth are the film thickness and the time dynamic through which the catalyst film dewets and transforms into nanoparticles. The results support the similarities between chemical vapor deposition processes for graphene, graphite, and CNT. [ABSTRACT FROM AUTHOR]

Earlier work [T. Clarysse et al., Mater. Sci. Eng., B 114–115, 166 (2004); T. Clarysse et al., Mater. Res. Soc. Symp. Proc. 912, 197 (2006)] has shown that only few contemporary tools are able to measure reliably (within the international technology roadmap for semiconductors specifications) sheet resistances on ultrashallow (sub-50-nm) chemical-vapor-deposited layers [T. Clarysse et al., Mater. Res. Soc. Symp. Proc. 912, 197 (2006)], especially in the presence of medium/highly doped underlying layers (representative for well/halo implants). Here the authors examine more closely the sheet resistance anomalies which have recently been observed between junction photovoltage (JPV) based tools and a micrometer-resolution four-point probe (M4PP) tool on a variety of difficult, state-of-the-art sub-32-nm complementary metal-oxide semiconductor structures (low energy and cluster implants, with/without halo, flash- and laser-based millisecond anneal). Conventional four-point probe tools fail on almost all of these samples due to excessive probe penetration, whereas in several cases variable probe spacing (using a conventional spreading resistance probe tool) [T. Clarysse et al., Mater. Sci. Eng. R. 47, 123 (2004)] still gives useful values to within about 20%–35% due to its limited probe penetration (5–10 nm at 5 g load). M4PP measurements give systematically a sensible and reproducible result. This is also the case for JPV-based sheet resistance measurements, although these appear to be prone to correct calibration procedures and are not designed for the characterization of multijunctions. Moreover, in a significant number of cases, residual damage and/or unexpected junction-leakage currents appear to induce a strong signal reduction, limiting the applicability of the JPV technique. This has been further investigated by transmission-electron microscopy, high carrier-injection photomodulated optical-reflectance, and Synopsis-Sentaurus device simulations. [ABSTRACT FROM AUTHOR]

Abstract: We propose an empirical law correlating the average number of walls and the average diameter in a population of multi-wall carbon nanotubes grown by catalytic chemical vapor deposition. The relationship and its dispersion are derived from the statistical analysis of a database of TEM images of nanotubes collected from more than 60 publications in literature and from our group in the last years. Considering the nanotubes were grown from independent sources in a variety of conditions and tools, it has general validity. The relationship may find applicability in a wide range of fields as it provides a simple model to quickly estimate the number of walls most likely present in a population of nanotubes from only the measure of their average diameter. [Copyright &y& Elsevier]

The epitaxial growth of Si layers on Si substrates in the presence of O atoms is generally considered a challenge, as O atoms degrade the epitaxial quality by generating defects. Here, we investigate the growth mechanisms for Si epitaxy on O atomic layers (ALs) with different O-contents and structures. O ALs are deposited by ozone (O 3 ) or oxygen (O 2 ) exposure on H-terminated Si at 50 °C and 300 °C respectively. Epitaxial Si is deposited by chemical vapor deposition using silane (SiH 4 ) at 500 °C. After O 3 exposure, the O atoms are uniformly distributed in Si-Si dimer/back bonds. This O layer still allows epitaxial seeding of Si. The epitaxial quality is enhanced by lowering the surface distortions due to O atoms and by decreasing the arrival rate of SiH 4 reactants, allowing more time for surface diffusion. After O 2 exposure, the O atoms are present in the form of SiO x clusters. Regions of hydrogen-terminated Si remain present between the SiO x clusters. The epitaxial seeding of Si in these structures is realized on H-Si regions, and an epitaxial layer grows by a lateral overgrowth mechanism. A breakdown in the epitaxial ordering occurs at a critical Si thickness, presumably by accumulation of surface roughness. [ABSTRACT FROM AUTHOR]

Incorporation of source–drain stressors (S/D) for FinFETs to boost the channel mobility is a promising scaling approach. Typically SiGe:B S/D stressors are used for p FinFETs and Si:C:P S/D stressors for n FinFETs. The deposition of such Si:C:P S/D stressors requires a low thermal budget to freeze the C in substitutional sites and also to avoid problems associated with surface reflow of Si fins. In this work, we report the material properties of Si:C and Si:C:P epitaxial layers grown by chemical vapor deposition, in terms of their defectivity and C incorporation as a function of different process conditions. The undoped Si:C layers were found to be defect free for total C contents below 1%. Above this concentration defects were incorporated and the defect density increased with increasing C content. Abrupt epitaxial breakdown occurred beyond a total C content of 2.3% resulting in amorphous layers. P doping of Si:C layers brought down the resistivity and also thicker Si:C:P films underwent epitaxial breakdown. Additionally, the use of nitrogen instead of hydrogen as carrier gas resulted in an increase of the growth rate and substitutional C incorporation both by a factor of two, while the surface defect density reduced. [ABSTRACT FROM AUTHOR]

Abstract: We report on the synthesis of Cu3Ge films by exposing Cu films to germane (GeH4). The process window was established by investigating the influence of the GeH4 partial pressure, the soak temperature, and the soak time on Cu films of different thickness. It is shown that short exposures of germane led to Cu-rich germanides, while an excessive GeH4 supply resulted in a Cu3Ge/Ge mixed phase. The germanidation reaction was found to be selective and required the prior removal of the native Cu oxide by in situ plasma cleaning. X-ray diffraction and transmission electron microscopy showed that the Cu3Ge films were crystalline as deposited in the orthorhombic phase and were textured. The films were homogenous in composition. Thin films consisted of Cu3Ge islands connected by a thin wetting layer. Fully continuous layers were however found for larger film thicknesses. The continuity of the Cu3Ge film was also found to be influenced by the pseudosubstrate: the films were more continuous on TaN/Ta than on SiO2. The electric properties of the Cu3Ge films on both TaN/Ta and SiO2 pseudosubstrates are presented and compared. [Copyright &y& Elsevier]

Abstract: Scaling air-gap interconnects to 70nm pitch is demonstrated for the first time by combining air-gap technology (SiO2 etch-back and non-conformal CVD) and the double patterning approach. A capacitance reduction of 45% was measured on the air-gaps compared to the SiO2 reference. The reliability performance of the air-gaps was then evaluated and it was found that the structures exceeded 10years lifetime at 2MV/cm, almost matching the performance of SiO2 interconnects. Air-gaps could therefore make a promising low-RC solution for future technology nodes. [Copyright &y& Elsevier]