Search

The synapse is one of the fundamental elements in human brain performing functions such as learning, memorizing, and visual processing. The implementation of synaptic devices to realize neuromorphic computing and sensing tasks is a key step to artificial intelligence, which, however, has been bottlenecked by the complex circuitry and device integration. We report a high-performance charge-trapping memory synaptic device based on two-dimensional (2D) MoS2 and high-k Ta2O5–TiO2 (TTO) composite to build efficient and reliable neuromorphic system, which can be modulated by both electrical and optical stimuli. Significant and essential synaptic behaviors including short-term plasticity, long-term potentiation, and long-term depression have been emulated. Such excellent synaptic behaviors originated from the good nonvolatile memory performance due to the high density of defect states in the engineered TTO composite. The 2D synaptic device also exhibits effective switching by incident light tuning, which further enables pattern recognition with accuracy rate reaching 100%. Such experimental demonstration paves a robust way toward a multitask neuromorphic system and opens up potential applications in future artificial intelligence and sensing technology. [ABSTRACT FROM AUTHOR]

In this work, we have fabricated and thoroughly characterized dielectric-stacked memory devices with AlO-CuO composites as the charge trapping layer which are prepared by using atomic layer deposition and RF-magnetron sputtering techniques. The devices exhibit a large memory window of 13.27 V and a density of the trapped charges of 9.37 × 10 cm at a working voltage of ±11 V. The microstructural observations by using high resolution transmission electron microscopy and the analysis on X-ray photoelectron spectroscopy indicate that the strong charge-trapping ability of AlO-CuO composite should be ascribed to the occurrence of Cu, resulted by the inter-diffusion at the interface of CuO/AlO. Such an interesting composite layer has very attractive application in nonvolatile memory. [ABSTRACT FROM AUTHOR]

The charge-trapping memory devices namely Pt/Al2O3/(Al2O(Cu2O)/SiO2/-Si with 2, 3 and 4 nm SiO2 tunneling layers were fabricated by using RF magnetron sputtering and atomic layer deposition techniques. At an applied voltage of ±11 V, the memory windows in the C- V curves of the memory devices with 2, 3 and 4 nm SiO2 tunneling layers were about 4.18, 9.91 and 11.33 V, respectively. The anomaly in memory properties among the three memory devices was ascribed to the different back tunneling probabilities of trapped electrons in the charge-trapping dielectric (Al2O(Cu2O) due to the different thicknesses of SiO2 tunneling layer. [ABSTRACT FROM AUTHOR]

An effective method to generate traps at the interface was developed to enhance the charge trapping capability of HfO2/Al2O3 multilayered memory devices. A high charge density was obtained in the inter-diffusion layer in which additional trap sites could be created by thermal-treatment induced inter-diffusion. By keeping the consistent thickness of the charge trapping layer and increasing the number of the inter-diffusion layers, more traps can be introduced in the charge trapping layer. So, creating more trap sites by enhancing the inter-diffusion at the interface of different high-k dielectrics could be a potential choice for future memory applications. [ABSTRACT FROM AUTHOR]

A charge trapping memory device using Ti0.2Al0.8Ox film as charge trapping layer and amorphous Al2O3 as the tunneling and blocking layers was fabricated for nonvolatile memory application. TiAl2O5 nanocrystals are precipitated from the phase separation of Ti0.2Al0.8Ox film annealed at 900 °C. A memory window of 2.3 V and a stored electron density of 1×1013/cm2 were obtained. Good retention characteristics of the memory device at 80 °C were observed due to the deep charge trapping level as identified by the valence band offsets and electron energy loss spectrum measurements. [ABSTRACT FROM AUTHOR]