1. Performance improvement of CdS/CdTe solar cells by incorporation of CdSe layers
- Author
-
Wei Li, Bo Tan, Wenwu Wang, Katsuhiro Akimoto, Gang Hu, Lianghuan Feng, Jingquan Zhang, Xia Hao, Yunfan Wang, Muhammad Monirul Islam, Wei Fu, Takeaki Sakurai, Lili Wu, Hamidou Tangara, Chuang Li, and Chuanqi Li
- Subjects
Materials science ,Photoluminescence ,business.industry ,Annealing (metallurgy) ,Band gap ,Condensed Matter Physics ,Atomic and Molecular Physics, and Optics ,Cadmium telluride photovoltaics ,Electronic, Optical and Magnetic Materials ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Current density ,Layer (electronics) ,Deposition (law) ,Diode - Abstract
An evaporated CdSe layer was incorporated with a very thin CdS layer (40 nm) to optimize the performance of CdTe solar cells. Se alloys with narrower bandgaps were formed in the CdTe deposition and annealing process. With the incorporation of the CdSe layer at the optimal thickness, the highest short-circuit current density was obtained because of the simultaneous high carrier collection in the short-wavelength region and extended carrier collection in the long-wavelength region. Although narrow bandgap Se alloys were introduced, the open-circuit voltage was also significantly increased. As suggested by dark current–voltage measurements, the current leakage paths induced by the thin CdS layer can be significantly suppressed by the incorporation of the CdSe layer. The redshift of PL emission confirms the formation of the Se alloys. As revealed by transient photo-capacitance measurement, the Se alloys are less defective compared with that of CdTe, which is also in accordance with longer carrier lifetimes extracted from photoluminescence decays. The formation of Se alloys prior to the CdTe layer is favorable for the collection of photogenerated carriers. We attribute the performance enhancement to the formation of Se alloys, which are helpful to suppress the leakage current and enhance carrier collection. The incorporation of CdSe with thin CdS layers is validated to improve the diode quality and promising for further device performance improvement.
- Published
- 2021
- Full Text
- View/download PDF