1. Modified signed-digit addition by using binary logic operations and its optoelectronic implementation
- Author
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Hao Ruan, Liren Liu, Feng Qian, and Guoqiang Li
- Subjects
Digital electronics ,Sequential logic ,business.industry ,Computer science ,Optical computing ,Binary number ,Atomic and Molecular Physics, and Optics ,Electronic, Optical and Magnetic Materials ,Parallel processing (DSP implementation) ,Encoding (memory) ,Bit-length ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Logic optimization - Abstract
In this work, a three-step modified signed-digit (MSD) addition by using binary logic operations is proposed. Each input digit is encoded with two binary bits. Through binary logic operations, all of the weight and transfer digits and the final sum digits represented with the same encoding scheme will be generated. The operations can be performed at each digit position in parallel. In our suggested optical arithmetic and logic unit (ALU), a single electron trapping (ET) device is employed to serve as the binary logic device. This technique based on ET logic possesses the advantage of high signal-to-noise ratio (SNR). The optoelectronic system can be constructed in a simple, compact and general-purpose form.
- Published
- 1999