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We investigated the time-dependent clustering (TDC) model for time-dependent dielectric breakdown (TDDB) of non-uniform dielectrics and revealed for the first time that the TDC model is a compound Weibull model that is expressed as a superposition of Weibull distributions. The Weibull model has two statistical parameters, scale parameter η and shape parameter β We clarified the precondition that the TDC model holds when term ηβ of the Weibull model is distributed according to an inverse-gamma distribution. By using our finding, we proposed a new method to directly estimate the variations of electric field and effective space from TDDB data. We found that the corresponding electric field distribution is a generalization of extreme value distribution, which is a natural consequence since the lifetime is determined by the maximum value of the electric field.

A detailed structural analysis of Hf-doped SiON dielectrics was performed by using advanced physical analysis techniques: Cs-corrected scanning transmission electron microscopy (STEM) and three-dimensional (3-D) atom-probe (AP) tomography. We confirmed that the distribution and agglomeration of Hf atoms cause a time dependent dielectric breakdown (TDDB) in Hf-doped SiON dielectrics gate stacks. We revealed that the behavior of Hf atoms in dielectrics is related to the TDDB lifetime, which depends on Hf concentration and the polarity of electrodes. The TDDB mechanism of Hf-doped SiON dielectrics was successfully revealed in detail, based on physical analysis results.

High-performance CMOS circuits are fabricated from excimer-laser-annealed poly-Si TFTs on a glass substrate (300/spl times/300 mm). The propagation delay time of the 121 stage CMOS ring oscillators with 0.5 /spl mu/m gate length is 0.18 nsec at 5 V supply voltage. The maximum operating frequency of the 40-stage shift registers with 1 /spl mu/m gate length is 133 MHz at 5 V supply voltage. This value is high enough for peripheral CMOS circuits with line-at-a-time addressing.

We clarified that the SBD in ultra-thin oxides with the large direct tunneling current in which masks the SBD event can be detected by using the adequate threshold of the intensity in light-emission analysis. This new method is a WLR tool for monitoring oxides integrity instead of V-RAMP test.

Voltage, polarity and thickness dependencies of time-to breakdown in n-FETs and p-FETs are investigated under inversion and accumulation conditions. The voltage dependence of all the cases is clearly described by a power-law. The voltage acceleration exponents (n) of the power-law of 45 (n-FETs inv.), 40 (n-FETs acc.) and 44 (p-FETs acc.) are independent of thickness. On the other hand, in p-FETs under inversion mode, the exponents (n) are /spl sim/45 for |Vg|>3.8 V and 33 for |Vg

We proposed a new low temperature process for self-aligned gate overlapped LDD (GOLDD) poly-Si TFTs. The gate-overlapped LDD structure was self-aligned by side-etch of Al-Nd in Al-Nd/Mo gate electrode. A low temperature dopant activation was done by using H/sub 2/ ion doping after 450/spl deg/C annealing, in N/sub 2/ atmospheric. The characteristics of our GOLDD poly-Si TFT had high ON-current and low OFF-current.