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5. Experimental Study of Etched Back Thermal Oxide for Optimization of the Si/High-k Interface

12. Integration of high-k gate stack systems into planar CMOS process flows

15. Conventional poly-Si gate MOS-transistors with a novel, ultra-thin Hf-oxide layer

16. Intrinsic characteristics of high-k devices and implications of fast transient charging effects (FTCE)

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