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© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works., This paper focuses on the study of a charger for two batteries connected in series. From the three-phase grid, the batteries are charged through a three-level neutral-point-clamped (NPC) ac-dc converter in cascade with a three-level NPC dualactive-bridge converter. The system provides galvanic isolation and allows bidirectional power flow. A simple control strategy to charge the batteries is considered, based on the regulation of the common- and differential-mode components of the batteries charging currents. In addition, the proposed control system regulates the total dc-link voltage and the dc-link voltage balance in the two systems dc-links. This work is particularly focused on the comparison of the charger performance under two competitive ac-dc converter modulations, in terms of the ac-side voltage harmonic content, the number of switching transitions, the dc-link voltage balance, and the charging current control capacity. Simulation results with the performance comparison are provided and the merits and demerits of each option are highlighted., This publication is part of Grant DPI2017-89153-P, funded by MCIN/AEI/10.13039/501100011033 and by ERDF A way of making Europe., Peer Reviewed, Postprint (author's final draft)

Neutral-point-clamped (NPC) power conversion topologies are among the most popular multilevel topologies in current industrial products and in industrial and academic research. The proper operation of multilevel three-phase NPC DC–AC converters requires the use of specific pulse-width modulation (PWM) strategies that maintain the DC-link capacitor voltage balance and concurrently optimize various performance factors such as efficiency and harmonic distortion. Although several such PWM strategies have been proposed in the literature, their formulation is often complex and/or covers only particular cases and operating conditions. This manuscript presents a simple formulation of the original virtual-vector-based PWM, which enables capacitor voltage balance in every switching cycle. The formulation is presented, for the general case, in terms of basic phase voltage modulating signals, with no reference to space vectors, involving any number of levels and for any operating conditions, including the overmodulation region. The equivalence of the presented formulation to the original PWM strategy is demonstrated through simulation under different scenarios and operating conditions. Thus, this manuscript offers in a one-stop source a simple, effective, and comprehensive PWM formulation to operate multilevel three-phase NPC DC–AC converters with any number of levels in any operating condition., Peer Reviewed, Postprint (updated version)

This article explores the thermal and reliability benefits of configuring the power semiconductor block of power converters with several small standard power semiconductor devices instead of a few larger ones at a fixed total chip area. The effectiveness of a finer power semiconductor device granularity is analyzed in the context of a synchronous buck converter design under different operating conditions and employing a recently proposed component, the switching-cell array, to implement the semiconductor-component block of the converter. Comparative evalua tions are undertaken under different degrees of granularity and in terms of semiconductor loss distribution, semiconductor temperature distribution, and converter mean time to failure. The article also discusses the thermo-electrical and reliability models employed, and the assumptions made for a fair and straightforward comparison in a generic case. The comparison results reveal that a finer granularity can potentially provide remarkable benefits, although the incremental improvements decrease as the granularity becomes finer. A tradeoff solution must be sought in each specific case balancing the benefits achieved with the added complexity, Postprint (author's final draft)

© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works., A charger for two batteries connected in series is presented in this work. From the three-phase grid, the batteries are charged through a three-level neutral-point-clamped ac-dc converter in cascade with a three-level dual active bridge converter. The system provides galvanic isolation and allows bidirectional power flow. A simple control strategy to charge the batteries is presented, based on the regulation of the commonand differential-mode components of the batteries’ charging currents. With this control approach, each battery bank can be charged independently, allowing it to reach full battery bank capacity, even under different battery initial state-of-charge values or different battery nominal capacities. Moreover, the proposed control system also regulates the total dc-link voltage and the dc-link voltage balance in both dc-links of the system. The simulation results verify the feasibility of the proposed implementation and control system approach., This work was supported by the Ministerio de Economía, Competitividad, Spain, under Grant DPI2017-89153-P (AEI/FEDER, UE)., Peer Reviewed, Postprint (published version)

This article presents detailed Markov models for the reliability assessment of multilevel neutral-point-clamped (NPC) converter leg topologies, incorporating their inherent fault-tolerance under open-circuit switch faults. The Markov models are generated and discussed in detail for the three-level and four-level active NPC (ANPC) cases, while the presented methodology can be applied to easily generate the models for a higher number of levels and other topology variants. In addition, this article also proposes an extremely fast calculation method to obtain the precise value of the system's mean time to failure from any given formulated system Markov model. This method is then applied to quantitatively compare the reliability of two-level, three-level, and four-level ANPC legs under switch open-circuit-guaranteed faults and varying degrees of device paralleling. The comparison reveals that multilevel ANPC leg topologies inherently present a potential for higher reliability than the conventional two-level leg, questioning the suitability of the traditional search for topologies with the minimum number of devices in order to improve reliability. Experimental results are presented to validate the fault-tolerance assumptions upon which the presented reliability models for the three-level and four-level ANPC legs are based. This article is accompanied by supplementary MATLAB scripts., Peer Reviewed, © 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works

In photovoltaic (PV) systems, the reliability of the system components, especially the power converters, is a major concern in obtaining cost effective solutions. In order to guarantee service continuity in the case of failure of elements of the PV converter, in particular, semiconductor switching devices, a solution is to design power converter with fault-tolerance capability. This can be realized by aggregating hardware redundancy on an existing converter, providing the possibility of replacement of faulty elements. This paper evaluates the reliability of a fault-tolerant power electronics converter for PV multistring application. The considered fault-tolerant design includes a single redundant switching leg, which is used in order to reconfigure the structure in case of a switch failure either on DC-AC or DC-DC stages. This paper details the reliability estimation of the considered PV multistring fault-tolerant converter. Furthermore, a comparison with a conventional structure without fault-tolerant capability is provided. The results show that the introduction of a single redundant leg allows for improving the converter mean time to failure by a factor of almost two and it reduces, by half, the power loss due to system-failure shutdowns in PV applications, while only increasing the converter cost by 2–3%., Peer Reviewed, Postprint (published version)

This paper studies a multilevel multiphase dc-ac conversion system configured by a neutral-point-clamped converter fed by multiple battery packs connected in series. A virtual-vector modulation is selected and a state-of-charge (SoC) balancing control is designed to be able to employ the full battery bank capacity, even under different battery initial SoC values or different battery nominal capacities. The SoC balancing among battery packs is accomplished through the multilevel converter operation in a lossless manner, by simply distributing the dc-to-ac power flow among the batteries according to their SoC. A simple average system model is also presented, which allows performing very fast system simulations over long periods of time and serves as a convenient tool to tune the compensator parameters. The satisfactory performance of the proposed system configuration and control, which can be applied with any number of levels and phases, has been verified through simulations and experiments in a four-level three-phase dc-ac converter fed by three lithium-ion battery packs. The results prove the feasibility and advantages of the proposed system configuration, which can be used to implement conversion systems with different specifications combining several instances of a standard battery pack and a standard power semiconductor device, Peer Reviewed, Postprint (updated version)

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works., The present paper provides a solution to operate multilevel dual active bridge (ML-DAB) converters built upon neutral point clamped switching legs in a full-bridge disposition and with any number of levels on either side of the converter. The main issue of such converters is addressing the inherent unbalance of the dc-link capacitor voltages, which hinders the proper operation and optimum utilization of the converter. The proposed solution comprises a generalized to N levels modulation and control scheme that allows operating these converters, while guaranteeing the proper balance of the dc-link capacitor voltages. The suitability of the proposed solution is verified through simulation and experimental tests performed in five different converter configurations, three of them with an asymmetric number of voltage levels, proving that capacitor voltage balance is achievable in a wide range of operation conditions. Moreover, the efficiency of the ML-DAB converters is demonstrated to be superior to the conventional two-level DAB case., Postprint (author's final draft)

This paper deals with generic design and implementation of multi-cell multi-level multi-phase voltage source inverters. Based on a well-known topology, the paper focuses on place and route design to enable V and/or I scalability while ensuring high performance and high power densities. The topology is studied to define how conversion cells should be designed to ease and automate scalability in I and V. A prototype is built and tested, and the performances are benchmarked, Postprint (author's final draft)

The future of energy largely depends on the creativity and innovation capacity of energy engineers. Projects on renewable energy developed by master’s students can be significant to know the vision of the new generation of energy engineers. The projects of 168 international students pursuing EIT KIC InnoEnergy masters, more specifically MSc RENE and MSc SELECT, were analysed. The students were gathered in 25 teams and worked on projects and challenges following their own ideas. The students’ proposals were listed and classified according to technologies, degree of radical innovation, complexity, scope, TRL and agents that would develop the solutions. The typical proposal is based on solar energy, involves several elements, has, at least initially, a limited scope, uses commercially available technology, and is adapted to the case in all other respects. This vision seems to be very promising to spread renewable energy solutions., Postprint (author's final draft)

This article reviews the fundamentals of multilevel multiphase neutral-point-clamped DC–AC power converters. These converters are configured with one or more legs and a common DC-link. Each leg is functionally equivalent to a single-pole multiple-throw switch (n¿=¿3 positions) and it is implemented with a combination of only power semiconductor devices. The main leg topologies are initially presented, both active(transistor) clamped and passive(diode) clamped, for any number of levels. The leg switching states enabling all possible leg positions are subsequently discussed. Then, the set of all possible converter switching states and their standard representation in the converter space vector diagram is systematically derived, starting from the simplest converter (single-phase single-leg) up to the most complex converter with an arbitrary number of phases. The space vector diagram is illustrated for three-, four-, and n-levels in the usual single-phase and three-phase cases. Once the converter states have been characterized, the most common converter control approaches are introduced on the basis of the space vector diagram, including space vector control, space vector modulation, programmed pulse width modulation, hysteresis control, and predictive control. These control strategies are illustrated in simple and conventional DC–AC converter configurations. Finally, the article discusses the DC-link capacitor voltage balance problem, which is inherent to these topologies whenever the DC-link is configured with a capacitive voltage divider. The basics of the different solutions to guarantee the balancing are presented, both through the inclusion of additional hardware and through the application of a suitable converter control strategy, Peer Reviewed, Postprint (published version)

This chapter describes amplifiers or amplification output stages that are capable of delivering high-output power levels. Since power amplifier stages may deliver high output power to low-impedance loads, they are significantly different from the low-power small signal amplifiers. Class-A operation is the only configuration that will yield low distortion signals. Class-B and class-AB power amplifiers assure signal continuity by making use of arrangements of two transistors that allow each transistor to share portions of the input signal conduction angle. The high-efficiency amplifiers based on this approach are usually classified as class-D, class-E and class-F, being also referred to as switching amplifiers or digital amplifiers. To compare the design of power amplifiers, different figures of merit or parameters can be utilized. Large input signal to power amplifiers causes the amplifier to yield distorted output signals. In fact, in large-signal operation, the signals overtake the limits of the transistor forward-active region, causing distortion at the output., Postprint (published version)

© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works, The conventional design of voltage-source power converters is based on a two-level half-bridge configuration and the selection of power devices designed to meet the full application specifications (voltage, current, etc.). This leads to the need to design and optimize a large number of different devices and their ancillary circuitry and prevents taking advantage from scale economies. This paper proposes a paradigm shift in the design of power converters through the use of a novel configurable device consisting on a matrix arrangement of highly-optimized switching cells at a single voltage class. Each switching cell consists of a controlled switch with antiparallel diode together with a self-powered gate driver. By properly interconnecting the switching cells, the switching cell array (SCA) can be configured as a multilevel active-clamped leg with different number of levels. Thus, the SCA presents adjustable voltage and current ratings, according to the selected configuration. For maximum compactness, the SCA can be conceived to be only configurable by the device manufacturer upon the customer needs. For minimum cost, it can also be conceived to be configurable by the customer, leading to field-configurable SCAs. Experimental results of a 6x3 field-configurable SCA are provided to illustrate and validate this design approach., Peer Reviewed, Postprint (author's final draft)

© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works, The design of gate-driver power supply (GDPS) circuits for multilevel neutral-point-clamped converters is a challenge due to the large number of power switches required and the fact that each device presents a different GDPS reference node. This paper presents a compact self-powered bipolar GDPS circuit, consisting of two subcircuits connected across the power switches, which altogether produce all the positive and negative supply voltages required by the GDs. As these subcircuits essentially contain semiconductor components, they can be integrated with the power switch and gate driver, to produce a compact cell from which obta in a compact converter leg implementation. Overall, this BGDP S design is suitable for all types of NPC multilevel topol ogies with any type of power transistor, although it is most suitable for moderate device voltage ratings. The good perfor mance of the proposed BGDPS circuit has been confirmed through experiments on a conventional two-level leg, and on three-level and four-level active-clamped converter legs., Peer Reviewed, Postprint (author's final draft)

© 2017 IEEE. Personal use of this ma terial is permitted. Permission from IEEE must be obtained for al l other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, f or resale or redistribution to se rvers or lists, or reuse of any copyrighted compone nt of this work in other works, This paper proposes a modulation strategy for multilevel multiphase diode-clamped dc–ac converters (also applicable to other functionally equivalent topologies) able to keep the dc-link capacitor voltages balanced under passive front ends, low frequency modulation indices (i.e., low number of switching transitions per fundamental cycle), any value of the amplitude modulation index, and any ac-side displacement power factor. A suitable phase voltage pattern with minimum number of switching transitions is presented for the n-level three-phase case. Subsequently, it is extended to higher number of switching transitions per fundamental cycle and to higher number of phases. Simulation results with three, four, and five levels; three and five phases; and several frequency-modulation-index values are presented to validate the proposed modulation strategy. Experimental results obtained with a four-level three-phase dc–ac converter prototype are also provided. The proposed modulation strategy enables the use of this type of converters in applications where the ac fundamental frequency may be close to the switching frequency, such as in high-power systems and variable-speed motor drives., Peer Reviewed, Postprint (author's final draft)

The analysis presented here st arts from the experience in challenge-based education devel oped in the master degrees MSc RENE and MSc SELECT. These MSc programs are offered by InnoEnergy partner universities, funded by the EU through the European Institute of Innovation and Technology (EIT). We analyse how a total 32 challenges addressed by the students take into account a list of 9 competences and characte ristics of the projects and the diversity of the own characteri stics and the solutions adopted. Our final objective is to test the effectiveness of the development by the students of a diversity of projects. We concluded that, as expected, most of the competences and other characteristics of the projects as market approach are addressed. The diversity of charac teristics and solutions adopted is high in relation with technologies , innovation and entrepreneurship we can observe a considerable diversity. Social commitment and connection with the industry are less involved that expected with the levels of development and again th e connection with the industry are scarcely diversified. In spite of this, we think that the multiple-challenge approach is effective in developing a diversity of competences in the different areas involved We also observe that because of the open character of these activities the control and management of the competences developed is not immediate. As a future suggestion we propose to extend the use of the multiple-challenge approach in sustainable energy programs and the development of a systematic monitoring of the kind of challenges addressed and the competences developed by each student, Peer Reviewed, Postprint (author's final draft)

© 20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works, Several pulsewidth modulation (PWM) strategies have been proposed for three-phase multilevel converters. Typically, these PWM methods can be either space-vector or carrier-based implemented, where the carrier-based implementation usually presents a lower computation complexity. In this paper, a novel approach for the carrier-based implementation of different existing PWM methods is proposed for three- (3L) and four-level (4L) dc-ac converters, which can be easily extended to any number of levels. The main features of the proposed approach are its reduced computation complexity and computation time. On the other hand, the proposed approach suggests the derivation of novel PWM strategies which can potentially present improved performance features. As an example, two new discontinuous PWM (DPWM) strategies are proposed for the 4L converter. One of these DPWM strategies presents lower weighted total harmonic distortion than other previously proposed strategies. Simulation and experimental results verify the effectiveness of the proposed approach and novel DPWM strategies., Postprint (published version)

This paper proposes and demonstrates the feasibility of a dual-active-bridge converter built upon four-level active-clamped legs. A suitable modulation pattern is defined. The dc-link capacitor voltage balancing is analyzed and a proper balancing control is designed. The topology, modulation, and balancing control performance are validated through the steady state and transient responses obtained with a set of simulation and experimental tests. An experimental prototype has been built for the experimental tests composed of four four-level active-clamped converter legs and controlled with a dSPACE control platform., Peer Reviewed, Postprint (published version)

© 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works, As wind power technology points to increase power ratings, the implementation based on a permanent-magnet synchronous generator (PMSG) with a full-power converter is expanding its market share. Multilevel converters, as for example, neutral-point clamped (NPC) converters, are therefore well suited for this application. Predictive current control presents similar dynamic response and reference tracking than other well-established control methods, but working at lower switching frequencies, and providing extensive flexibility to apply either online or offline different control laws to the same plant. In this work, the predictive current control is applied to both sides of the back-to-back NPC converter connecting a permanent-magnet synchronous wind power generator to the grid. DC-link neutral-point balance is achieved by means of the predictive control algorithm, which considers the redundant switching states of the back-to-back NPC converter. Reduced number of commutations, current spectrum control, and compliance with the low-voltage ride-through (LVRT) requirement are carried out with the predictive control. The obtained experimental results confirm the suitability of the proposed control approach., Peer Reviewed, Postprint (author's final draft)

The power ratings of wind energy conversion systems (WECS) are increasing considerably due to high demand on wind power. Thus, multilevel power converters are becoming an interesting solution in the largest WECS, especially the three-level neutral-point-clamped (3L-NPC) thanks to its simple implementation and proper performance compared to other topologies. However, the main drawback of the 3L-NPC is that the power losses are unevenly distributed among the switching devices, limiting its output power capability. Current literature focuses on the threelevel active neutral-point-clamped (3L-ANPC) as an evolution of the 3L-NPC, enabling a more even power loss distribution. However, in the 3L-ANPC there are still some devices suffering from both large switching and conduction power losses. Thus, this paper proposes new design guidelines for a 3L-ANPC inverter to force that each device mainly withstands either switching or conduction power losses. Then, the most suitable device is selected for each position, enabling a significant improvement in power loss distribution, thermal performance, converter efficiency and output power capability. A 2 MW low-voltage WECS is simulated with an electro-thermal model developed in PLECS, reaching a reduction of around 25% in power losses, a reduction of 50% in maximum junction temperature increase above ambient temperature, a reduction of 75% in maximum junction temperature variation, and an increase of around 85% in converter output power rating, compared to the conventional 3L-NPC and the 3L-ANPC., Postprint (author's final draft)

The three-level neutral-point-clamped (3L-NPC) topology is competitive in the large wind energy conversion systems (WECS) thanks to its simple implementation and proper performance compared to other topologies. However, the 3L-NPC topology does not allow distributing power losses evenly among the switching devices, which limits its output power capability. Current literature focuses on the three-level active neutral-point-clamped (3L-ANPC) as an evolution of the 3L-NPC, enabling a more even power loss distribution. However, some devices still suffer from significant switching and conduction power losses with typical commutation sequences. This paper proposes a novel commutation sequence for a 3L-ANPC inverter leg to force that each device mainly withstands either switching or conduction losses. This enables the selection of optimum devices for each position, resulting in an improved converter loss distribution, thermal performance, efficiency, and output power capability. A 2 MW low-voltage WECS is simulated with an electro-thermal model developed in PLECS, reaching a reduction of around 16% in total switching losses. In addition, an enhanced thermal performance is achieved, reducing the maximum junction temperature increase above ambient temperature, on average for all devices, around 4%. The thermal advantages are considerably higher in certain devices, reaching maximum reductions of around 17% in the maximum junction temperature increase above ambient temperature and about 40% in the maximum device junction temperature variation. All reductions are with reference to the conventional commutation sequence., Postprint (author's final draft)

© 1982-2012 IEEE. Aiming to improve the performance features of conventional two-level dual-active-bridge (DAB) converters, this paper presents a three-level neutral-point-clamped (NPC) DAB dc-dc converter. A general modulation pattern is initially defined, the dc-link capacitor voltage balancing is analyzed in detail, and a proper balancing control is designed. Then, a set of decoupled optimization problems is formulated as a function of the available modulation degrees of freedom to minimize the predominant converter losses. Finally, a simple and practical specific modulation strategy is provided, resembling the optimum solutions. The good performance of the proposed three-level NPC DAB converter operated with the proposed modulation strategy and voltage balancing control is verified through simulation and experiments. The capacitor voltage balancing can be guaranteed for all operating conditions. In addition, it is concluded that the multilevel topology provides benefits compared with the conventional two-level DAB converter., Postprint (published version)

© 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works, This paper studies the coupling between the capacitor voltage control loops of diode-clamped (or functionally equivalent) multilevel multileg (multiphase) dc-ac converters. From a complete model of the plant revealing the coupling, a simple approach consisting in multiplying the vector of control commands by a constant matrix is proposed to decouple the control problem and achieve a better controller performance. Simulation and experimental results are presented to prove the superior performance of the proposed decoupled control., Postprint (author's final draft)

This paper presents an efficiency comparison between silicon-carbide technology and silicon technology. In order to achieve this, the efficiency of an active neutral-point clamped converter built up with silicon carbide power-devices is compared with the efficiency of an active neutral-point clamped converter built up with silicon power-devices, under a particular operating mode and a particular selection of devices. Firstly, overall losses of both converters are estimated. Then, experimental tests are carried out to measure their overall losses and efficiency. Finally, experimental results are compared with the estimations to support the analysis. The efficiency of the SiC converter is higher in all the switching-frequency range., Postprint (published version)

This paper presents a capacitor voltage balancing control applicable to any multilevel dc-ac converter formed by a single set of series-connected capacitors implementing the dc link and semiconductor devices, such as the diode-clamped topology. The control is defined for any number of dc-link voltage levels and converter legs (for single-phase and multiphase systems), guaranteeing the capacitor voltage control for any modulation index value and load (from idle mode to full power). The associated control loop small-signal transfer function is presented, from which optimum compensator design guidelines are derived. The improvement in control performance is verified through simulation and experiments comparing with a previous balancing control strategy in a four-level three-phase dc-ac conversion system. The satisfactory control performance is also verified through simulation in a four-level five-phase dc-ac conversion system., Postprint (published version)

The low-voltage ride through (LVRT) requirement demands the wind power plants to remain connected to the grid in the presence of grid voltage dips, actively helping the network overall control to keep network voltage and frequency stable. Wind power technology points to increase power ratings. Hence, multilevel converters, as for example, neutral-point-clamped (NPC) converters, are well suited for this application. Predictive current control presents similar dynamic response and reference tracking than other well-established control methods, but working at lower switching frequencies. In this paper, the predictive current control is applied to the grid-side NPC converter as part of a wind energy conversion system, in order to fulfill the LVRT requirements. DC-link neutral-point balance is also achieved by means of the predictive control algorithm, which considers the redundant switching states of the NPC converter. Simulation and experimental results confirm the validity of the proposed control approach., Postprint (author’s final draft)

En este artículo se analiza el comportamiento eléctrico y térmico de transistores PT-IGBT conectados en paralelo utilizando un control activo de reparto equilibrado de corriente. El estudio de la estructura interna y de las ecuaciones que describen el funcionamiento de un transistor IGBT muestra la capacidad de modificar el funcionamiento del transistor según la relación tensión-corriente colector-emisor (VCE-ICE) variando el valor de la tensión puerta-emisor (VGE). Finalmente se comparan los resultados de funcionamiento de los transistores con control de reparto de corriente con los obtenidos sin aplicar ninguna acción de control., Postprint (published version)

En este trabajo se presenta una mejora en el diseño de los transductores de corriente flux-gate, con vistas a la reducción del consumo eléctrico de la electrónica de control. Esta mejora consiste en la substitución del amplificador lineal de compensación de flujo, que proporciona la salida de corriente de medida proporcional a la corriente principal, por un amplificador clase H, con lo cual se consigue reducir apreciablemente el consumo de energía de la electrónica sin afectar a las prestaciones del transducto r en cuanto a precisión, linealidad, etc., Postprint (published version)

In this paper, a predictive control scheme is proposed for the low-voltage ride-through (LVRT) enhancement of direct-driven permanent-magnet-synchronous-generator-based megawatt-level wind turbines. The proposed method uses the turbine-generator rotor inertia to store the surplus energy during the grid voltage dips. The power conversion system is realized using a three-phase diode-bridge rectifier, a three-level-boost converter, and a neutral-point-clamped (NPC) inverter. The wind turbine requirements, such as maximum power point tracking, net dc-bus voltage control, balancing of the dc capacitor voltages, and reactive power generation, are modeled as the reference control variables. The generator-and grid-side cost functions are defined to deal with these control objectives. During each sampling interval, the control goals are achieved based on the minimization of cost functions. The coordination of boost and NPC converters and the exchange of reference control variables during normal and LVRT operation are formulated such that the power converters operate in a safe mode while meeting the grid code requirements. Simulation and experimental results are presented to validate the proposed strategy., Postprint (published version)

In order to sense AC current with electric isolation in high frequency switching power converters the most simple and low cost solution is to consider a current transformer with a burden resistor. But burden resistor selection is not a simple task because involves a lot of considerations that affect the output voltage and its signal-to-noise ratio and the bandwidth of the measure. In this paper, considering the basic equations of the transformer and applying the Laplace Transformation is obtained a simple model of the current transformer interesting to select burden resistor and even to design the current transformer in case of high frequency applications, Postprint (published version)

Detailed switching models of power electronics devices often lead to long computing times, limiting the size of the system to be simulated. This drawback is especially important when the goal is to implement the model in a real-time simulation platform. An alternative is to use dynamic average models (DAM) for analyzing the dynamic behavior of power electronic devices. This paper presents the development of a DAM for a bidirectional solid-state transformer and its implementation in a real-time simulation platform. Several case studies have been carried out in order to evaluate the behavior of the model under different operating conditions, check its feasibility for power quality improvements and explore the implementation in a real-time simulation platform. (C) 2014 Elsevier B.V. All rights reserved., Postprint (published version)

With the aim to implement a suitable controller for a three-phase dc-ac multilevel active-clamped converter to enable its use in practice, and as a first step toward a full closed-loop converter control implementation into a single field-programmable gate array (FPGA) device, this paper presents the structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy. The selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycle, and covers both the undermodulation and overmodulation regions. A flexible implementation is conceived, allowing the variation of important operating parameters, such as the modulation index and switching frequency, through a simple user interface. The key aspects to achieve an efficient and robust FPGA implementation are discussed. Experimental results in a four-level converter prototype controlled with an Altera Cyclone III device under different operating conditions match fairly well with the expected results obtained through simulation, thus verifying the accurate performance of the FPGA-based modulator, Postprint (published version)

This paper presents a generalized multilevel direct power control (ML-DPC) scheme for grid-connected multilevel power converters. The proposed method extends the original DPC operating principle by considering only the closest subset of two-level voltage vectors to the present switching state. The implementation of this principle requires the power derivatives for feedback, which can present numerical problems when applied experimentally, mainly due to high measurement noise sensitivity. Therefore, a derivative estimator is proposed based on the converter-grid model in the synchronous reference frame. In addition, a virtual flux observer is developed to achieve synchronization and improve robustness in the presence of grid voltage harmonics. The proposed method is applicable to any multilevel converter topology of any number of levels. In this paper, simulations and experimental results are presented for a seven-level cascaded H-bridge converter., Postprint (published version)

A neutral-point-clamped three-level inverter with small dc-link capacitors is presented in this paper. The inverter requires zero average neutral-point current for stable neutral–point voltage. The small dc-link capacitors may not maintain capacitor voltage balance, even with zero neutral-point current. This may happen due to nonlinearities present in the circuit. This requires a fast control of the neutral-point voltage. A simple carrier-based modulation strategy which allows modeling of the neutral-point voltage dynamics as a continuous function of power drawn fromthe inverter is proposed. This continuous model shows that the neutral-point current is proportional to the power drawn from the inverter, and it enables the use of a well-established classical control theory for the neutral-point voltage controller design. A simple proportional integral controller is designed for the neutral-point voltage control on the basis of the continuous model. The design method for optimum performance is discussed. The implementation of the proposed modulation strategy and the controller is very simple. The controller is implemented in a 7.5-kW induction machine-based drive with only 14 μF dc-link capacitors. Also, the experimental results show that fast and stable performance of the neutral-point voltage controller are achieved and thus verify the validity of the proposed control approach., Postprint (published version)

Predictive current control is applied to a wind energy conversion system implemented with a permanent-magnet synchronous generator connected to the grid through a back-toback neutral-point-clamped converter. This control approach allows to work in steady-state and to fulfill the low-voltage ride through requirements demanded by the power system operators.Dc-link neutral point voltage balance is also achieved by means of the predictive control algorithm., Postprint (published version)

The solid state transformer is an emerging technology which aims at replacing the conventional lowfrequency power transformer by means of a high-frequency transformer driven by a proper AC/AC power electronics conversion system, at both transformer sides. In comparison with the conventional power transformer, the solid state transformer provides extended and enhanced operating capabilities that can be achieved with an appropriate controller design for the power electronics converters. In this work, the interaction of the solid state transformer with a distribution system is analyzed under different operating conditions. Bidirectional active power flow, full reactive power control, low-voltage side current unbalance management and high-voltage side low-voltage ride-through are achieved with the proposed control approach., Postprint (published version)

This paper presents an efficiency analysis of a recently-published topology, the multilevel-active-clamped (MAC) topology. In order to assess the MAC topology, an efficiency comparison between a four-level MAC leg and a conventional two-level leg operating in low voltage is carried out. First, overall losses of both topologies are estimated. Then, experimental tests to measure their overall losses and their efficiency are presented. Finally, obtained results from the experimental tests are compared with the estimations to substantiate the analysis. The efficiency of the MAC topology is higher in all the switching-frequency range., Postprint (published version)

Postprint (published version)

Thanks to the inherent redundancy to generate the different output voltage levels, the multilevel active-clamped (MAC) topology presents an important fault-tolerance ability which makes it interesting for several applications. This paper presents an analysis of the fault-tolerance capacity of the MAC converter. Both open-circuit and short-circuit faults are considered, and the analysis is carried out under single-device and two simultaneous device faults. Switching strategies and different hardware modifications to overcome the limitations caused by faults are proposed. Experimental tests with a four-level MAC prototype are presented to validate the analysis., Postprint (published version)

Postprint (published version)

This paper presents a novel pulsewidth modulation (PWM) strategy for n-level three-leg semiconductor-clamped dc–ac converters in the overmodulation region, with dc-link capacitor voltage balance in every switching cycle. The strategy is based on the virtual-vector concept. Suitable reference vector trajectories are selected to obtain low weighted total harmonic distortion and a simple algorithm. A hexagonal-boundary compression factor is introduced to guarantee, at any operating point, dc-link capacitor voltage regulation capabilities in every switching cycle and avoid narrow gate pulses. The detailed PWMalgorithm for an easy implementation in a digital control platform is also presented. The good performance of the strategy is verified through both simulation and experiments in a three-level three-phase neutral-point clamped converter., Postprint (published version)

In any application in which working with batteries is a must, the knowledge of the batteries’ state-of-charge (SOC) is a fundamental parameter for anyone, so it determines the remaining capacity in the battery. There exist several methods for the estimation of this SOC in Lead-acid batteries; however, when the requisites of the measuring method must offer, besides precision and reliability, the possibility to integrate the results into an automatized system, the Coulomb’s counter is the method that prevails. This paper presents, then, the design of a simpler Ampere-hourmeter based lead-acid battery SOC estimating system. Supported by previous studies in the field of SOC estimation in Hybrid Electric Vehicles and by experimental tests carried out by the researchers, the modelling of the simpler measuring system has been parameterized by following Peukert’s Equation, and afterwards it has been integrated into a data acquisition and processing system designed through a CSNX25 current sensor and a low-cost and low-consume 16F877 microcontroller. The fundamental conclusion of this paper is that obtaining an accurate result while estimating the SOC of a lead-acid battery with an simpler Ampere-hourmeter developed through a microcontroller based system is achievable but only if the used microcontroller holds enough memory to include the whole data treatment algorithms., Peer Reviewed, Postprint (published version)

The size of passive components in an adjustable speed drive can be reduced by using small dc-link capacitors. The EMI filter in the drive also consists of passive components. The size of the filter can be reduced by using a three-level inverter, which can have low output voltage distortion. However, the three-level inverter based on small dc-link capacitors requires a PWM strategy to maintain neutral-point voltage balance. In this paper, the common mode voltage, which is the determining factor for the EMI filter size, is analyzed for a virtual-vector-based PWM strategy. The common mode voltage, the shaft voltage, and the conducted emission for the small dc-link capacitor based three-level inverter are compared with that of the two-level inverter operated with space vector PWM strategy. Experimental results for the common mode voltage, the shaft voltage, and the conducted emission are presented. Results show that the conducted emission from the three-level inverter is lower than that of the two-level inverter. Thus, a three-level inverter requires a smaller EMI filter in motor drives with small dc-link capacitors., Postprint (published version)

In a voltage source inverter, overmodulation is required to extend the range of operation and enhance the dclink voltage utilization. A carrier-based implementation of a modulation strategy for the three-level neutral-point-clamped inverter is proposed for the overmodulation region. The modulation strategy ensures zero average neutral-point current in a switching period. A newly proposed boundary compression is used to regulate the dc-link voltage at all operating points. A description of the algorithm to implement the modulation strategy is also presented. The main advantage of the proposed algorithm is its simplicity. The reference signals for the PWM can be calculated using maximum six steps and does not require knowledge of the reference vector angle. The modulation strategy has been implemented in a three-level neutral-point-clamped inverter, and experimental results are presented., Postprint (published version)

A three-level neutral-point-c1amped inverter needs a controller for the neutral-point voltage. Typically, the controller design is based on a dynamic model. The dynamic model of the neutral-point voltage depends on the pulse width modulation technique used for the inverter. A pulse width modulation strategy which allows modeling the neutral-point voltage as a first-order continuous function is proposed in this paper. The new model shows that the neutral-point current is proportional to the reactive power drawn from the inverter. Since the model is a first-order model, a simple proportional controller is used in this paper to control the neutral-point voltage. Experimental results verifying the proposed modulation strategy and the controller are also presented in this paper., Postprint (published version)

En este artículo se realiza un breve estudio sobre las características que influyen en el reparto de corriente entre semiconductores conectados en paralelo. El estudio se centra en el reparto de corriente en transistores IGBT conectados en paralelo y los mecanismos que permiten compensar dicho reparto. Para ello se proponen dos estrategias de control para el equilibrado de corriente que están basadas en un caso en el cálculo del valor medio de la corriente y en el otro, en la asociación de parejas de transistores. Finalmente se presentan resultados experimentales basados en las estrategias de control propuestas., Postprint (published version)

Voltage total harmonic distortion and quadratic voltage ripple criteria are accepted figures of merit of a multilevel pulse width modulation (PWM) converter voltage quality. The dominating frequency domain approach does not deliver simple closed-form expressions and practically requires accounting up to 40–50 switching harmonics. Assuming infinitely high switching frequency, suggested time domain approach to a multilevel multiphase PWM voltage quality evaluation provides closed-form piece-wise analytical solutions. These simple formulas clearly reveal the dependence on modulation index for arbitrary voltage level and odd phase numbers. The results are applicable to any type of multilevel converters (including interleaved, open winding and other) operated with nearest level/nearest space vector modulation and relatively high switching frequency., Postprint (published version)

Prize Letter Award, atorgat per la IEEE Power Electronics Society, This letter introduces a new series of multilevel (ML) converters based on the ML clamping concept. By applying this technique, a ML clamping unit (MCU) conveys additional levels for synthesizing the output waveforms of a diode-clampedML dc– ac power converter. The basic building block of the ML clamping scheme is the ML clamping cell, which is composed of a pair of dc sources associated with one single-pole/triple-throw type of switch arrangement. The number of series-connected ML-clamping cells will set the number of levels of the synthesized waveform. By depending on the MCU arrangements, different converter configurations can be derived, namely, the common clamping and the modular types. Both approaches can be accomplished by employing classical three-level neutral-point-clamped (NPC) technology. Thus, the overall structure of the resultant converter is kept simple, wherein the number of parts count can be reduced, when compared with conventional NPC counterparts. In this letter, emphasis is given on the common clamping converter configuration. The attractiveness of the proposed ML concept is evidenced by conducting a comparative cost analysis. Experimental results are presented as a practicality proof of the proposed ML power converter., Peer Reviewed, Award-winning, Postprint (published version)

A Neutral-Point-Clamped (NPC) three-level inverter with small DC-link capacitors is presented in this paper. This inverter requires zero average neutral-point current for stable neutral-point potential. A simple carrier based modulation strategy is proposed for achieving zero average neutral-point current. A new simplified model of the neutral-point voltage dynamics is derived for the proposed modulation strategy. This model shows that the neutral-point current is proportional to the power drawn from the converter and it enables the use of well established classical control theory for neutral-point voltage controller design. A PI controller is used for neutral-point voltage balance. The implementation of the proposed modulation strategy and controller is simple. It does not require any information about the output phase currents. The controller is implemented in a 7.5 kW induction machine based drive with only 14 μF DC-link capacitors. A fast and stable performance of the neutral-point voltage controller is achieved and verified by experiments., Peer Reviewed, Postprint (published version)

This paper presents a novel multilevel activeclamped converter topology, which is an extension to m levels of the three-level active neutral-point-clamped topology. The operating principle is established through the definition of a proper set of switching states and a transition strategy between adjacent switching states. The benefits of the proposed converter topology and control in comparison to alternative multilevel converter topologies are discussed. The simulation and experimental results of a simple four-level dc–dc converter configuration are presented to illustrate the converter performance features. The experimental results of a four-level three-phase dc–ac converter are also presented to further validate the proposed topology and operating principle., Peer Reviewed, Postprint (published version)