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The effect of an Al buffer layer on the growth of AlN on a Si (111) substrate was investigated to develop an all-sputtered GaN film on a Si (111) template substrate. The X-ray diffraction method revealed an obvious improvement in the crystallinity of an AlN layer on the initial layer. At the interface structure, AlN film without the Al buffer layer exhibited surface nitridation of the Si surface, which degraded the AlN crystal growth. After investigating various growth conditions such as substrate temperature and layer thickness, we achieved the all-sputtered epitaxial growth of a GaN/AlN/Si substrate. The substrate temperature was below 650 °C, and the total thickness was less than 200 nm, which is beneficial as regards the cost efficiency of the template substrate for nitride semiconductors.

We investigated the effects of the passivation layer on the characteristics of amorphous InGaZnO4 thin-film transistors (a-InGaZnO TFTs) by comparing AlOx film by thermal atomic layer deposition (TALD-AlOx) with SiOx film by plasma enhanced chemical vapor deposition (PECVD-SiOx). The PECVD-SiOx TFTs before and after final annealing exhibited conductive and hump characteristics, respectively. In contrast, both TALD-AlOx TFTs before and after final annealing exhibited enhancement characteristics. From secondary ion mass spectroscopy analysis, we found that TALD-AlOx effectively suppresses H injection into the underneath of the a-InGaZnO layer compared with PECVD-SiOx. We believe such suppression of H injection leads to the enhancement characteristics of TALD-AlOx TFTs. On the other hand, the conductive and hump characteristics of PECVD-SiOx TFTs may be attributed to a higher concentration of H injected into the a-InGaZnO layer and ion bombardment due to PECVD. From these results, we argue that plasma-free TALD-AlOx is effective for achieving good characteristics in a-InGaZnO TFTs. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY, http://creativecommons.org/licenses/by/4.0/), which permits unrestricted reuse of the work in any medium, provided the original work is properly cited. [DOI: 10.1149/2.0231507jss] All rights reserved.

Amorphous In-Ga-Zn-O thin-film transistors (a-IGZO TFTs) have attracted considerable attention as an alternative device for conventional amorphous silicon (a-Si) TFTs. The features of this material are a low fabrication temperature less than 200 ◦ C, and preferable electronic properties such as higher field-effect mobility and lower threshold voltage (Vth) compared with those of a-Si TFTs. Such desirable performances also enable us to design peripheral circuits for displays. Furthermore, a-IGZO TFTs are regarded as a prospective material for “transparent electronics”, because of their wide bandgap of ∼3.2 eV. 1‐4 On the other hand, several papers have reported that aIGZO TFTs showed poor stability against electrical stresses. 5‐7 Since reliability is an issue for the realization of next-generation displays utilizing oxide semiconductors in transparent electronics, a deeper understanding of a-IGZO and its problems are necessary. The influence of hydrogen concentration in silicon nitride (SiNx) gate insulators (GIs) on the electrical stability of a-IGZO TFTs has been actively discussed. 8‐10 Lee et al. reported that the hydrogen in SiNx film strongly induced threshold voltage shift (�V th) due to the generation of shallow charge-trapping sites for electrons. 11 Their results lead us to expect that lower hydrogen content in the gate insulator will provide quite stable TFTs. In this study, we propose a fluorinated SiNx film utilizing SiF4 and N2 as source gasses unlike conventional film fabricated with SiH4/NH3 and investigated the electrical properties of a-IGZO TFT by applying positive biased stress (PBS). In order to discuss effect on reliability of hydrogen and fluorine in the GIs, we prepared several kindsofSiNx filmswithcontrollingtheconcentrationofhydrogenand fluorine. Thermally-oxidized SiO2 gate insulator was also evaluated for comparison.

We have investigated thermal distribution of an amorphous InSnZnO thin-film transistor (TFT) under voltage stress by using thermal imaging system. To clarify an influence of only self-heating phenomenon on reliability, we have focused on a channel scale dependence of heating. As the result, heating effect were strongly depended on channel scale and showed two types of dependences on channel length and width. When positive bias stress was applied to TFT, severe threshold voltage shift and high heating temperature were observed for wider TFT. Moreover, reliability under voltage stress was seems to be affected by accumulation of heating in wider TFT. (© 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

We investigated electrical properties of 4H-SiC trench metal-oxide-semiconductor field-effect transistors (MOSFETs) fabricated on (000_,1) C-face substrates with various off-axis angles. Off-axis angles and directions are 4o, 8o, and 15o towards [__,1120] and 8o towards [1_,100] directions. Most trench MOSFETs showed good on-state performance. Peculiar characteristics that field-effect mobility was 103 cm2/Vs in spite of a relatively high acceptor concentration of 1 × 1017 cm−3 in the channel region were observed for trench MOSFET on 15o-off substrates. From crystallographic analysis, this face is (11_,20) with 15o off towards [000_,1] direction. We can expect that this face has quite good MOS interface properties.

This article describes a new passivation process of Ga2O3, which consists by sputtering, for a vertical GaN p–n junction diode on a free-standing GaN substrate with a field-plate (FP) structure. We demonstrated reduced plasma damage during the sputtering process by cure annealing, and succeeded in improving the breakdown voltage (V B) to −550 V with the FP, compared with V B of −200 V without the FP. Ga2O3 is a suitable material for the FP because its dielectric constant is similar to that of GaN and it is more easily etched than Al2O3, which is used as a conventional insulator.

We investigate the influence of polymer passivation on amorphous Indium Gallium Zinc Oxide (a-IGZO) TFT reliability. We made photosensitive siloxane passivation layer on bottom-gate type a-IGZO TFTs with SiO 2 /Si substrate. For photosensitive materials, contact holes can be formed by UV photolithography technique without plasma etching process, leading to serious damage to the channel layer. The samples with and without passivation layer were tested in terms of the stability during the positive bias stress (PBS; V gs = 20 V) for 1000 sec. The stability of a-IGZO TFTs was improved by using the photo-sensitive siloxane passivation layer.

Degradation by Joule heating of the thin-film transistors (TFTs) is one of the important issues for realizing next-generation displays. We have investigated the thermal distribution on the channel region of transparent amorphous oxide semiconductor TFT in pulse operation using an infrared imaging system. We also discussed the relationship between the self-heating temperature and the degradation.

We fabricated highly reliable a-InGaZnO thin film transistors (TFTs) with new silicon nitride (SiN X ) gate insulator (GI) fabricated at low temperature (150°C). This new SiN X layer has low hydrogen content which is controlled by the source gases. Hydrogen gas flow rate ratio to SiF 4 was changed as 0%, 1%, and 8%, but the bias-stress-induced threshold voltage instabilities on the three kinds of TFTs kept quite low value. We found that the improvement for threshold voltage instabilities was not due to the effect of the hydrogen content. It is assumed that fluorine in the film, which originates in the source gas, has possibility to improve the interface between the channel and GI.

SiO 2 /IGZO interface was investigated by cyclic capacitance-voltage method. High pressure water vapor annealing improved interface states. We consider that this measurement method is useful for evaluating interface characteristics.

Effect of high-pressure water vapor (HPV) annealing is discussed from density of state (DOS) by capacitance–voltage (C–V) method and ΔVFB by the cyclic C–V measurement. The DOS of HPV samples were smaller than that of conventional atmosphere (AT) annealing around conduction band minimum (Ec). The ΔVFB of HPV samples were also smaller than that of AT. This suggests that HPV annealing is an effective method to decrease electron trap density as compared with AT condition. Especially, HPV 0.5 MPa sample was lower electron trap density and more stable than the other pressure HPV samples. Therefore, it is considered that the HPV in 0.5 MPa is the most promising condition. In addition, we succeeded in demonstrating the analysis of trap density in thin film by C–V method and cyclic C–V measurement.

Silver (Ag) electrodes printed on amorphous indium gallium zinc oxide (a-InGaZnO) were investigated to analyze their effect on thin-film transistor (TFT) characteristics. The TFT characteristics of samples annealed at 250 °C deteriorated seriously owing to an aggregation of Ag. In addition, the TFT characteristics deteriorated even for 200 °C annealing with oxygen and nitrogen atmospheres. From measurements of secondary ion mass spectrometry and Fourier transform infrared spectroscopy, we found that carbon and hydrogen contained in printed Ag electrodes seriously affect the TFT characteristics. The reduction and protection against these impurities in Ag ink is the key point in the application of printed Ag electrodes to a-InGaZnO TFTs.

Amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs) having several metals, namely Ag, Ti, and Mo, as the source and drain electrodes were characterized. TFTs with Ti and Mo electrodes showed drain current–gate voltage characteristics without fluctuation. However, TFTs with Ag electrodes indicated a low noisy on-state current at a large channel length under a low drain–source voltage condition. The source and drain resistances [R s/d (Ω)] of the TFTs with each of the three metals were calculated from the I DS–V GS characteristics. The R s/d values of the Ag, Ti, and Mo samples reached 4 × 104, 2 × 104, and 1 × 104 Ω, respectively. This implies that a spatial potential barrier exists at the a-IGZO/Ag interface and that the resistance of the potential barrier changes with the application of gate voltage.

The electronic structures of amorphous indium gallium zinc oxide (a-IGZO) on a SiO2 layers before and after annealing were observed by constant final state X-ray photoelectron spectroscopy (CFS-XPS) and X-ray adsorption near-edge structure spectroscopy (XANES). From the results of angle-resolved CFS-XPS, the change in the electronic state was clearly observed in the a-IGZO bulk rather than in the a-IGZO/SiO2 interface. This suggests that the electronic structures of the a-IGZO bulk strongly affected the thin-film transistor characteristics. The results of XANES indicated an increase in the number of tail states upon atmospheric annealing (AT). We consider that the increase in the number of tail states decreased the channel mobility of AT samples.

Stability is the most crucial issue in the fabrication of oxide thin-film transistors (TFTs) for next-generation displays. We have investigated the thermal distribution of an InSnZnO TFT under various gate and drain voltages by using an infrared imaging system. An asymmetrical thermal distribution was observed at a local drain region in a TFT depending on bias stress. These phenomena were decelerated or accelerated with stress time. We discussed the degradation mechanism by analyzing the electrical properties and thermal distribution. We concluded that the degradation phenomena are caused by a combination of Joule heating and the hot carrier effect.

The origin of anisotropic electrical properties on 4H-SiC trench metal–oxide–semiconductor field-effect transistors (MOSFETs) with large off-axis angles has been discussed from the viewpoints of charge pumping current and surface roughness. The channel mobility (µch) on (112̄0) tilted toward [0001̄] was high and that on (1̄1̄20) tilted toward [0001] was low. The roughness at the SiC/SiO2 interfaces was measured after the removal of the oxide. A rough surface was observed on (1̄1̄20). A locally thick gate oxide results in a nonuniform inversion layer, which is the main origin of the anisotropic electrical properties of the trench MOSFETs on off-axis substrates.